1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -S -passes=iroutliner -ir-outlining-no-cost < %s | FileCheck %s
4 ; These functions are constructed slightly differently so that they require
5 ; the same output blocks for the values used outside of the region. We are
6 ; checking that two output blocks are created with the same store instructions.
8 define void @outline_outputs1() #0 {
9 ; CHECK-LABEL: @outline_outputs1(
11 ; CHECK-NEXT: [[DOTLOC:%.*]] = alloca i32, align 4
12 ; CHECK-NEXT: [[ADD_LOC:%.*]] = alloca i32, align 4
13 ; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
14 ; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
15 ; CHECK-NEXT: [[OUTPUT:%.*]] = alloca i32, align 4
16 ; CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 4
17 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[ADD_LOC]])
18 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[DOTLOC]])
19 ; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[OUTPUT]], ptr [[ADD_LOC]], ptr [[DOTLOC]])
20 ; CHECK-NEXT: [[ADD_RELOAD:%.*]] = load i32, ptr [[ADD_LOC]], align 4
21 ; CHECK-NEXT: [[DOTRELOAD:%.*]] = load i32, ptr [[DOTLOC]], align 4
22 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[ADD_LOC]])
23 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[DOTLOC]])
24 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[OUTPUT]], align 4
25 ; CHECK-NEXT: call void @outlined_ir_func_1(i32 [[DOTRELOAD]], i32 [[ADD_RELOAD]], ptr [[RESULT]])
26 ; CHECK-NEXT: ret void
29 %a = alloca i32, align 4
30 %b = alloca i32, align 4
31 %output = alloca i32, align 4
32 %result = alloca i32, align 4
33 store i32 2, ptr %a, align 4
34 store i32 3, ptr %b, align 4
35 %0 = load i32, ptr %a, align 4
36 %1 = load i32, ptr %b, align 4
38 store i32 %add, ptr %output, align 4
39 %2 = load i32, ptr %output, align 4
40 %3 = load i32, ptr %output, align 4
41 %mul = mul i32 %2, %add
42 store i32 %mul, ptr %result, align 4
46 define void @outline_outputs2() #0 {
47 ; CHECK-LABEL: @outline_outputs2(
49 ; CHECK-NEXT: [[DOTLOC:%.*]] = alloca i32, align 4
50 ; CHECK-NEXT: [[ADD_LOC:%.*]] = alloca i32, align 4
51 ; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
52 ; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
53 ; CHECK-NEXT: [[OUTPUT:%.*]] = alloca i32, align 4
54 ; CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 4
55 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[ADD_LOC]])
56 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[DOTLOC]])
57 ; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[OUTPUT]], ptr [[ADD_LOC]], ptr [[DOTLOC]])
58 ; CHECK-NEXT: [[ADD_RELOAD:%.*]] = load i32, ptr [[ADD_LOC]], align 4
59 ; CHECK-NEXT: [[DOTRELOAD:%.*]] = load i32, ptr [[DOTLOC]], align 4
60 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[ADD_LOC]])
61 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[DOTLOC]])
62 ; CHECK-NEXT: call void @outlined_ir_func_1(i32 [[DOTRELOAD]], i32 [[ADD_RELOAD]], ptr [[RESULT]])
63 ; CHECK-NEXT: ret void
66 %a = alloca i32, align 4
67 %b = alloca i32, align 4
68 %output = alloca i32, align 4
69 %result = alloca i32, align 4
70 store i32 2, ptr %a, align 4
71 store i32 3, ptr %b, align 4
72 %0 = load i32, ptr %a, align 4
73 %1 = load i32, ptr %b, align 4
75 store i32 %add, ptr %output, align 4
76 %2 = load i32, ptr %output, align 4
77 %mul = mul i32 %2, %add
78 store i32 %mul, ptr %result, align 4
82 ; CHECK: define internal void @outlined_ir_func_0(ptr [[ARG0:%.*]], ptr [[ARG1:%.*]], ptr [[ARG2:%.*]], ptr [[ARG3:%.*]], ptr [[ARG4:%.*]]) #1 {
83 ; CHECK: entry_to_outline:
84 ; CHECK-NEXT: store i32 2, ptr [[ARG0]], align 4
85 ; CHECK-NEXT: store i32 3, ptr [[ARG1]], align 4
86 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG0]], align 4
87 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARG1]], align 4
88 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP0]], [[TMP1]]
89 ; CHECK-NEXT: store i32 [[ADD]], ptr [[ARG2]], align 4
90 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARG2]], align 4
92 ; CHECK: entry_after_outline.exitStub:
93 ; CHECK-NEXT: store i32 [[ADD]], ptr [[ARG3]], align 4
94 ; CHECK-NEXT: store i32 [[TMP2]], ptr [[ARG4]], align 4