| blob | 7d4fddc1563fed1d842092394b4e877a756de2c8 |
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
4 declare void @use(i1)
5 declare void @use32(i32)
7 define i1 @PR1817_1(i32 %X) {
8 ; CHECK-LABEL: @PR1817_1(
9 ; CHECK-NEXT: [[B:%.*]] = icmp ult i32 [[X:%.*]], 10
10 ; CHECK-NEXT: ret i1 [[B]]
11 ;
12 %A = icmp slt i32 %X, 10
13 %B = icmp ult i32 %X, 10
14 %C = and i1 %A, %B
15 ret i1 %C
16 }
18 define i1 @PR1817_1_logical(i32 %X) {
19 ; CHECK-LABEL: @PR1817_1_logical(
20 ; CHECK-NEXT: [[B:%.*]] = icmp ult i32 [[X:%.*]], 10
21 ; CHECK-NEXT: ret i1 [[B]]
22 ;
23 %A = icmp slt i32 %X, 10
24 %B = icmp ult i32 %X, 10
25 %C = select i1 %A, i1 %B, i1 false
26 ret i1 %C
27 }
29 define i1 @PR1817_2(i32 %X) {
30 ; CHECK-LABEL: @PR1817_2(
31 ; CHECK-NEXT: [[A:%.*]] = icmp slt i32 [[X:%.*]], 10
32 ; CHECK-NEXT: ret i1 [[A]]
33 ;
34 %A = icmp slt i32 %X, 10
35 %B = icmp ult i32 %X, 10
36 %C = or i1 %A, %B
37 ret i1 %C
38 }
40 define i1 @PR1817_2_logical(i32 %X) {
41 ; CHECK-LABEL: @PR1817_2_logical(
42 ; CHECK-NEXT: [[A:%.*]] = icmp slt i32 [[X:%.*]], 10
43 ; CHECK-NEXT: ret i1 [[A]]
44 ;
45 %A = icmp slt i32 %X, 10
46 %B = icmp ult i32 %X, 10
47 %C = select i1 %A, i1 true, i1 %B
48 ret i1 %C
49 }
51 define i1 @PR2330(i32 %a, i32 %b) {
52 ; CHECK-LABEL: @PR2330(
53 ; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[B:%.*]], [[A:%.*]]
54 ; CHECK-NEXT: [[AND:%.*]] = icmp ult i32 [[TMP1]], 8
55 ; CHECK-NEXT: ret i1 [[AND]]
56 ;
57 %cmp1 = icmp ult i32 %a, 8
58 %cmp2 = icmp ult i32 %b, 8
59 %and = and i1 %cmp2, %cmp1
60 ret i1 %and
61 }
63 define i1 @PR2330_logical(i32 %a, i32 %b) {
64 ; CHECK-LABEL: @PR2330_logical(
65 ; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[A:%.*]], 8
66 ; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[B:%.*]], 8
67 ; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP2]], i1 [[CMP1]], i1 false
68 ; CHECK-NEXT: ret i1 [[AND]]
69 ;
70 %cmp1 = icmp ult i32 %a, 8
71 %cmp2 = icmp ult i32 %b, 8
72 %and = select i1 %cmp2, i1 %cmp1, i1 false
73 ret i1 %and
74 }
76 ; if LHSC and RHSC differ only by one bit:
77 ; (X == C1 || X == C2) -> (X & ~(C1 ^ C2)) == C1 (C1 has 1 less set bit)
78 ; PR14708: https://bugs.llvm.org/show_bug.cgi?id=14708
80 define i1 @or_eq_with_one_bit_diff_constants1(i32 %x) {
81 ; CHECK-LABEL: @or_eq_with_one_bit_diff_constants1(
82 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -2
83 ; CHECK-NEXT: [[OR:%.*]] = icmp eq i32 [[TMP1]], 50
84 ; CHECK-NEXT: ret i1 [[OR]]
85 ;
86 %cmp1 = icmp eq i32 %x, 50
87 %cmp2 = icmp eq i32 %x, 51
88 %or = or i1 %cmp1, %cmp2
89 ret i1 %or
90 }
92 define i1 @or_eq_with_one_bit_diff_constants1_logical(i32 %x) {
93 ; CHECK-LABEL: @or_eq_with_one_bit_diff_constants1_logical(
94 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -2
95 ; CHECK-NEXT: [[OR:%.*]] = icmp eq i32 [[TMP1]], 50
96 ; CHECK-NEXT: ret i1 [[OR]]
97 ;
98 %cmp1 = icmp eq i32 %x, 50
99 %cmp2 = icmp eq i32 %x, 51
100 %or = select i1 %cmp1, i1 true, i1 %cmp2
101 ret i1 %or
102 }
104 ; (X != C1 && X != C2) -> (X & ~(C1 ^ C2)) != C1 (C1 has 1 less set bit)
106 define i1 @and_ne_with_one_bit_diff_constants1(i32 %x) {
107 ; CHECK-LABEL: @and_ne_with_one_bit_diff_constants1(
108 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -52
109 ; CHECK-NEXT: [[AND:%.*]] = icmp ult i32 [[TMP1]], -2
110 ; CHECK-NEXT: ret i1 [[AND]]
111 ;
112 %cmp1 = icmp ne i32 %x, 51
113 %cmp2 = icmp ne i32 %x, 50
114 %and = and i1 %cmp1, %cmp2
115 ret i1 %and
116 }
118 define i1 @and_ne_with_one_bit_diff_constants1_logical(i32 %x) {
119 ; CHECK-LABEL: @and_ne_with_one_bit_diff_constants1_logical(
120 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -52
121 ; CHECK-NEXT: [[AND:%.*]] = icmp ult i32 [[TMP1]], -2
122 ; CHECK-NEXT: ret i1 [[AND]]
123 ;
124 %cmp1 = icmp ne i32 %x, 51
125 %cmp2 = icmp ne i32 %x, 50
126 %and = select i1 %cmp1, i1 %cmp2, i1 false
127 ret i1 %and
128 }
130 ; The constants are not necessarily off-by-one, just off-by-one-bit.
132 define i1 @or_eq_with_one_bit_diff_constants2(i32 %x) {
133 ; CHECK-LABEL: @or_eq_with_one_bit_diff_constants2(
134 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -33
135 ; CHECK-NEXT: [[OR:%.*]] = icmp eq i32 [[TMP1]], 65
136 ; CHECK-NEXT: ret i1 [[OR]]
137 ;
138 %cmp1 = icmp eq i32 %x, 97
139 %cmp2 = icmp eq i32 %x, 65
140 %or = or i1 %cmp1, %cmp2
141 ret i1 %or
142 }
144 define i1 @or_eq_with_one_bit_diff_constants2_logical(i32 %x) {
145 ; CHECK-LABEL: @or_eq_with_one_bit_diff_constants2_logical(
146 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -33
147 ; CHECK-NEXT: [[OR:%.*]] = icmp eq i32 [[TMP1]], 65
148 ; CHECK-NEXT: ret i1 [[OR]]
149 ;
150 %cmp1 = icmp eq i32 %x, 97
151 %cmp2 = icmp eq i32 %x, 65
152 %or = select i1 %cmp1, i1 true, i1 %cmp2
153 ret i1 %or
154 }
156 define i1 @and_ne_with_one_bit_diff_constants2(i19 %x) {
157 ; CHECK-LABEL: @and_ne_with_one_bit_diff_constants2(
158 ; CHECK-NEXT: [[TMP1:%.*]] = and i19 [[X:%.*]], -129
159 ; CHECK-NEXT: [[AND:%.*]] = icmp ne i19 [[TMP1]], 65
160 ; CHECK-NEXT: ret i1 [[AND]]
161 ;
162 %cmp1 = icmp ne i19 %x, 65
163 %cmp2 = icmp ne i19 %x, 193
164 %and = and i1 %cmp1, %cmp2
165 ret i1 %and
166 }
168 define i1 @and_ne_with_one_bit_diff_constants2_logical(i19 %x) {
169 ; CHECK-LABEL: @and_ne_with_one_bit_diff_constants2_logical(
170 ; CHECK-NEXT: [[TMP1:%.*]] = and i19 [[X:%.*]], -129
171 ; CHECK-NEXT: [[AND:%.*]] = icmp ne i19 [[TMP1]], 65
172 ; CHECK-NEXT: ret i1 [[AND]]
173 ;
174 %cmp1 = icmp ne i19 %x, 65
175 %cmp2 = icmp ne i19 %x, 193
176 %and = select i1 %cmp1, i1 %cmp2, i1 false
177 ret i1 %and
178 }
180 ; Make sure the constants are treated as unsigned when comparing them.
182 define i1 @or_eq_with_one_bit_diff_constants3(i8 %x) {
183 ; CHECK-LABEL: @or_eq_with_one_bit_diff_constants3(
184 ; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], 127
185 ; CHECK-NEXT: [[OR:%.*]] = icmp eq i8 [[TMP1]], 126
186 ; CHECK-NEXT: ret i1 [[OR]]
187 ;
188 %cmp1 = icmp eq i8 %x, 254
189 %cmp2 = icmp eq i8 %x, 126
190 %or = or i1 %cmp1, %cmp2
191 ret i1 %or
192 }
194 define i1 @or_eq_with_one_bit_diff_constants3_logical(i8 %x) {
195 ; CHECK-LABEL: @or_eq_with_one_bit_diff_constants3_logical(
196 ; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], 127
197 ; CHECK-NEXT: [[OR:%.*]] = icmp eq i8 [[TMP1]], 126
198 ; CHECK-NEXT: ret i1 [[OR]]
199 ;
200 %cmp1 = icmp eq i8 %x, 254
201 %cmp2 = icmp eq i8 %x, 126
202 %or = select i1 %cmp1, i1 true, i1 %cmp2
203 ret i1 %or
204 }
206 define i1 @and_ne_with_one_bit_diff_constants3(i8 %x) {
207 ; CHECK-LABEL: @and_ne_with_one_bit_diff_constants3(
208 ; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], 127
209 ; CHECK-NEXT: [[AND:%.*]] = icmp ne i8 [[TMP1]], 65
210 ; CHECK-NEXT: ret i1 [[AND]]
211 ;
212 %cmp1 = icmp ne i8 %x, 65
213 %cmp2 = icmp ne i8 %x, 193
214 %and = and i1 %cmp1, %cmp2
215 ret i1 %and
216 }
218 define i1 @and_ne_with_one_bit_diff_constants3_logical(i8 %x) {
219 ; CHECK-LABEL: @and_ne_with_one_bit_diff_constants3_logical(
220 ; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], 127
221 ; CHECK-NEXT: [[AND:%.*]] = icmp ne i8 [[TMP1]], 65
222 ; CHECK-NEXT: ret i1 [[AND]]
223 ;
224 %cmp1 = icmp ne i8 %x, 65
225 %cmp2 = icmp ne i8 %x, 193
226 %and = select i1 %cmp1, i1 %cmp2, i1 false
227 ret i1 %and
228 }
230 ; Use an 'add' to eliminate an icmp if the constants are off-by-one (not off-by-one-bit).
231 ; (X == 13 | X == 14) -> X-13 <u 2
233 define i1 @or_eq_with_diff_one(i8 %x) {
234 ; CHECK-LABEL: @or_eq_with_diff_one(
235 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -13
236 ; CHECK-NEXT: [[OR:%.*]] = icmp ult i8 [[TMP1]], 2
237 ; CHECK-NEXT: ret i1 [[OR]]
238 ;
239 %cmp1 = icmp eq i8 %x, 13
240 %cmp2 = icmp eq i8 %x, 14
241 %or = or i1 %cmp1, %cmp2
242 ret i1 %or
243 }
245 define i1 @or_eq_with_diff_one_logical(i8 %x) {
246 ; CHECK-LABEL: @or_eq_with_diff_one_logical(
247 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -13
248 ; CHECK-NEXT: [[OR:%.*]] = icmp ult i8 [[TMP1]], 2
249 ; CHECK-NEXT: ret i1 [[OR]]
250 ;
251 %cmp1 = icmp eq i8 %x, 13
252 %cmp2 = icmp eq i8 %x, 14
253 %or = select i1 %cmp1, i1 true, i1 %cmp2
254 ret i1 %or
255 }
257 ; (X != 40 | X != 39) -> X-39 >u 1
259 define i1 @and_ne_with_diff_one(i32 %x) {
260 ; CHECK-LABEL: @and_ne_with_diff_one(
261 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -41
262 ; CHECK-NEXT: [[AND:%.*]] = icmp ult i32 [[TMP1]], -2
263 ; CHECK-NEXT: ret i1 [[AND]]
264 ;
265 %cmp1 = icmp ne i32 %x, 40
266 %cmp2 = icmp ne i32 %x, 39
267 %and = and i1 %cmp1, %cmp2
268 ret i1 %and
269 }
271 define i1 @and_ne_with_diff_one_logical(i32 %x) {
272 ; CHECK-LABEL: @and_ne_with_diff_one_logical(
273 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -41
274 ; CHECK-NEXT: [[AND:%.*]] = icmp ult i32 [[TMP1]], -2
275 ; CHECK-NEXT: ret i1 [[AND]]
276 ;
277 %cmp1 = icmp ne i32 %x, 40
278 %cmp2 = icmp ne i32 %x, 39
279 %and = select i1 %cmp1, i1 %cmp2, i1 false
280 ret i1 %and
281 }
283 ; Make sure the constants are treated as signed when comparing them.
284 ; PR32524: https://bugs.llvm.org/show_bug.cgi?id=32524
286 define i1 @or_eq_with_diff_one_signed(i32 %x) {
287 ; CHECK-LABEL: @or_eq_with_diff_one_signed(
288 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1
289 ; CHECK-NEXT: [[OR:%.*]] = icmp ult i32 [[TMP1]], 2
290 ; CHECK-NEXT: ret i1 [[OR]]
291 ;
292 %cmp1 = icmp eq i32 %x, 0
293 %cmp2 = icmp eq i32 %x, -1
294 %or = or i1 %cmp1, %cmp2
295 ret i1 %or
296 }
298 define i1 @or_eq_with_diff_one_signed_logical(i32 %x) {
299 ; CHECK-LABEL: @or_eq_with_diff_one_signed_logical(
300 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1
301 ; CHECK-NEXT: [[OR:%.*]] = icmp ult i32 [[TMP1]], 2
302 ; CHECK-NEXT: ret i1 [[OR]]
303 ;
304 %cmp1 = icmp eq i32 %x, 0
305 %cmp2 = icmp eq i32 %x, -1
306 %or = select i1 %cmp1, i1 true, i1 %cmp2
307 ret i1 %or
308 }
310 define i1 @and_ne_with_diff_one_signed(i64 %x) {
311 ; CHECK-LABEL: @and_ne_with_diff_one_signed(
312 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[X:%.*]], -1
313 ; CHECK-NEXT: [[AND:%.*]] = icmp ult i64 [[TMP1]], -2
314 ; CHECK-NEXT: ret i1 [[AND]]
315 ;
316 %cmp1 = icmp ne i64 %x, -1
317 %cmp2 = icmp ne i64 %x, 0
318 %and = and i1 %cmp1, %cmp2
319 ret i1 %and
320 }
322 define i1 @and_ne_with_diff_one_signed_logical(i64 %x) {
323 ; CHECK-LABEL: @and_ne_with_diff_one_signed_logical(
324 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[X:%.*]], -1
325 ; CHECK-NEXT: [[AND:%.*]] = icmp ult i64 [[TMP1]], -2
326 ; CHECK-NEXT: ret i1 [[AND]]
327 ;
328 %cmp1 = icmp ne i64 %x, -1
329 %cmp2 = icmp ne i64 %x, 0
330 %and = select i1 %cmp1, i1 %cmp2, i1 false
331 ret i1 %and
332 }
334 ; Vectors with splat constants get the same folds.
336 define <2 x i1> @or_eq_with_one_bit_diff_constants2_splatvec(<2 x i32> %x) {
337 ; CHECK-LABEL: @or_eq_with_one_bit_diff_constants2_splatvec(
338 ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 -33, i32 -33>
339 ; CHECK-NEXT: [[OR:%.*]] = icmp eq <2 x i32> [[TMP1]], <i32 65, i32 65>
340 ; CHECK-NEXT: ret <2 x i1> [[OR]]
341 ;
342 %cmp1 = icmp eq <2 x i32> %x, <i32 97, i32 97>
343 %cmp2 = icmp eq <2 x i32> %x, <i32 65, i32 65>
344 %or = or <2 x i1> %cmp1, %cmp2
345 ret <2 x i1> %or
346 }
348 define <2 x i1> @and_ne_with_diff_one_splatvec(<2 x i32> %x) {
349 ; CHECK-LABEL: @and_ne_with_diff_one_splatvec(
350 ; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], <i32 -41, i32 -41>
351 ; CHECK-NEXT: [[AND:%.*]] = icmp ult <2 x i32> [[TMP1]], <i32 -2, i32 -2>
352 ; CHECK-NEXT: ret <2 x i1> [[AND]]
353 ;
354 %cmp1 = icmp ne <2 x i32> %x, <i32 40, i32 40>
355 %cmp2 = icmp ne <2 x i32> %x, <i32 39, i32 39>
356 %and = and <2 x i1> %cmp1, %cmp2
357 ret <2 x i1> %and
358 }
360 ; This is a fuzzer-generated test that would assert because
361 ; we'd get into foldAndOfICmps() without running InstSimplify
362 ; on an 'and' that should have been killed. It's not obvious
363 ; why, but removing anything hides the bug, hence the long test.
365 define void @simplify_before_foldAndOfICmps(ptr %p) {
366 ; CHECK-LABEL: @simplify_before_foldAndOfICmps(
367 ; CHECK-NEXT: [[A8:%.*]] = alloca i16, align 2
368 ; CHECK-NEXT: [[L7:%.*]] = load i16, ptr [[A8]], align 2
369 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[L7]], -1
370 ; CHECK-NEXT: [[B11:%.*]] = zext i1 [[TMP1]] to i16
371 ; CHECK-NEXT: [[C10:%.*]] = icmp ugt i16 [[L7]], [[B11]]
372 ; CHECK-NEXT: [[C7:%.*]] = icmp slt i16 [[L7]], 0
373 ; CHECK-NEXT: [[C3:%.*]] = and i1 [[C7]], [[C10]]
374 ; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[C10]], true
375 ; CHECK-NEXT: [[C18:%.*]] = or i1 [[C7]], [[TMP2]]
376 ; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[C3]] to i64
377 ; CHECK-NEXT: [[G26:%.*]] = getelementptr i1, ptr null, i64 [[TMP3]]
378 ; CHECK-NEXT: store i16 [[L7]], ptr [[P:%.*]], align 2
379 ; CHECK-NEXT: store i1 [[C18]], ptr [[P]], align 1
380 ; CHECK-NEXT: store ptr [[G26]], ptr [[P]], align 8
381 ; CHECK-NEXT: ret void
382 ;
383 %A8 = alloca i16
384 %L7 = load i16, ptr %A8
385 %G21 = getelementptr i16, ptr %A8, i8 -1
386 %B11 = udiv i16 %L7, -1
387 %G4 = getelementptr i16, ptr %A8, i16 %B11
388 %L2 = load i16, ptr %G4
389 %L = load i16, ptr %G4
390 %B23 = mul i16 %B11, %B11
391 %L4 = load i16, ptr %A8
392 %B21 = sdiv i16 %L7, %L4
393 %B7 = sub i16 0, %B21
394 %B18 = mul i16 %B23, %B7
395 %C10 = icmp ugt i16 %L, %B11
396 %B20 = and i16 %L7, %L2
397 %B1 = mul i1 %C10, true
398 %C5 = icmp sle i16 %B21, %L
399 %C11 = icmp ule i16 %B21, %L
400 %C7 = icmp slt i16 %B20, 0
401 %B29 = srem i16 %L4, %B18
402 %B15 = add i1 %C7, %C10
403 %B19 = add i1 %C11, %B15
404 %C6 = icmp sge i1 %C11, %B19
405 %B33 = or i16 %B29, %L4
406 %C13 = icmp uge i1 %C5, %B1
407 %C3 = icmp ult i1 %C13, %C6
408 store i16 undef, ptr %G21
409 %C18 = icmp ule i1 %C10, %C7
410 %G26 = getelementptr i1, ptr null, i1 %C3
411 store i16 %B33, ptr %p
412 store i1 %C18, ptr %p
413 store ptr %G26, ptr %p
414 ret void
415 }
417 define i1 @PR42691_1(i32 %x) {
418 ; CHECK-LABEL: @PR42691_1(
419 ; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], 2147483646
420 ; CHECK-NEXT: ret i1 [[C]]
421 ;
422 %c1 = icmp slt i32 %x, 0
423 %c2 = icmp eq i32 %x, 2147483647
424 %c = or i1 %c1, %c2
425 ret i1 %c
426 }
428 define i1 @PR42691_1_logical(i32 %x) {
429 ; CHECK-LABEL: @PR42691_1_logical(
430 ; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], 2147483646
431 ; CHECK-NEXT: ret i1 [[C]]
432 ;
433 %c1 = icmp slt i32 %x, 0
434 %c2 = icmp eq i32 %x, 2147483647
435 %c = select i1 %c1, i1 true, i1 %c2
436 ret i1 %c
437 }
439 define i1 @PR42691_2(i32 %x) {
440 ; CHECK-LABEL: @PR42691_2(
441 ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], -2
442 ; CHECK-NEXT: ret i1 [[C]]
443 ;
444 %c1 = icmp ult i32 %x, 2147483648
445 %c2 = icmp eq i32 %x, 4294967295
446 %c = or i1 %c1, %c2
447 ret i1 %c
448 }
450 define i1 @PR42691_2_logical(i32 %x) {
451 ; CHECK-LABEL: @PR42691_2_logical(
452 ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], -2
453 ; CHECK-NEXT: ret i1 [[C]]
454 ;
455 %c1 = icmp ult i32 %x, 2147483648
456 %c2 = icmp eq i32 %x, 4294967295
457 %c = select i1 %c1, i1 true, i1 %c2
458 ret i1 %c
459 }
461 define i1 @PR42691_3(i32 %x) {
462 ; CHECK-LABEL: @PR42691_3(
463 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], -2147483647
464 ; CHECK-NEXT: ret i1 [[C]]
465 ;
466 %c1 = icmp sge i32 %x, 0
467 %c2 = icmp eq i32 %x, -2147483648
468 %c = or i1 %c1, %c2
469 ret i1 %c
470 }
472 define i1 @PR42691_3_logical(i32 %x) {
473 ; CHECK-LABEL: @PR42691_3_logical(
474 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], -2147483647
475 ; CHECK-NEXT: ret i1 [[C]]
476 ;
477 %c1 = icmp sge i32 %x, 0
478 %c2 = icmp eq i32 %x, -2147483648
479 %c = select i1 %c1, i1 true, i1 %c2
480 ret i1 %c
481 }
483 define i1 @PR42691_4(i32 %x) {
484 ; CHECK-LABEL: @PR42691_4(
485 ; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 1
486 ; CHECK-NEXT: ret i1 [[C]]
487 ;
488 %c1 = icmp uge i32 %x, 2147483648
489 %c2 = icmp eq i32 %x, 0
490 %c = or i1 %c1, %c2
491 ret i1 %c
492 }
494 define i1 @PR42691_4_logical(i32 %x) {
495 ; CHECK-LABEL: @PR42691_4_logical(
496 ; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 1
497 ; CHECK-NEXT: ret i1 [[C]]
498 ;
499 %c1 = icmp uge i32 %x, 2147483648
500 %c2 = icmp eq i32 %x, 0
501 %c = select i1 %c1, i1 true, i1 %c2
502 ret i1 %c
503 }
505 define i1 @PR42691_5(i32 %x) {
506 ; CHECK-LABEL: @PR42691_5(
507 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -2147483647
508 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483646
509 ; CHECK-NEXT: ret i1 [[C]]
510 ;
511 %c1 = icmp slt i32 %x, 1
512 %c2 = icmp eq i32 %x, 2147483647
513 %c = or i1 %c1, %c2
514 ret i1 %c
515 }
517 define i1 @PR42691_5_logical(i32 %x) {
518 ; CHECK-LABEL: @PR42691_5_logical(
519 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -2147483647
520 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483646
521 ; CHECK-NEXT: ret i1 [[C]]
522 ;
523 %c1 = icmp slt i32 %x, 1
524 %c2 = icmp eq i32 %x, 2147483647
525 %c = select i1 %c1, i1 true, i1 %c2
526 ret i1 %c
527 }
529 define i1 @PR42691_6(i32 %x) {
530 ; CHECK-LABEL: @PR42691_6(
531 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1
532 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483646
533 ; CHECK-NEXT: ret i1 [[C]]
534 ;
535 %c1 = icmp ult i32 %x, 2147483649
536 %c2 = icmp eq i32 %x, 4294967295
537 %c = or i1 %c1, %c2
538 ret i1 %c
539 }
541 define i1 @PR42691_6_logical(i32 %x) {
542 ; CHECK-LABEL: @PR42691_6_logical(
543 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1
544 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483646
545 ; CHECK-NEXT: ret i1 [[C]]
546 ;
547 %c1 = icmp ult i32 %x, 2147483649
548 %c2 = icmp eq i32 %x, 4294967295
549 %c = select i1 %c1, i1 true, i1 %c2
550 ret i1 %c
551 }
553 define i1 @PR42691_7(i32 %x) {
554 ; CHECK-LABEL: @PR42691_7(
555 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1
556 ; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[TMP1]], 0
557 ; CHECK-NEXT: ret i1 [[C]]
558 ;
559 %c1 = icmp uge i32 %x, 2147483649
560 %c2 = icmp eq i32 %x, 0
561 %c = or i1 %c1, %c2
562 ret i1 %c
563 }
565 define i1 @PR42691_7_logical(i32 %x) {
566 ; CHECK-LABEL: @PR42691_7_logical(
567 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1
568 ; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[TMP1]], 0
569 ; CHECK-NEXT: ret i1 [[C]]
570 ;
571 %c1 = icmp uge i32 %x, 2147483649
572 %c2 = icmp eq i32 %x, 0
573 %c = select i1 %c1, i1 true, i1 %c2
574 ret i1 %c
575 }
577 define i1 @PR42691_8(i32 %x) {
578 ; CHECK-LABEL: @PR42691_8(
579 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 2147483647
580 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483635
581 ; CHECK-NEXT: ret i1 [[C]]
582 ;
583 %c1 = icmp slt i32 %x, 14
584 %c2 = icmp ne i32 %x, -2147483648
585 %c = and i1 %c1, %c2
586 ret i1 %c
587 }
589 define i1 @PR42691_8_logical(i32 %x) {
590 ; CHECK-LABEL: @PR42691_8_logical(
591 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 2147483647
592 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483635
593 ; CHECK-NEXT: ret i1 [[C]]
594 ;
595 %c1 = icmp slt i32 %x, 14
596 %c2 = icmp ne i32 %x, -2147483648
597 %c = select i1 %c1, i1 %c2, i1 false
598 ret i1 %c
599 }
601 define i1 @PR42691_9(i32 %x) {
602 ; CHECK-LABEL: @PR42691_9(
603 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14
604 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], 2147483633
605 ; CHECK-NEXT: ret i1 [[C]]
606 ;
607 %c1 = icmp sgt i32 %x, 13
608 %c2 = icmp ne i32 %x, 2147483647
609 %c = and i1 %c1, %c2
610 ret i1 %c
611 }
613 define i1 @PR42691_9_logical(i32 %x) {
614 ; CHECK-LABEL: @PR42691_9_logical(
615 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14
616 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], 2147483633
617 ; CHECK-NEXT: ret i1 [[C]]
618 ;
619 %c1 = icmp sgt i32 %x, 13
620 %c2 = icmp ne i32 %x, 2147483647
621 %c = select i1 %c1, i1 %c2, i1 false
622 ret i1 %c
623 }
625 define i1 @PR42691_10(i32 %x) {
626 ; CHECK-LABEL: @PR42691_10(
627 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14
628 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -15
629 ; CHECK-NEXT: ret i1 [[C]]
630 ;
631 %c1 = icmp ugt i32 %x, 13
632 %c2 = icmp ne i32 %x, 4294967295
633 %c = and i1 %c1, %c2
634 ret i1 %c
635 }
637 define i1 @PR42691_10_logical(i32 %x) {
638 ; CHECK-LABEL: @PR42691_10_logical(
639 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14
640 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -15
641 ; CHECK-NEXT: ret i1 [[C]]
642 ;
643 %c1 = icmp ugt i32 %x, 13
644 %c2 = icmp ne i32 %x, 4294967295
645 %c = select i1 %c1, i1 %c2, i1 false
646 ret i1 %c
647 }
649 define i1 @substitute_constant_and_eq_eq(i8 %x, i8 %y) {
650 ; CHECK-LABEL: @substitute_constant_and_eq_eq(
651 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
652 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 42
653 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]
654 ; CHECK-NEXT: ret i1 [[R]]
655 ;
656 %c1 = icmp eq i8 %x, 42
657 %c2 = icmp eq i8 %x, %y
658 %r = and i1 %c1, %c2
659 ret i1 %r
660 }
662 define i1 @substitute_constant_and_eq_eq_logical(i8 %x, i8 %y) {
663 ; CHECK-LABEL: @substitute_constant_and_eq_eq_logical(
664 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
665 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 42
666 ; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 [[TMP1]], i1 false
667 ; CHECK-NEXT: ret i1 [[R]]
668 ;
669 %c1 = icmp eq i8 %x, 42
670 %c2 = icmp eq i8 %x, %y
671 %r = select i1 %c1, i1 %c2, i1 false
672 ret i1 %r
673 }
675 define i1 @substitute_constant_and_eq_eq_commute(i8 %x, i8 %y) {
676 ; CHECK-LABEL: @substitute_constant_and_eq_eq_commute(
677 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
678 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 42
679 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]
680 ; CHECK-NEXT: ret i1 [[R]]
681 ;
682 %c1 = icmp eq i8 %x, 42
683 %c2 = icmp eq i8 %x, %y
684 %r = and i1 %c2, %c1
685 ret i1 %r
686 }
688 define i1 @substitute_constant_and_eq_eq_commute_logical(i8 %x, i8 %y) {
689 ; CHECK-LABEL: @substitute_constant_and_eq_eq_commute_logical(
690 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
691 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 42
692 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]
693 ; CHECK-NEXT: ret i1 [[R]]
694 ;
695 %c1 = icmp eq i8 %x, 42
696 %c2 = icmp eq i8 %x, %y
697 %r = select i1 %c2, i1 %c1, i1 false
698 ret i1 %r
699 }
701 define i1 @substitute_constant_and_eq_ugt_swap(i8 %x, i8 %y) {
702 ; CHECK-LABEL: @substitute_constant_and_eq_ugt_swap(
703 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
704 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[Y:%.*]], 42
705 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]
706 ; CHECK-NEXT: ret i1 [[R]]
707 ;
708 %c1 = icmp eq i8 %x, 42
709 %c2 = icmp ugt i8 %y, %x
710 %r = and i1 %c2, %c1
711 ret i1 %r
712 }
714 define i1 @substitute_constant_and_eq_ugt_swap_logical(i8 %x, i8 %y) {
715 ; CHECK-LABEL: @substitute_constant_and_eq_ugt_swap_logical(
716 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
717 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[Y:%.*]], 42
718 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]
719 ; CHECK-NEXT: ret i1 [[R]]
720 ;
721 %c1 = icmp eq i8 %x, 42
722 %c2 = icmp ugt i8 %y, %x
723 %r = select i1 %c2, i1 %c1, i1 false
724 ret i1 %r
725 }
727 define <2 x i1> @substitute_constant_and_eq_ne_vec(<2 x i8> %x, <2 x i8> %y) {
728 ; CHECK-LABEL: @substitute_constant_and_eq_ne_vec(
729 ; CHECK-NEXT: [[C1:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 42, i8 97>
730 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i8> [[Y:%.*]], <i8 42, i8 97>
731 ; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[C1]], [[TMP1]]
732 ; CHECK-NEXT: ret <2 x i1> [[R]]
733 ;
734 %c1 = icmp eq <2 x i8> %x, <i8 42, i8 97>
735 %c2 = icmp ne <2 x i8> %x, %y
736 %r = and <2 x i1> %c1, %c2
737 ret <2 x i1> %r
738 }
740 define <2 x i1> @substitute_constant_and_eq_ne_vec_logical(<2 x i8> %x, <2 x i8> %y) {
741 ; CHECK-LABEL: @substitute_constant_and_eq_ne_vec_logical(
742 ; CHECK-NEXT: [[C1:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 42, i8 97>
743 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i8> [[Y:%.*]], <i8 42, i8 97>
744 ; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C1]], <2 x i1> [[TMP1]], <2 x i1> zeroinitializer
745 ; CHECK-NEXT: ret <2 x i1> [[R]]
746 ;
747 %c1 = icmp eq <2 x i8> %x, <i8 42, i8 97>
748 %c2 = icmp ne <2 x i8> %x, %y
749 %r = select <2 x i1> %c1, <2 x i1> %c2, <2 x i1> zeroinitializer
750 ret <2 x i1> %r
751 }
753 define i1 @substitute_constant_and_eq_sgt_use(i8 %x, i8 %y) {
754 ; CHECK-LABEL: @substitute_constant_and_eq_sgt_use(
755 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
756 ; CHECK-NEXT: call void @use(i1 [[C1]])
757 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 42
758 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]
759 ; CHECK-NEXT: ret i1 [[R]]
760 ;
761 %c1 = icmp eq i8 %x, 42
762 call void @use(i1 %c1)
763 %c2 = icmp sgt i8 %x, %y
764 %r = and i1 %c2, %c1
765 ret i1 %r
766 }
768 define i1 @substitute_constant_and_eq_sgt_use_logical(i8 %x, i8 %y) {
769 ; CHECK-LABEL: @substitute_constant_and_eq_sgt_use_logical(
770 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
771 ; CHECK-NEXT: call void @use(i1 [[C1]])
772 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 42
773 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]
774 ; CHECK-NEXT: ret i1 [[R]]
775 ;
776 %c1 = icmp eq i8 %x, 42
777 call void @use(i1 %c1)
778 %c2 = icmp sgt i8 %x, %y
779 %r = select i1 %c2, i1 %c1, i1 false
780 ret i1 %r
781 }
783 ; Negative test - extra use
785 define i1 @substitute_constant_and_eq_sgt_use2(i8 %x, i8 %y) {
786 ; CHECK-LABEL: @substitute_constant_and_eq_sgt_use2(
787 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
788 ; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X]], [[Y:%.*]]
789 ; CHECK-NEXT: call void @use(i1 [[C2]])
790 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C2]], [[C1]]
791 ; CHECK-NEXT: ret i1 [[R]]
792 ;
793 %c1 = icmp eq i8 %x, 42
794 %c2 = icmp sgt i8 %x, %y
795 call void @use(i1 %c2)
796 %r = and i1 %c2, %c1
797 ret i1 %r
798 }
800 define i1 @substitute_constant_and_eq_sgt_use2_logical(i8 %x, i8 %y) {
801 ; CHECK-LABEL: @substitute_constant_and_eq_sgt_use2_logical(
802 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
803 ; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X]], [[Y:%.*]]
804 ; CHECK-NEXT: call void @use(i1 [[C2]])
805 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C2]], [[C1]]
806 ; CHECK-NEXT: ret i1 [[R]]
807 ;
808 %c1 = icmp eq i8 %x, 42
809 %c2 = icmp sgt i8 %x, %y
810 call void @use(i1 %c2)
811 %r = select i1 %c2, i1 %c1, i1 false
812 ret i1 %r
813 }
815 ; Extra use does not prevent transform if the expression simplifies:
816 ; X == MAX && X < Y --> false
818 define i1 @slt_and_max(i8 %x, i8 %y) {
819 ; CHECK-LABEL: @slt_and_max(
820 ; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], [[Y:%.*]]
821 ; CHECK-NEXT: call void @use(i1 [[C2]])
822 ; CHECK-NEXT: ret i1 false
823 ;
824 %c1 = icmp eq i8 %x, 127
825 %c2 = icmp slt i8 %x, %y
826 call void @use(i1 %c2)
827 %r = and i1 %c2, %c1
828 ret i1 %r
829 }
831 define i1 @slt_and_max_logical(i8 %x, i8 %y) {
832 ; CHECK-LABEL: @slt_and_max_logical(
833 ; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], [[Y:%.*]]
834 ; CHECK-NEXT: call void @use(i1 [[C2]])
835 ; CHECK-NEXT: ret i1 false
836 ;
837 %c1 = icmp eq i8 %x, 127
838 %c2 = icmp slt i8 %x, %y
839 call void @use(i1 %c2)
840 %r = select i1 %c2, i1 %c1, i1 false
841 ret i1 %r
842 }
844 ; Extra use does not prevent transform if the expression simplifies:
845 ; X == MAX && X >= Y --> X == MAX
847 define i1 @sge_and_max(i8 %x, i8 %y) {
848 ; CHECK-LABEL: @sge_and_max(
849 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 127
850 ; CHECK-NEXT: [[C2:%.*]] = icmp sge i8 [[X]], [[Y:%.*]]
851 ; CHECK-NEXT: call void @use(i1 [[C2]])
852 ; CHECK-NEXT: ret i1 [[C1]]
853 ;
854 %c1 = icmp eq i8 %x, 127
855 %c2 = icmp sge i8 %x, %y
856 call void @use(i1 %c2)
857 %r = and i1 %c2, %c1
858 ret i1 %r
859 }
861 define i1 @sge_and_max_logical(i8 %x, i8 %y) {
862 ; CHECK-LABEL: @sge_and_max_logical(
863 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 127
864 ; CHECK-NEXT: [[C2:%.*]] = icmp sge i8 [[X]], [[Y:%.*]]
865 ; CHECK-NEXT: call void @use(i1 [[C2]])
866 ; CHECK-NEXT: ret i1 [[C1]]
867 ;
868 %c1 = icmp eq i8 %x, 127
869 %c2 = icmp sge i8 %x, %y
870 call void @use(i1 %c2)
871 %r = select i1 %c2, i1 %c1, i1 false
872 ret i1 %r
873 }
875 define i1 @substitute_constant_and_ne_ugt_swap(i8 %x, i8 %y) {
876 ; CHECK-LABEL: @substitute_constant_and_ne_ugt_swap(
877 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
878 ; CHECK-NEXT: [[C2:%.*]] = icmp ugt i8 [[Y:%.*]], [[X]]
879 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C2]], [[C1]]
880 ; CHECK-NEXT: ret i1 [[R]]
881 ;
882 %c1 = icmp ne i8 %x, 42
883 %c2 = icmp ugt i8 %y, %x
884 %r = and i1 %c2, %c1
885 ret i1 %r
886 }
888 define i1 @substitute_constant_and_ne_ugt_swap_logical(i8 %x, i8 %y) {
889 ; CHECK-LABEL: @substitute_constant_and_ne_ugt_swap_logical(
890 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
891 ; CHECK-NEXT: [[C2:%.*]] = icmp ugt i8 [[Y:%.*]], [[X]]
892 ; CHECK-NEXT: [[R:%.*]] = and i1 [[C2]], [[C1]]
893 ; CHECK-NEXT: ret i1 [[R]]
894 ;
895 %c1 = icmp ne i8 %x, 42
896 %c2 = icmp ugt i8 %y, %x
897 %r = select i1 %c2, i1 %c1, i1 false
898 ret i1 %r
899 }
901 define i1 @substitute_constant_or_ne_swap_sle(i8 %x, i8 %y) {
902 ; CHECK-LABEL: @substitute_constant_or_ne_swap_sle(
903 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
904 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 43
905 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[TMP1]]
906 ; CHECK-NEXT: ret i1 [[R]]
907 ;
908 %c1 = icmp ne i8 %x, 42
909 %c2 = icmp sle i8 %y, %x
910 %r = or i1 %c1, %c2
911 ret i1 %r
912 }
914 define i1 @substitute_constant_or_ne_swap_sle_logical(i8 %x, i8 %y) {
915 ; CHECK-LABEL: @substitute_constant_or_ne_swap_sle_logical(
916 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
917 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 43
918 ; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 true, i1 [[TMP1]]
919 ; CHECK-NEXT: ret i1 [[R]]
920 ;
921 %c1 = icmp ne i8 %x, 42
922 %c2 = icmp sle i8 %y, %x
923 %r = select i1 %c1, i1 true, i1 %c2
924 ret i1 %r
925 }
927 define i1 @substitute_constant_or_ne_uge_commute(i8 %x, i8 %y) {
928 ; CHECK-LABEL: @substitute_constant_or_ne_uge_commute(
929 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
930 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[Y:%.*]], 43
931 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[TMP1]]
932 ; CHECK-NEXT: ret i1 [[R]]
933 ;
934 %c1 = icmp ne i8 %x, 42
935 %c2 = icmp uge i8 %x, %y
936 %r = or i1 %c2, %c1
937 ret i1 %r
938 }
940 define i1 @substitute_constant_or_ne_uge_commute_logical(i8 %x, i8 %y) {
941 ; CHECK-LABEL: @substitute_constant_or_ne_uge_commute_logical(
942 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
943 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[Y:%.*]], 43
944 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[TMP1]]
945 ; CHECK-NEXT: ret i1 [[R]]
946 ;
947 %c1 = icmp ne i8 %x, 42
948 %c2 = icmp uge i8 %x, %y
949 %r = select i1 %c2, i1 true, i1 %c1
950 ret i1 %r
951 }
953 ; Negative test - not safe to substitute vector constant with undef element
955 define <2 x i1> @substitute_constant_or_ne_slt_swap_vec_undef(<2 x i8> %x, <2 x i8> %y) {
956 ; CHECK-LABEL: @substitute_constant_or_ne_slt_swap_vec_undef(
957 ; CHECK-NEXT: [[C1:%.*]] = icmp ne <2 x i8> [[X:%.*]], <i8 42, i8 undef>
958 ; CHECK-NEXT: [[C2:%.*]] = icmp slt <2 x i8> [[Y:%.*]], [[X]]
959 ; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[C1]], [[C2]]
960 ; CHECK-NEXT: ret <2 x i1> [[R]]
961 ;
962 %c1 = icmp ne <2 x i8> %x, <i8 42, i8 undef>
963 %c2 = icmp slt <2 x i8> %y, %x
964 %r = or <2 x i1> %c1, %c2
965 ret <2 x i1> %r
966 }
968 ; TODO: The poison case would be valid to fold.
970 define <2 x i1> @substitute_constant_or_ne_slt_swap_vec_poison(<2 x i8> %x, <2 x i8> %y) {
971 ; CHECK-LABEL: @substitute_constant_or_ne_slt_swap_vec_poison(
972 ; CHECK-NEXT: [[C1:%.*]] = icmp ne <2 x i8> [[X:%.*]], <i8 42, i8 poison>
973 ; CHECK-NEXT: [[C2:%.*]] = icmp slt <2 x i8> [[Y:%.*]], [[X]]
974 ; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[C1]], [[C2]]
975 ; CHECK-NEXT: ret <2 x i1> [[R]]
976 ;
977 %c1 = icmp ne <2 x i8> %x, <i8 42, i8 poison>
978 %c2 = icmp slt <2 x i8> %y, %x
979 %r = or <2 x i1> %c1, %c2
980 ret <2 x i1> %r
981 }
983 define <2 x i1> @substitute_constant_or_ne_slt_swap_vec_logical(<2 x i8> %x, <2 x i8> %y) {
984 ; CHECK-LABEL: @substitute_constant_or_ne_slt_swap_vec_logical(
985 ; CHECK-NEXT: [[C1:%.*]] = icmp ne <2 x i8> [[X:%.*]], <i8 42, i8 poison>
986 ; CHECK-NEXT: [[C2:%.*]] = icmp slt <2 x i8> [[Y:%.*]], [[X]]
987 ; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C1]], <2 x i1> <i1 true, i1 true>, <2 x i1> [[C2]]
988 ; CHECK-NEXT: ret <2 x i1> [[R]]
989 ;
990 %c1 = icmp ne <2 x i8> %x, <i8 42, i8 poison>
991 %c2 = icmp slt <2 x i8> %y, %x
992 %r = select <2 x i1> %c1, <2 x i1> <i1 true, i1 true>, <2 x i1> %c2
993 ret <2 x i1> %r
994 }
996 define i1 @substitute_constant_or_eq_swap_ne(i8 %x, i8 %y) {
997 ; CHECK-LABEL: @substitute_constant_or_eq_swap_ne(
998 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
999 ; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[Y:%.*]], [[X]]
1000 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[C2]]
1001 ; CHECK-NEXT: ret i1 [[R]]
1002 ;
1003 %c1 = icmp eq i8 %x, 42
1004 %c2 = icmp ne i8 %y, %x
1005 %r = or i1 %c1, %c2
1006 ret i1 %r
1007 }
1009 define i1 @substitute_constant_or_eq_swap_ne_logical(i8 %x, i8 %y) {
1010 ; CHECK-LABEL: @substitute_constant_or_eq_swap_ne_logical(
1011 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
1012 ; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[Y:%.*]], [[X]]
1013 ; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
1014 ; CHECK-NEXT: ret i1 [[R]]
1015 ;
1016 %c1 = icmp eq i8 %x, 42
1017 %c2 = icmp ne i8 %y, %x
1018 %r = select i1 %c1, i1 true, i1 %c2
1019 ret i1 %r
1020 }
1022 define i1 @substitute_constant_or_ne_sge_use(i8 %x, i8 %y) {
1023 ; CHECK-LABEL: @substitute_constant_or_ne_sge_use(
1024 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
1025 ; CHECK-NEXT: call void @use(i1 [[C1]])
1026 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 43
1027 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[TMP1]]
1028 ; CHECK-NEXT: ret i1 [[R]]
1029 ;
1030 %c1 = icmp ne i8 %x, 42
1031 call void @use(i1 %c1)
1032 %c2 = icmp sge i8 %x, %y
1033 %r = or i1 %c2, %c1
1034 ret i1 %r
1035 }
1037 define i1 @substitute_constant_or_ne_sge_use_logical(i8 %x, i8 %y) {
1038 ; CHECK-LABEL: @substitute_constant_or_ne_sge_use_logical(
1039 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
1040 ; CHECK-NEXT: call void @use(i1 [[C1]])
1041 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 43
1042 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[TMP1]]
1043 ; CHECK-NEXT: ret i1 [[R]]
1044 ;
1045 %c1 = icmp ne i8 %x, 42
1046 call void @use(i1 %c1)
1047 %c2 = icmp sge i8 %x, %y
1048 %r = select i1 %c2, i1 true, i1 %c1
1049 ret i1 %r
1050 }
1052 ; Negative test - extra use
1054 define i1 @substitute_constant_or_ne_ule_use2(i8 %x, i8 %y) {
1055 ; CHECK-LABEL: @substitute_constant_or_ne_ule_use2(
1056 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
1057 ; CHECK-NEXT: [[C2:%.*]] = icmp ule i8 [[X]], [[Y:%.*]]
1058 ; CHECK-NEXT: call void @use(i1 [[C2]])
1059 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C2]], [[C1]]
1060 ; CHECK-NEXT: ret i1 [[R]]
1061 ;
1062 %c1 = icmp ne i8 %x, 42
1063 %c2 = icmp ule i8 %x, %y
1064 call void @use(i1 %c2)
1065 %r = or i1 %c2, %c1
1066 ret i1 %r
1067 }
1069 define i1 @substitute_constant_or_ne_ule_use2_logical(i8 %x, i8 %y) {
1070 ; CHECK-LABEL: @substitute_constant_or_ne_ule_use2_logical(
1071 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
1072 ; CHECK-NEXT: [[C2:%.*]] = icmp ule i8 [[X]], [[Y:%.*]]
1073 ; CHECK-NEXT: call void @use(i1 [[C2]])
1074 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C2]], [[C1]]
1075 ; CHECK-NEXT: ret i1 [[R]]
1076 ;
1077 %c1 = icmp ne i8 %x, 42
1078 %c2 = icmp ule i8 %x, %y
1079 call void @use(i1 %c2)
1080 %r = select i1 %c2, i1 true, i1 %c1
1081 ret i1 %r
1082 }
1084 define i1 @or_ranges_overlap(i8 %x) {
1085 ; CHECK-LABEL: @or_ranges_overlap(
1086 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1087 ; CHECK-NEXT: [[C7:%.*]] = icmp ult i8 [[TMP1]], 16
1088 ; CHECK-NEXT: ret i1 [[C7]]
1089 ;
1090 %c1 = icmp uge i8 %x, 5
1091 %c2 = icmp ule i8 %x, 10
1092 %c3 = and i1 %c1, %c2
1093 %c4 = icmp uge i8 %x, 10
1094 %c5 = icmp ule i8 %x, 20
1095 %c6 = and i1 %c4, %c5
1096 %c7 = or i1 %c3, %c6
1097 ret i1 %c7
1098 }
1100 define i1 @or_ranges_adjacent(i8 %x) {
1101 ; CHECK-LABEL: @or_ranges_adjacent(
1102 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1103 ; CHECK-NEXT: [[C7:%.*]] = icmp ult i8 [[TMP1]], 16
1104 ; CHECK-NEXT: ret i1 [[C7]]
1105 ;
1106 %c1 = icmp uge i8 %x, 5
1107 %c2 = icmp ule i8 %x, 10
1108 %c3 = and i1 %c1, %c2
1109 %c4 = icmp uge i8 %x, 11
1110 %c5 = icmp ule i8 %x, 20
1111 %c6 = and i1 %c4, %c5
1112 %c7 = or i1 %c3, %c6
1113 ret i1 %c7
1114 }
1116 define i1 @or_ranges_separated(i8 %x) {
1117 ; CHECK-LABEL: @or_ranges_separated(
1118 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1119 ; CHECK-NEXT: [[C3:%.*]] = icmp ult i8 [[TMP1]], 6
1120 ; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[X]], -12
1121 ; CHECK-NEXT: [[C6:%.*]] = icmp ult i8 [[TMP2]], 9
1122 ; CHECK-NEXT: [[C7:%.*]] = or i1 [[C3]], [[C6]]
1123 ; CHECK-NEXT: ret i1 [[C7]]
1124 ;
1125 %c1 = icmp uge i8 %x, 5
1126 %c2 = icmp ule i8 %x, 10
1127 %c3 = and i1 %c1, %c2
1128 %c4 = icmp uge i8 %x, 12
1129 %c5 = icmp ule i8 %x, 20
1130 %c6 = and i1 %c4, %c5
1131 %c7 = or i1 %c3, %c6
1132 ret i1 %c7
1133 }
1135 define i1 @or_ranges_single_elem_right(i8 %x) {
1136 ; CHECK-LABEL: @or_ranges_single_elem_right(
1137 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1138 ; CHECK-NEXT: [[C6:%.*]] = icmp ult i8 [[TMP1]], 7
1139 ; CHECK-NEXT: ret i1 [[C6]]
1140 ;
1141 %c1 = icmp uge i8 %x, 5
1142 %c2 = icmp ule i8 %x, 10
1143 %c3 = and i1 %c1, %c2
1144 %c4 = icmp eq i8 %x, 11
1145 %c6 = or i1 %c3, %c4
1146 ret i1 %c6
1147 }
1149 define i1 @or_ranges_single_elem_left(i8 %x) {
1150 ; CHECK-LABEL: @or_ranges_single_elem_left(
1151 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -4
1152 ; CHECK-NEXT: [[C6:%.*]] = icmp ult i8 [[TMP1]], 7
1153 ; CHECK-NEXT: ret i1 [[C6]]
1154 ;
1155 %c1 = icmp uge i8 %x, 5
1156 %c2 = icmp ule i8 %x, 10
1157 %c3 = and i1 %c1, %c2
1158 %c4 = icmp eq i8 %x, 4
1159 %c6 = or i1 %c3, %c4
1160 ret i1 %c6
1161 }
1163 define i1 @and_ranges_overlap(i8 %x) {
1164 ; CHECK-LABEL: @and_ranges_overlap(
1165 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -7
1166 ; CHECK-NEXT: [[C7:%.*]] = icmp ult i8 [[TMP1]], 4
1167 ; CHECK-NEXT: ret i1 [[C7]]
1168 ;
1169 %c1 = icmp uge i8 %x, 5
1170 %c2 = icmp ule i8 %x, 10
1171 %c3 = and i1 %c1, %c2
1172 %c4 = icmp uge i8 %x, 7
1173 %c5 = icmp ule i8 %x, 20
1174 %c6 = and i1 %c4, %c5
1175 %c7 = and i1 %c3, %c6
1176 ret i1 %c7
1177 }
1179 define i1 @and_ranges_overlap_single(i8 %x) {
1180 ; CHECK-LABEL: @and_ranges_overlap_single(
1181 ; CHECK-NEXT: [[C7:%.*]] = icmp eq i8 [[X:%.*]], 10
1182 ; CHECK-NEXT: ret i1 [[C7]]
1183 ;
1184 %c1 = icmp uge i8 %x, 5
1185 %c2 = icmp ule i8 %x, 10
1186 %c3 = and i1 %c1, %c2
1187 %c4 = icmp uge i8 %x, 10
1188 %c5 = icmp ule i8 %x, 20
1189 %c6 = and i1 %c4, %c5
1190 %c7 = and i1 %c3, %c6
1191 ret i1 %c7
1192 }
1194 define i1 @and_ranges_no_overlap(i8 %x) {
1195 ; CHECK-LABEL: @and_ranges_no_overlap(
1196 ; CHECK-NEXT: ret i1 false
1197 ;
1198 %c1 = icmp uge i8 %x, 5
1199 %c2 = icmp ule i8 %x, 10
1200 %c3 = and i1 %c1, %c2
1201 %c4 = icmp uge i8 %x, 11
1202 %c5 = icmp ule i8 %x, 20
1203 %c6 = and i1 %c4, %c5
1204 %c7 = and i1 %c3, %c6
1205 ret i1 %c7
1206 }
1208 define i1 @and_ranges_signed_pred(i64 %x) {
1209 ; CHECK-LABEL: @and_ranges_signed_pred(
1210 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[X:%.*]], -9223372036854775681
1211 ; CHECK-NEXT: [[T5:%.*]] = icmp ult i64 [[TMP1]], -9223372036854775553
1212 ; CHECK-NEXT: ret i1 [[T5]]
1213 ;
1214 %t1 = add i64 %x, 127
1215 %t2 = icmp slt i64 %t1, 1024
1216 %t3 = add i64 %x, 128
1217 %t4 = icmp slt i64 %t3, 256
1218 %t5 = and i1 %t2, %t4
1219 ret i1 %t5
1220 }
1222 define i1 @and_two_ranges_to_mask_and_range(i8 %c) {
1223 ; CHECK-LABEL: @and_two_ranges_to_mask_and_range(
1224 ; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[C:%.*]], -33
1225 ; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[TMP1]], -91
1226 ; CHECK-NEXT: [[AND:%.*]] = icmp ult i8 [[TMP2]], -26
1227 ; CHECK-NEXT: ret i1 [[AND]]
1228 ;
1229 %c.off = add i8 %c, -97
1230 %cmp1 = icmp ugt i8 %c.off, 25
1231 %c.off2 = add i8 %c, -65
1232 %cmp2 = icmp ugt i8 %c.off2, 25
1233 %and = and i1 %cmp1, %cmp2
1234 ret i1 %and
1235 }
1237 define i1 @and_two_ranges_to_mask_and_range_not_pow2_diff(i8 %c) {
1238 ; CHECK-LABEL: @and_two_ranges_to_mask_and_range_not_pow2_diff(
1239 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[C:%.*]], -123
1240 ; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i8 [[TMP1]], -26
1241 ; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[C]], -90
1242 ; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i8 [[TMP2]], -26
1243 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
1244 ; CHECK-NEXT: ret i1 [[AND]]
1245 ;
1246 %c.off = add i8 %c, -97
1247 %cmp1 = icmp ugt i8 %c.off, 25
1248 %c.off2 = add i8 %c, -64
1249 %cmp2 = icmp ugt i8 %c.off2, 25
1250 %and = and i1 %cmp1, %cmp2
1251 ret i1 %and
1252 }
1254 define i1 @and_two_ranges_to_mask_and_range_different_sizes(i8 %c) {
1255 ; CHECK-LABEL: @and_two_ranges_to_mask_and_range_different_sizes(
1256 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[C:%.*]], -123
1257 ; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i8 [[TMP1]], -26
1258 ; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[C]], -90
1259 ; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i8 [[TMP2]], -25
1260 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
1261 ; CHECK-NEXT: ret i1 [[AND]]
1262 ;
1263 %c.off = add i8 %c, -97
1264 %cmp1 = icmp ugt i8 %c.off, 25
1265 %c.off2 = add i8 %c, -65
1266 %cmp2 = icmp ugt i8 %c.off2, 24
1267 %and = and i1 %cmp1, %cmp2
1268 ret i1 %and
1269 }
1271 define i1 @and_two_ranges_to_mask_and_range_no_add_on_one_range(i16 %x) {
1272 ; CHECK-LABEL: @and_two_ranges_to_mask_and_range_no_add_on_one_range(
1273 ; CHECK-NEXT: [[TMP1:%.*]] = and i16 [[X:%.*]], -20
1274 ; CHECK-NEXT: [[AND:%.*]] = icmp ugt i16 [[TMP1]], 11
1275 ; CHECK-NEXT: ret i1 [[AND]]
1276 ;
1277 %cmp1 = icmp uge i16 %x, 12
1278 %cmp2 = icmp ult i16 %x, 16
1279 %cmp3 = icmp uge i16 %x, 28
1280 %or = or i1 %cmp2, %cmp3
1281 %and = and i1 %cmp1, %or
1282 ret i1 %and
1283 }
1285 ; This tests an "is_alpha" style check for the combination of logical or
1286 ; and nowrap flags on the adds. In this case, the logical or will not be
1287 ; converted into a bitwise or.
1288 define i1 @is_ascii_alphabetic(i32 %char) {
1289 ; CHECK-LABEL: @is_ascii_alphabetic(
1290 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[CHAR:%.*]], -33
1291 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], -65
1292 ; CHECK-NEXT: [[LOGICAL:%.*]] = icmp ult i32 [[TMP2]], 26
1293 ; CHECK-NEXT: ret i1 [[LOGICAL]]
1294 ;
1295 %add1 = add nsw i32 %char, -65
1296 %cmp1 = icmp ult i32 %add1, 26
1297 %add2 = add nsw i32 %char, -97
1298 %cmp2 = icmp ult i32 %add2, 26
1299 %logical = select i1 %cmp1, i1 true, i1 %cmp2
1300 ret i1 %logical
1301 }
1303 define i1 @is_ascii_alphabetic_inverted(i32 %char) {
1304 ; CHECK-LABEL: @is_ascii_alphabetic_inverted(
1305 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[CHAR:%.*]], -33
1306 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], -91
1307 ; CHECK-NEXT: [[LOGICAL:%.*]] = icmp ult i32 [[TMP2]], -26
1308 ; CHECK-NEXT: ret i1 [[LOGICAL]]
1309 ;
1310 %add1 = add nsw i32 %char, -91
1311 %cmp1 = icmp ult i32 %add1, -26
1312 %add2 = add nsw i32 %char, -123
1313 %cmp2 = icmp ult i32 %add2, -26
1314 %logical = select i1 %cmp1, i1 %cmp2, i1 false
1315 ret i1 %logical
1316 }
1318 define i1 @bitwise_and_bitwise_and_icmps(i8 %x, i8 %y, i8 %z) {
1319 ; CHECK-LABEL: @bitwise_and_bitwise_and_icmps(
1320 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1321 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1322 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1323 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1324 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
1325 ; CHECK-NEXT: [[AND2:%.*]] = and i1 [[C1]], [[TMP3]]
1326 ; CHECK-NEXT: ret i1 [[AND2]]
1327 ;
1328 %c1 = icmp eq i8 %y, 42
1329 %x.m1 = and i8 %x, 1
1330 %z.shift = shl i8 1, %z
1331 %x.m2 = and i8 %x, %z.shift
1332 %c2 = icmp ne i8 %x.m1, 0
1333 %c3 = icmp ne i8 %x.m2, 0
1334 %and1 = and i1 %c1, %c2
1335 %and2 = and i1 %and1, %c3
1336 ret i1 %and2
1337 }
1339 define i1 @bitwise_and_bitwise_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {
1340 ; CHECK-LABEL: @bitwise_and_bitwise_and_icmps_comm1(
1341 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1342 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1343 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1344 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1345 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
1346 ; CHECK-NEXT: [[AND2:%.*]] = and i1 [[C1]], [[TMP3]]
1347 ; CHECK-NEXT: ret i1 [[AND2]]
1348 ;
1349 %c1 = icmp eq i8 %y, 42
1350 %x.m1 = and i8 %x, 1
1351 %z.shift = shl i8 1, %z
1352 %x.m2 = and i8 %x, %z.shift
1353 %c2 = icmp ne i8 %x.m1, 0
1354 %c3 = icmp ne i8 %x.m2, 0
1355 %and1 = and i1 %c1, %c2
1356 %and2 = and i1 %c3, %and1
1357 ret i1 %and2
1358 }
1360 define i1 @bitwise_and_bitwise_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {
1361 ; CHECK-LABEL: @bitwise_and_bitwise_and_icmps_comm2(
1362 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1363 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1364 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1365 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1366 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
1367 ; CHECK-NEXT: [[AND2:%.*]] = and i1 [[TMP3]], [[C1]]
1368 ; CHECK-NEXT: ret i1 [[AND2]]
1369 ;
1370 %c1 = icmp eq i8 %y, 42
1371 %x.m1 = and i8 %x, 1
1372 %z.shift = shl i8 1, %z
1373 %x.m2 = and i8 %x, %z.shift
1374 %c2 = icmp ne i8 %x.m1, 0
1375 %c3 = icmp ne i8 %x.m2, 0
1376 %and1 = and i1 %c2, %c1
1377 %and2 = and i1 %and1, %c3
1378 ret i1 %and2
1379 }
1381 define i1 @bitwise_and_bitwise_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {
1382 ; CHECK-LABEL: @bitwise_and_bitwise_and_icmps_comm3(
1383 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1384 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1385 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1386 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1387 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
1388 ; CHECK-NEXT: [[AND2:%.*]] = and i1 [[TMP3]], [[C1]]
1389 ; CHECK-NEXT: ret i1 [[AND2]]
1390 ;
1391 %c1 = icmp eq i8 %y, 42
1392 %x.m1 = and i8 %x, 1
1393 %z.shift = shl i8 1, %z
1394 %x.m2 = and i8 %x, %z.shift
1395 %c2 = icmp ne i8 %x.m1, 0
1396 %c3 = icmp ne i8 %x.m2, 0
1397 %and1 = and i1 %c2, %c1
1398 %and2 = and i1 %c3, %and1
1399 ret i1 %and2
1400 }
1402 define i1 @bitwise_and_logical_and_icmps(i8 %x, i8 %y, i8 %z) {
1403 ; CHECK-LABEL: @bitwise_and_logical_and_icmps(
1404 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1405 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1406 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1407 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1408 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
1409 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C1]], i1 [[TMP3]], i1 false
1410 ; CHECK-NEXT: ret i1 [[AND2]]
1411 ;
1412 %c1 = icmp eq i8 %y, 42
1413 %x.m1 = and i8 %x, 1
1414 %z.shift = shl i8 1, %z
1415 %x.m2 = and i8 %x, %z.shift
1416 %c2 = icmp ne i8 %x.m1, 0
1417 %c3 = icmp ne i8 %x.m2, 0
1418 %and1 = select i1 %c1, i1 %c2, i1 false
1419 %and2 = and i1 %and1, %c3
1420 ret i1 %and2
1421 }
1423 define i1 @bitwise_and_logical_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {
1424 ; CHECK-LABEL: @bitwise_and_logical_and_icmps_comm1(
1425 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1426 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1427 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1428 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1429 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
1430 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C1]], i1 [[TMP3]], i1 false
1431 ; CHECK-NEXT: ret i1 [[AND2]]
1432 ;
1433 %c1 = icmp eq i8 %y, 42
1434 %x.m1 = and i8 %x, 1
1435 %z.shift = shl i8 1, %z
1436 %x.m2 = and i8 %x, %z.shift
1437 %c2 = icmp ne i8 %x.m1, 0
1438 %c3 = icmp ne i8 %x.m2, 0
1439 %and1 = select i1 %c1, i1 %c2, i1 false
1440 %and2 = and i1 %c3, %and1
1441 ret i1 %and2
1442 }
1444 define i1 @bitwise_and_logical_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {
1445 ; CHECK-LABEL: @bitwise_and_logical_and_icmps_comm2(
1446 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1447 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1448 ; CHECK-NEXT: [[TMP1:%.*]] = freeze i8 [[Z_SHIFT]]
1449 ; CHECK-NEXT: [[TMP2:%.*]] = or i8 [[TMP1]], 1
1450 ; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], [[X:%.*]]
1451 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i8 [[TMP3]], [[TMP2]]
1452 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP4]], i1 [[C1]], i1 false
1453 ; CHECK-NEXT: ret i1 [[AND2]]
1454 ;
1455 %c1 = icmp eq i8 %y, 42
1456 %x.m1 = and i8 %x, 1
1457 %z.shift = shl i8 1, %z
1458 %x.m2 = and i8 %x, %z.shift
1459 %c2 = icmp ne i8 %x.m1, 0
1460 %c3 = icmp ne i8 %x.m2, 0
1461 %and1 = select i1 %c2, i1 %c1, i1 false
1462 %and2 = and i1 %and1, %c3
1463 ret i1 %and2
1464 }
1466 define i1 @bitwise_and_logical_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {
1467 ; CHECK-LABEL: @bitwise_and_logical_and_icmps_comm3(
1468 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1469 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1470 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1471 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1472 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
1473 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP3]], i1 [[C1]], i1 false
1474 ; CHECK-NEXT: ret i1 [[AND2]]
1475 ;
1476 %c1 = icmp eq i8 %y, 42
1477 %x.m1 = and i8 %x, 1
1478 %z.shift = shl i8 1, %z
1479 %x.m2 = and i8 %x, %z.shift
1480 %c2 = icmp ne i8 %x.m1, 0
1481 %c3 = icmp ne i8 %x.m2, 0
1482 %and1 = select i1 %c2, i1 %c1, i1 false
1483 %and2 = and i1 %c3, %and1
1484 ret i1 %and2
1485 }
1487 define i1 @logical_and_bitwise_and_icmps(i8 %x, i8 %y, i8 %z) {
1488 ; CHECK-LABEL: @logical_and_bitwise_and_icmps(
1489 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1490 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1491 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1492 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1493 ; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
1494 ; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
1495 ; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C1]], [[C2]]
1496 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false
1497 ; CHECK-NEXT: ret i1 [[AND2]]
1498 ;
1499 %c1 = icmp eq i8 %y, 42
1500 %x.m1 = and i8 %x, 1
1501 %z.shift = shl i8 1, %z
1502 %x.m2 = and i8 %x, %z.shift
1503 %c2 = icmp ne i8 %x.m1, 0
1504 %c3 = icmp ne i8 %x.m2, 0
1505 %and1 = and i1 %c1, %c2
1506 %and2 = select i1 %and1, i1 %c3, i1 false
1507 ret i1 %and2
1508 }
1510 define i1 @logical_and_bitwise_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {
1511 ; CHECK-LABEL: @logical_and_bitwise_and_icmps_comm1(
1512 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1513 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1514 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1515 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1516 ; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
1517 ; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
1518 ; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C1]], [[C2]]
1519 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C3]], i1 [[AND1]], i1 false
1520 ; CHECK-NEXT: ret i1 [[AND2]]
1521 ;
1522 %c1 = icmp eq i8 %y, 42
1523 %x.m1 = and i8 %x, 1
1524 %z.shift = shl i8 1, %z
1525 %x.m2 = and i8 %x, %z.shift
1526 %c2 = icmp ne i8 %x.m1, 0
1527 %c3 = icmp ne i8 %x.m2, 0
1528 %and1 = and i1 %c1, %c2
1529 %and2 = select i1 %c3, i1 %and1, i1 false
1530 ret i1 %and2
1531 }
1533 define i1 @logical_and_bitwise_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {
1534 ; CHECK-LABEL: @logical_and_bitwise_and_icmps_comm2(
1535 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1536 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1537 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1538 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1539 ; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
1540 ; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
1541 ; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C2]], [[C1]]
1542 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false
1543 ; CHECK-NEXT: ret i1 [[AND2]]
1544 ;
1545 %c1 = icmp eq i8 %y, 42
1546 %x.m1 = and i8 %x, 1
1547 %z.shift = shl i8 1, %z
1548 %x.m2 = and i8 %x, %z.shift
1549 %c2 = icmp ne i8 %x.m1, 0
1550 %c3 = icmp ne i8 %x.m2, 0
1551 %and1 = and i1 %c2, %c1
1552 %and2 = select i1 %and1, i1 %c3, i1 false
1553 ret i1 %and2
1554 }
1556 define i1 @logical_and_bitwise_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {
1557 ; CHECK-LABEL: @logical_and_bitwise_and_icmps_comm3(
1558 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1559 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1560 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1561 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1562 ; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
1563 ; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
1564 ; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C2]], [[C1]]
1565 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C3]], i1 [[AND1]], i1 false
1566 ; CHECK-NEXT: ret i1 [[AND2]]
1567 ;
1568 %c1 = icmp eq i8 %y, 42
1569 %x.m1 = and i8 %x, 1
1570 %z.shift = shl i8 1, %z
1571 %x.m2 = and i8 %x, %z.shift
1572 %c2 = icmp ne i8 %x.m1, 0
1573 %c3 = icmp ne i8 %x.m2, 0
1574 %and1 = and i1 %c2, %c1
1575 %and2 = select i1 %c3, i1 %and1, i1 false
1576 ret i1 %and2
1577 }
1579 define i1 @logical_and_logical_and_icmps(i8 %x, i8 %y, i8 %z) {
1580 ; CHECK-LABEL: @logical_and_logical_and_icmps(
1581 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1582 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1583 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1584 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1585 ; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
1586 ; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
1587 ; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
1588 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false
1589 ; CHECK-NEXT: ret i1 [[AND2]]
1590 ;
1591 %c1 = icmp eq i8 %y, 42
1592 %x.m1 = and i8 %x, 1
1593 %z.shift = shl i8 1, %z
1594 %x.m2 = and i8 %x, %z.shift
1595 %c2 = icmp ne i8 %x.m1, 0
1596 %c3 = icmp ne i8 %x.m2, 0
1597 %and1 = select i1 %c1, i1 %c2, i1 false
1598 %and2 = select i1 %and1, i1 %c3, i1 false
1599 ret i1 %and2
1600 }
1602 define i1 @logical_and_logical_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {
1603 ; CHECK-LABEL: @logical_and_logical_and_icmps_comm1(
1604 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1605 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1606 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1607 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1608 ; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
1609 ; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
1610 ; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C3]], i1 [[C1]], i1 false
1611 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP1]], i1 [[C2]], i1 false
1612 ; CHECK-NEXT: ret i1 [[AND2]]
1613 ;
1614 %c1 = icmp eq i8 %y, 42
1615 %x.m1 = and i8 %x, 1
1616 %z.shift = shl i8 1, %z
1617 %x.m2 = and i8 %x, %z.shift
1618 %c2 = icmp ne i8 %x.m1, 0
1619 %c3 = icmp ne i8 %x.m2, 0
1620 %and1 = select i1 %c1, i1 %c2, i1 false
1621 %and2 = select i1 %c3, i1 %and1, i1 false
1622 ret i1 %and2
1623 }
1625 define i1 @logical_and_logical_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {
1626 ; CHECK-LABEL: @logical_and_logical_and_icmps_comm2(
1627 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1628 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1629 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1630 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1631 ; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
1632 ; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
1633 ; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C2]], i1 [[C1]], i1 false
1634 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false
1635 ; CHECK-NEXT: ret i1 [[AND2]]
1636 ;
1637 %c1 = icmp eq i8 %y, 42
1638 %x.m1 = and i8 %x, 1
1639 %z.shift = shl i8 1, %z
1640 %x.m2 = and i8 %x, %z.shift
1641 %c2 = icmp ne i8 %x.m1, 0
1642 %c3 = icmp ne i8 %x.m2, 0
1643 %and1 = select i1 %c2, i1 %c1, i1 false
1644 %and2 = select i1 %and1, i1 %c3, i1 false
1645 ret i1 %and2
1646 }
1648 define i1 @logical_and_logical_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {
1649 ; CHECK-LABEL: @logical_and_logical_and_icmps_comm3(
1650 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1651 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1652 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1653 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1654 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
1655 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP3]], i1 [[C1]], i1 false
1656 ; CHECK-NEXT: ret i1 [[AND2]]
1657 ;
1658 %c1 = icmp eq i8 %y, 42
1659 %x.m1 = and i8 %x, 1
1660 %z.shift = shl i8 1, %z
1661 %x.m2 = and i8 %x, %z.shift
1662 %c2 = icmp ne i8 %x.m1, 0
1663 %c3 = icmp ne i8 %x.m2, 0
1664 %and1 = select i1 %c2, i1 %c1, i1 false
1665 %and2 = select i1 %c3, i1 %and1, i1 false
1666 ret i1 %and2
1667 }
1669 define i1 @bitwise_or_bitwise_or_icmps(i8 %x, i8 %y, i8 %z) {
1670 ; CHECK-LABEL: @bitwise_or_bitwise_or_icmps(
1671 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1672 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1673 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1674 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1675 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
1676 ; CHECK-NEXT: [[OR2:%.*]] = or i1 [[C1]], [[TMP3]]
1677 ; CHECK-NEXT: ret i1 [[OR2]]
1678 ;
1679 %c1 = icmp eq i8 %y, 42
1680 %x.m1 = and i8 %x, 1
1681 %z.shift = shl i8 1, %z
1682 %x.m2 = and i8 %x, %z.shift
1683 %c2 = icmp eq i8 %x.m1, 0
1684 %c3 = icmp eq i8 %x.m2, 0
1685 %or1 = or i1 %c1, %c2
1686 %or2 = or i1 %or1, %c3
1687 ret i1 %or2
1688 }
1690 define i1 @bitwise_or_bitwise_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {
1691 ; CHECK-LABEL: @bitwise_or_bitwise_or_icmps_comm1(
1692 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1693 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1694 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1695 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1696 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
1697 ; CHECK-NEXT: [[OR2:%.*]] = or i1 [[C1]], [[TMP3]]
1698 ; CHECK-NEXT: ret i1 [[OR2]]
1699 ;
1700 %c1 = icmp eq i8 %y, 42
1701 %x.m1 = and i8 %x, 1
1702 %z.shift = shl i8 1, %z
1703 %x.m2 = and i8 %x, %z.shift
1704 %c2 = icmp eq i8 %x.m1, 0
1705 %c3 = icmp eq i8 %x.m2, 0
1706 %or1 = or i1 %c1, %c2
1707 %or2 = or i1 %c3, %or1
1708 ret i1 %or2
1709 }
1711 define i1 @bitwise_or_bitwise_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {
1712 ; CHECK-LABEL: @bitwise_or_bitwise_or_icmps_comm2(
1713 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1714 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1715 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1716 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1717 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
1718 ; CHECK-NEXT: [[OR2:%.*]] = or i1 [[TMP3]], [[C1]]
1719 ; CHECK-NEXT: ret i1 [[OR2]]
1720 ;
1721 %c1 = icmp eq i8 %y, 42
1722 %x.m1 = and i8 %x, 1
1723 %z.shift = shl i8 1, %z
1724 %x.m2 = and i8 %x, %z.shift
1725 %c2 = icmp eq i8 %x.m1, 0
1726 %c3 = icmp eq i8 %x.m2, 0
1727 %or1 = or i1 %c2, %c1
1728 %or2 = or i1 %or1, %c3
1729 ret i1 %or2
1730 }
1732 define i1 @bitwise_or_bitwise_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {
1733 ; CHECK-LABEL: @bitwise_or_bitwise_or_icmps_comm3(
1734 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1735 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1736 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1737 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1738 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
1739 ; CHECK-NEXT: [[OR2:%.*]] = or i1 [[TMP3]], [[C1]]
1740 ; CHECK-NEXT: ret i1 [[OR2]]
1741 ;
1742 %c1 = icmp eq i8 %y, 42
1743 %x.m1 = and i8 %x, 1
1744 %z.shift = shl i8 1, %z
1745 %x.m2 = and i8 %x, %z.shift
1746 %c2 = icmp eq i8 %x.m1, 0
1747 %c3 = icmp eq i8 %x.m2, 0
1748 %or1 = or i1 %c2, %c1
1749 %or2 = or i1 %c3, %or1
1750 ret i1 %or2
1751 }
1753 define i1 @bitwise_or_logical_or_icmps(i8 %x, i8 %y, i8 %z) {
1754 ; CHECK-LABEL: @bitwise_or_logical_or_icmps(
1755 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1756 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1757 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1758 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1759 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
1760 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[C1]], i1 true, i1 [[TMP3]]
1761 ; CHECK-NEXT: ret i1 [[OR2]]
1762 ;
1763 %c1 = icmp eq i8 %y, 42
1764 %x.m1 = and i8 %x, 1
1765 %z.shift = shl i8 1, %z
1766 %x.m2 = and i8 %x, %z.shift
1767 %c2 = icmp eq i8 %x.m1, 0
1768 %c3 = icmp eq i8 %x.m2, 0
1769 %or1 = select i1 %c1, i1 true, i1 %c2
1770 %or2 = or i1 %or1, %c3
1771 ret i1 %or2
1772 }
1774 define i1 @bitwise_or_logical_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {
1775 ; CHECK-LABEL: @bitwise_or_logical_or_icmps_comm1(
1776 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1777 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1778 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1779 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1780 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
1781 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[C1]], i1 true, i1 [[TMP3]]
1782 ; CHECK-NEXT: ret i1 [[OR2]]
1783 ;
1784 %c1 = icmp eq i8 %y, 42
1785 %x.m1 = and i8 %x, 1
1786 %z.shift = shl i8 1, %z
1787 %x.m2 = and i8 %x, %z.shift
1788 %c2 = icmp eq i8 %x.m1, 0
1789 %c3 = icmp eq i8 %x.m2, 0
1790 %or1 = select i1 %c1, i1 true, i1 %c2
1791 %or2 = or i1 %c3, %or1
1792 ret i1 %or2
1793 }
1795 define i1 @bitwise_or_logical_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {
1796 ; CHECK-LABEL: @bitwise_or_logical_or_icmps_comm2(
1797 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1798 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1799 ; CHECK-NEXT: [[TMP1:%.*]] = freeze i8 [[Z_SHIFT]]
1800 ; CHECK-NEXT: [[TMP2:%.*]] = or i8 [[TMP1]], 1
1801 ; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], [[X:%.*]]
1802 ; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i8 [[TMP3]], [[TMP2]]
1803 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP4]], i1 true, i1 [[C1]]
1804 ; CHECK-NEXT: ret i1 [[OR2]]
1805 ;
1806 %c1 = icmp eq i8 %y, 42
1807 %x.m1 = and i8 %x, 1
1808 %z.shift = shl i8 1, %z
1809 %x.m2 = and i8 %x, %z.shift
1810 %c2 = icmp eq i8 %x.m1, 0
1811 %c3 = icmp eq i8 %x.m2, 0
1812 %or1 = select i1 %c2, i1 true, i1 %c1
1813 %or2 = or i1 %or1, %c3
1814 ret i1 %or2
1815 }
1817 define i1 @bitwise_or_logical_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {
1818 ; CHECK-LABEL: @bitwise_or_logical_or_icmps_comm3(
1819 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1820 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1821 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
1822 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
1823 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
1824 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP3]], i1 true, i1 [[C1]]
1825 ; CHECK-NEXT: ret i1 [[OR2]]
1826 ;
1827 %c1 = icmp eq i8 %y, 42
1828 %x.m1 = and i8 %x, 1
1829 %z.shift = shl i8 1, %z
1830 %x.m2 = and i8 %x, %z.shift
1831 %c2 = icmp eq i8 %x.m1, 0
1832 %c3 = icmp eq i8 %x.m2, 0
1833 %or1 = select i1 %c2, i1 true, i1 %c1
1834 %or2 = or i1 %c3, %or1
1835 ret i1 %or2
1836 }
1838 define i1 @logical_or_bitwise_or_icmps(i8 %x, i8 %y, i8 %z) {
1839 ; CHECK-LABEL: @logical_or_bitwise_or_icmps(
1840 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1841 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1842 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1843 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1844 ; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
1845 ; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
1846 ; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C1]], [[C2]]
1847 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]
1848 ; CHECK-NEXT: ret i1 [[OR2]]
1849 ;
1850 %c1 = icmp eq i8 %y, 42
1851 %x.m1 = and i8 %x, 1
1852 %z.shift = shl i8 1, %z
1853 %x.m2 = and i8 %x, %z.shift
1854 %c2 = icmp eq i8 %x.m1, 0
1855 %c3 = icmp eq i8 %x.m2, 0
1856 %or1 = or i1 %c1, %c2
1857 %or2 = select i1 %or1, i1 true, i1 %c3
1858 ret i1 %or2
1859 }
1861 define i1 @logical_or_bitwise_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {
1862 ; CHECK-LABEL: @logical_or_bitwise_or_icmps_comm1(
1863 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1864 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1865 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1866 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1867 ; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
1868 ; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
1869 ; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C1]], [[C2]]
1870 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[C3]], i1 true, i1 [[OR1]]
1871 ; CHECK-NEXT: ret i1 [[OR2]]
1872 ;
1873 %c1 = icmp eq i8 %y, 42
1874 %x.m1 = and i8 %x, 1
1875 %z.shift = shl i8 1, %z
1876 %x.m2 = and i8 %x, %z.shift
1877 %c2 = icmp eq i8 %x.m1, 0
1878 %c3 = icmp eq i8 %x.m2, 0
1879 %or1 = or i1 %c1, %c2
1880 %or2 = select i1 %c3, i1 true, i1 %or1
1881 ret i1 %or2
1882 }
1884 define i1 @logical_or_bitwise_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {
1885 ; CHECK-LABEL: @logical_or_bitwise_or_icmps_comm2(
1886 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1887 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1888 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1889 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1890 ; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
1891 ; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
1892 ; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C2]], [[C1]]
1893 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]
1894 ; CHECK-NEXT: ret i1 [[OR2]]
1895 ;
1896 %c1 = icmp eq i8 %y, 42
1897 %x.m1 = and i8 %x, 1
1898 %z.shift = shl i8 1, %z
1899 %x.m2 = and i8 %x, %z.shift
1900 %c2 = icmp eq i8 %x.m1, 0
1901 %c3 = icmp eq i8 %x.m2, 0
1902 %or1 = or i1 %c2, %c1
1903 %or2 = select i1 %or1, i1 true, i1 %c3
1904 ret i1 %or2
1905 }
1907 define i1 @logical_or_bitwise_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {
1908 ; CHECK-LABEL: @logical_or_bitwise_or_icmps_comm3(
1909 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1910 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1911 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1912 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1913 ; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
1914 ; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
1915 ; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C2]], [[C1]]
1916 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[C3]], i1 true, i1 [[OR1]]
1917 ; CHECK-NEXT: ret i1 [[OR2]]
1918 ;
1919 %c1 = icmp eq i8 %y, 42
1920 %x.m1 = and i8 %x, 1
1921 %z.shift = shl i8 1, %z
1922 %x.m2 = and i8 %x, %z.shift
1923 %c2 = icmp eq i8 %x.m1, 0
1924 %c3 = icmp eq i8 %x.m2, 0
1925 %or1 = or i1 %c2, %c1
1926 %or2 = select i1 %c3, i1 true, i1 %or1
1927 ret i1 %or2
1928 }
1930 define i1 @logical_or_logical_or_icmps(i8 %x, i8 %y, i8 %z) {
1931 ; CHECK-LABEL: @logical_or_logical_or_icmps(
1932 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1933 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1934 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1935 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1936 ; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
1937 ; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
1938 ; CHECK-NEXT: [[OR1:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
1939 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]
1940 ; CHECK-NEXT: ret i1 [[OR2]]
1941 ;
1942 %c1 = icmp eq i8 %y, 42
1943 %x.m1 = and i8 %x, 1
1944 %z.shift = shl i8 1, %z
1945 %x.m2 = and i8 %x, %z.shift
1946 %c2 = icmp eq i8 %x.m1, 0
1947 %c3 = icmp eq i8 %x.m2, 0
1948 %or1 = select i1 %c1, i1 true, i1 %c2
1949 %or2 = select i1 %or1, i1 true, i1 %c3
1950 ret i1 %or2
1951 }
1953 define i1 @logical_or_logical_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {
1954 ; CHECK-LABEL: @logical_or_logical_or_icmps_comm1(
1955 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1956 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1957 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1958 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1959 ; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
1960 ; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
1961 ; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C3]], i1 true, i1 [[C1]]
1962 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP1]], i1 true, i1 [[C2]]
1963 ; CHECK-NEXT: ret i1 [[OR2]]
1964 ;
1965 %c1 = icmp eq i8 %y, 42
1966 %x.m1 = and i8 %x, 1
1967 %z.shift = shl i8 1, %z
1968 %x.m2 = and i8 %x, %z.shift
1969 %c2 = icmp eq i8 %x.m1, 0
1970 %c3 = icmp eq i8 %x.m2, 0
1971 %or1 = select i1 %c1, i1 true, i1 %c2
1972 %or2 = select i1 %c3, i1 true, i1 %or1
1973 ret i1 %or2
1974 }
1976 define i1 @logical_or_logical_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {
1977 ; CHECK-LABEL: @logical_or_logical_or_icmps_comm2(
1978 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
1979 ; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
1980 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
1981 ; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
1982 ; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
1983 ; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
1984 ; CHECK-NEXT: [[OR1:%.*]] = select i1 [[C2]], i1 true, i1 [[C1]]
1985 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]
1986 ; CHECK-NEXT: ret i1 [[OR2]]
1987 ;
1988 %c1 = icmp eq i8 %y, 42
1989 %x.m1 = and i8 %x, 1
1990 %z.shift = shl i8 1, %z
1991 %x.m2 = and i8 %x, %z.shift
1992 %c2 = icmp eq i8 %x.m1, 0
1993 %c3 = icmp eq i8 %x.m2, 0
1994 %or1 = select i1 %c2, i1 true, i1 %c1
1995 %or2 = select i1 %or1, i1 true, i1 %c3
1996 ret i1 %or2
1997 }
1999 define i1 @logical_or_logical_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {
2000 ; CHECK-LABEL: @logical_or_logical_or_icmps_comm3(
2001 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
2002 ; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]
2003 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
2004 ; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
2005 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
2006 ; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP3]], i1 true, i1 [[C1]]
2007 ; CHECK-NEXT: ret i1 [[OR2]]
2008 ;
2009 %c1 = icmp eq i8 %y, 42
2010 %x.m1 = and i8 %x, 1
2011 %z.shift = shl i8 1, %z
2012 %x.m2 = and i8 %x, %z.shift
2013 %c2 = icmp eq i8 %x.m1, 0
2014 %c3 = icmp eq i8 %x.m2, 0
2015 %or1 = select i1 %c2, i1 true, i1 %c1
2016 %or2 = select i1 %c3, i1 true, i1 %or1
2017 ret i1 %or2
2018 }
2020 define i1 @bitwise_and_logical_and_masked_icmp_asymmetric(i1 %c, i32 %x) {
2021 ; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_asymmetric(
2022 ; CHECK-NEXT: [[X_M2:%.*]] = and i32 [[X:%.*]], 11
2023 ; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[X_M2]], 11
2024 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C2]], i1 [[C:%.*]], i1 false
2025 ; CHECK-NEXT: ret i1 [[AND2]]
2026 ;
2027 %x.m1 = and i32 %x, 255
2028 %c1 = icmp ne i32 %x.m1, 0
2029 %and1 = select i1 %c1, i1 %c, i1 false
2030 %x.m2 = and i32 %x, 11
2031 %c2 = icmp eq i32 %x.m2, 11
2032 %and2 = and i1 %and1, %c2
2033 ret i1 %and2
2034 }
2036 define i1 @bitwise_and_logical_and_masked_icmp_allzeros(i1 %c, i32 %x) {
2037 ; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allzeros(
2038 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
2039 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
2040 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP2]], i1 [[C:%.*]], i1 false
2041 ; CHECK-NEXT: ret i1 [[AND2]]
2042 ;
2043 %x.m1 = and i32 %x, 8
2044 %c1 = icmp eq i32 %x.m1, 0
2045 %and1 = select i1 %c1, i1 %c, i1 false
2046 %x.m2 = and i32 %x, 7
2047 %c2 = icmp eq i32 %x.m2, 0
2048 %and2 = and i1 %and1, %c2
2049 ret i1 %and2
2050 }
2052 define i1 @bitwise_and_logical_and_masked_icmp_allzeros_poison1(i1 %c, i32 %x, i32 %y) {
2053 ; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allzeros_poison1(
2054 ; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[Y:%.*]], 7
2055 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[X:%.*]]
2056 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0
2057 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP3]], i1 [[C:%.*]], i1 false
2058 ; CHECK-NEXT: ret i1 [[AND2]]
2059 ;
2060 %x.m1 = and i32 %x, %y
2061 %c1 = icmp eq i32 %x.m1, 0
2062 %and1 = select i1 %c1, i1 %c, i1 false
2063 %x.m2 = and i32 %x, 7
2064 %c2 = icmp eq i32 %x.m2, 0
2065 %and2 = and i1 %and1, %c2
2066 ret i1 %and2
2067 }
2069 define i1 @bitwise_and_logical_and_masked_icmp_allzeros_poison2(i1 %c, i32 %x, i32 %y) {
2070 ; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allzeros_poison2(
2071 ; CHECK-NEXT: [[X_M1:%.*]] = and i32 [[X:%.*]], 8
2072 ; CHECK-NEXT: [[C1:%.*]] = icmp eq i32 [[X_M1]], 0
2073 ; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C1]], i1 [[C:%.*]], i1 false
2074 ; CHECK-NEXT: [[X_M2:%.*]] = and i32 [[X]], [[Y:%.*]]
2075 ; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[X_M2]], 0
2076 ; CHECK-NEXT: [[AND2:%.*]] = and i1 [[AND1]], [[C2]]
2077 ; CHECK-NEXT: ret i1 [[AND2]]
2078 ;
2079 %x.m1 = and i32 %x, 8
2080 %c1 = icmp eq i32 %x.m1, 0
2081 %and1 = select i1 %c1, i1 %c, i1 false
2082 %x.m2 = and i32 %x, %y
2083 %c2 = icmp eq i32 %x.m2, 0
2084 %and2 = and i1 %and1, %c2
2085 ret i1 %and2
2086 }
2088 define i1 @bitwise_and_logical_and_masked_icmp_allones(i1 %c, i32 %x) {
2089 ; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allones(
2090 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
2091 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 15
2092 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP2]], i1 [[C:%.*]], i1 false
2093 ; CHECK-NEXT: ret i1 [[AND2]]
2094 ;
2095 %x.m1 = and i32 %x, 8
2096 %c1 = icmp eq i32 %x.m1, 8
2097 %and1 = select i1 %c1, i1 %c, i1 false
2098 %x.m2 = and i32 %x, 7
2099 %c2 = icmp eq i32 %x.m2, 7
2100 %and2 = and i1 %and1, %c2
2101 ret i1 %and2
2102 }
2104 define i1 @bitwise_and_logical_and_masked_icmp_allones_poison1(i1 %c, i32 %x, i32 %y) {
2105 ; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allones_poison1(
2106 ; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[Y:%.*]], 7
2107 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[X:%.*]]
2108 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], [[TMP1]]
2109 ; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP3]], i1 [[C:%.*]], i1 false
2110 ; CHECK-NEXT: ret i1 [[AND2]]
2111 ;
2112 %x.m1 = and i32 %x, %y
2113 %c1 = icmp eq i32 %x.m1, %y
2114 %and1 = select i1 %c1, i1 %c, i1 false
2115 %x.m2 = and i32 %x, 7
2116 %c2 = icmp eq i32 %x.m2, 7
2117 %and2 = and i1 %and1, %c2
2118 ret i1 %and2
2119 }
2121 define i1 @bitwise_and_logical_and_masked_icmp_allones_poison2(i1 %c, i32 %x, i32 %y) {
2122 ; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allones_poison2(
2123 ; CHECK-NEXT: [[X_M1:%.*]] = and i32 [[X:%.*]], 8
2124 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i32 [[X_M1]], 0
2125 ; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C1]], i1 [[C:%.*]], i1 false
2126 ; CHECK-NEXT: [[X_M2:%.*]] = and i32 [[X]], [[Y:%.*]]
2127 ; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[X_M2]], [[Y]]
2128 ; CHECK-NEXT: [[AND2:%.*]] = and i1 [[AND1]], [[C2]]
2129 ; CHECK-NEXT: ret i1 [[AND2]]
2130 ;
2131 %x.m1 = and i32 %x, 8
2132 %c1 = icmp eq i32 %x.m1, 8
2133 %and1 = select i1 %c1, i1 %c, i1 false
2134 %x.m2 = and i32 %x, %y
2135 %c2 = icmp eq i32 %x.m2, %y
2136 %and2 = and i1 %and1, %c2
2137 ret i1 %and2
2138 }
2140 define i1 @samesign(i32 %x, i32 %y) {
2141 ; CHECK-LABEL: @samesign(
2142 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
2143 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -1
2144 ; CHECK-NEXT: ret i1 [[R]]
2145 ;
2146 %a = and i32 %x, %y
2147 %lt = icmp slt i32 %a, 0
2148 %o = or i32 %x, %y
2149 %gt = icmp sgt i32 %o, -1
2150 %r = or i1 %lt, %gt
2151 ret i1 %r
2152 }
2154 define <2 x i1> @samesign_different_sign_bittest1(<2 x i32> %x, <2 x i32> %y) {
2155 ; CHECK-LABEL: @samesign_different_sign_bittest1(
2156 ; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X:%.*]], [[Y:%.*]]
2157 ; CHECK-NEXT: [[R:%.*]] = icmp sgt <2 x i32> [[TMP1]], <i32 -1, i32 -1>
2158 ; CHECK-NEXT: ret <2 x i1> [[R]]
2159 ;
2160 %a = and <2 x i32> %x, %y
2161 %lt = icmp sle <2 x i32> %a, <i32 -1, i32 -1>
2162 %o = or <2 x i32> %x, %y
2163 %gt = icmp sgt <2 x i32> %o, <i32 -1, i32 -1>
2164 %r = or <2 x i1> %lt, %gt
2165 ret <2 x i1> %r
2166 }
2168 define i1 @samesign_different_sign_bittest2(i32 %x, i32 %y) {
2169 ; CHECK-LABEL: @samesign_different_sign_bittest2(
2170 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
2171 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -1
2172 ; CHECK-NEXT: ret i1 [[R]]
2173 ;
2174 %a = and i32 %x, %y
2175 %lt = icmp slt i32 %a, 0
2176 %o = or i32 %x, %y
2177 %gt = icmp sge i32 %o, 0
2178 %r = or i1 %lt, %gt
2179 ret i1 %r
2180 }
2182 define i1 @samesign_commute1(i32 %x, i32 %y) {
2183 ; CHECK-LABEL: @samesign_commute1(
2184 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
2185 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -1
2186 ; CHECK-NEXT: ret i1 [[R]]
2187 ;
2188 %a = and i32 %x, %y
2189 %lt = icmp slt i32 %a, 0
2190 %o = or i32 %x, %y
2191 %gt = icmp sgt i32 %o, -1
2192 %r = or i1 %gt, %lt ; compares swapped
2193 ret i1 %r
2194 }
2196 define i1 @samesign_commute2(i32 %x, i32 %y) {
2197 ; CHECK-LABEL: @samesign_commute2(
2198 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
2199 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -1
2200 ; CHECK-NEXT: ret i1 [[R]]
2201 ;
2202 %a = and i32 %x, %y
2203 %lt = icmp slt i32 %a, 0
2204 %o = or i32 %y, %x ; inputs commuted
2205 %gt = icmp sgt i32 %o, -1
2206 %r = or i1 %lt, %gt
2207 ret i1 %r
2208 }
2210 define i1 @samesign_commute3(i32 %x, i32 %y) {
2211 ; CHECK-LABEL: @samesign_commute3(
2212 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
2213 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -1
2214 ; CHECK-NEXT: ret i1 [[R]]
2215 ;
2216 %a = and i32 %x, %y
2217 %lt = icmp slt i32 %a, 0
2218 %o = or i32 %y, %x ; inputs commuted
2219 %gt = icmp sgt i32 %o, -1
2220 %r = or i1 %gt, %lt ; compares swapped
2221 ret i1 %r
2222 }
2224 define i1 @samesign_violate_constraint1(i32 %x, i32 %y) {
2225 ; CHECK-LABEL: @samesign_violate_constraint1(
2226 ; CHECK-NEXT: [[A:%.*]] = or i32 [[X:%.*]], [[Y:%.*]]
2227 ; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[A]], 0
2228 ; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]
2229 ; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[O]], -1
2230 ; CHECK-NEXT: [[R:%.*]] = and i1 [[LT]], [[GT]]
2231 ; CHECK-NEXT: ret i1 [[R]]
2232 ;
2233 %a = or i32 %x, %y
2234 %lt = icmp slt i32 %a, 0
2235 %o = or i32 %x, %y ; should be an and
2236 %gt = icmp sgt i32 %o, -1
2237 %r = and i1 %lt, %gt
2238 ret i1 %r
2239 }
2241 define i1 @samesign_violate_constraint2(i32 %x, i32 %y) {
2242 ; CHECK-LABEL: @samesign_violate_constraint2(
2243 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
2244 ; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[A]], 0
2245 ; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]
2246 ; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[O]], -1
2247 ; CHECK-NEXT: [[R:%.*]] = and i1 [[LT]], [[GT]]
2248 ; CHECK-NEXT: ret i1 [[R]]
2249 ;
2250 %a = and i32 %x, %y
2251 %lt = icmp slt i32 %a, 0
2252 %o = or i32 %x, %y
2253 %gt = icmp sgt i32 %o, -1
2254 %r = and i1 %lt, %gt ; should be or
2255 ret i1 %r
2256 }
2258 define i1 @samesign_mult_use(i32 %x, i32 %y) {
2259 ; CHECK-LABEL: @samesign_mult_use(
2260 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
2261 ; CHECK-NEXT: call void @use32(i32 [[A]])
2262 ; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]
2263 ; CHECK-NEXT: call void @use32(i32 [[O]])
2264 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X]], [[Y]]
2265 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -1
2266 ; CHECK-NEXT: ret i1 [[R]]
2267 ;
2268 %a = and i32 %x, %y
2269 call void @use32(i32 %a)
2270 %lt = icmp slt i32 %a, 0
2271 %o = or i32 %x, %y
2272 call void @use32(i32 %o)
2273 %gt = icmp sgt i32 %o, -1
2274 %r = or i1 %lt, %gt
2275 ret i1 %r
2276 }
2278 define i1 @samesign_mult_use2(i32 %x, i32 %y) {
2279 ; CHECK-LABEL: @samesign_mult_use2(
2280 ; CHECK-NEXT: [[O:%.*]] = or i32 [[X:%.*]], [[Y:%.*]]
2281 ; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[O]], -1
2282 ; CHECK-NEXT: call void @use(i1 [[GT]])
2283 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X]], [[Y]]
2284 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -1
2285 ; CHECK-NEXT: ret i1 [[R]]
2286 ;
2287 %a = and i32 %x, %y
2288 %lt = icmp slt i32 %a, 0
2289 %o = or i32 %x, %y
2290 %gt = icmp sgt i32 %o, -1
2291 call void @use(i1 %gt)
2292 %r = or i1 %lt, %gt
2293 ret i1 %r
2294 }
2296 define i1 @samesign_mult_use3(i32 %x, i32 %y) {
2297 ; CHECK-LABEL: @samesign_mult_use3(
2298 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
2299 ; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[A]], 0
2300 ; CHECK-NEXT: call void @use(i1 [[LT]])
2301 ; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]
2302 ; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[O]], -1
2303 ; CHECK-NEXT: call void @use(i1 [[GT]])
2304 ; CHECK-NEXT: [[R:%.*]] = or i1 [[LT]], [[GT]]
2305 ; CHECK-NEXT: ret i1 [[R]]
2306 ;
2307 %a = and i32 %x, %y
2308 %lt = icmp slt i32 %a, 0
2309 call void @use(i1 %lt)
2310 %o = or i32 %x, %y
2311 %gt = icmp sgt i32 %o, -1
2312 call void @use(i1 %gt)
2313 %r = or i1 %lt, %gt
2314 ret i1 %r
2315 }
2317 define i1 @samesign_wrong_cmp(i32 %x, i32 %y) {
2318 ; CHECK-LABEL: @samesign_wrong_cmp(
2319 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
2320 ; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[A]], 1
2321 ; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]
2322 ; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[O]], -1
2323 ; CHECK-NEXT: [[R:%.*]] = and i1 [[LT]], [[GT]]
2324 ; CHECK-NEXT: ret i1 [[R]]
2325 ;
2326 %a = and i32 %x, %y
2327 %lt = icmp slt i32 %a, 1 ; not a sign-bit test
2328 %o = or i32 %x, %y
2329 %gt = icmp sgt i32 %o, -1
2330 %r = and i1 %lt, %gt
2331 ret i1 %r
2332 }
2334 define i1 @samesign_inverted(i32 %x, i32 %y) {
2335 ; CHECK-LABEL: @samesign_inverted(
2336 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
2337 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 0
2338 ; CHECK-NEXT: ret i1 [[R]]
2339 ;
2340 %a = and i32 %x, %y
2341 %gt = icmp sgt i32 %a, -1
2342 %o = or i32 %x, %y
2343 %lt = icmp slt i32 %o, 0
2344 %r = and i1 %gt, %lt
2345 ret i1 %r
2346 }
2348 define i1 @samesign_inverted_different_sign_bittest1(i32 %x, i32 %y) {
2349 ; CHECK-LABEL: @samesign_inverted_different_sign_bittest1(
2350 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
2351 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 0
2352 ; CHECK-NEXT: ret i1 [[R]]
2353 ;
2354 %a = and i32 %x, %y
2355 %gt = icmp sge i32 %a, 0
2356 %o = or i32 %x, %y
2357 %lt = icmp slt i32 %o, 0
2358 %r = and i1 %gt, %lt
2359 ret i1 %r
2360 }
2362 define i1 @samesign_inverted_different_sign_bittest2(i32 %x, i32 %y) {
2363 ; CHECK-LABEL: @samesign_inverted_different_sign_bittest2(
2364 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
2365 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 0
2366 ; CHECK-NEXT: ret i1 [[R]]
2367 ;
2368 %a = and i32 %x, %y
2369 %gt = icmp sgt i32 %a, -1
2370 %o = or i32 %x, %y
2371 %lt = icmp sle i32 %o, -1
2372 %r = and i1 %gt, %lt
2373 ret i1 %r
2374 }
2376 define i1 @samesign_inverted_commute1(i32 %x, i32 %y) {
2377 ; CHECK-LABEL: @samesign_inverted_commute1(
2378 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
2379 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 0
2380 ; CHECK-NEXT: ret i1 [[R]]
2381 ;
2382 %a = and i32 %x, %y
2383 %gt = icmp sgt i32 %a, -1
2384 %o = or i32 %x, %y
2385 %lt = icmp slt i32 %o, 0
2386 %r = and i1 %lt, %gt ; compares swapped
2387 ret i1 %r
2388 }
2390 define i1 @samesign_inverted_commute2(i32 %x, i32 %y) {
2391 ; CHECK-LABEL: @samesign_inverted_commute2(
2392 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
2393 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 0
2394 ; CHECK-NEXT: ret i1 [[R]]
2395 ;
2396 %a = and i32 %x, %y
2397 %gt = icmp sgt i32 %a, -1
2398 %o = or i32 %y, %x ; source values are commuted
2399 %lt = icmp slt i32 %o, 0
2400 %r = and i1 %gt, %lt
2401 ret i1 %r
2402 }
2404 define i1 @samesign_inverted_commute3(i32 %x, i32 %y) {
2405 ; CHECK-LABEL: @samesign_inverted_commute3(
2406 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
2407 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 0
2408 ; CHECK-NEXT: ret i1 [[R]]
2409 ;
2410 %a = and i32 %x, %y
2411 %gt = icmp sgt i32 %a, -1
2412 %o = or i32 %y, %x ; source values commuted
2413 %lt = icmp slt i32 %o, 0
2414 %r = and i1 %lt, %gt ; compares swapped
2415 ret i1 %r
2416 }
2418 define i1 @samesign_inverted_violate_constraint1(i32 %x, i32 %y) {
2419 ; CHECK-LABEL: @samesign_inverted_violate_constraint1(
2420 ; CHECK-NEXT: [[A:%.*]] = or i32 [[X:%.*]], [[Y:%.*]]
2421 ; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[A]], -1
2422 ; CHECK-NEXT: [[O:%.*]] = and i32 [[X]], [[Y]]
2423 ; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[O]], 0
2424 ; CHECK-NEXT: [[R:%.*]] = and i1 [[GT]], [[LT]]
2425 ; CHECK-NEXT: ret i1 [[R]]
2426 ;
2427 %a = or i32 %x, %y ; should be and here
2428 %gt = icmp sgt i32 %a, -1
2429 %o = and i32 %x, %y ; should be or here
2430 %lt = icmp slt i32 %o, 0
2431 %r = and i1 %gt, %lt
2432 ret i1 %r
2433 }
2434 define i1 @samesign_inverted_violate_constraint2(i32 %x, i32 %y) {
2435 ; CHECK-LABEL: @samesign_inverted_violate_constraint2(
2436 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
2437 ; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[A]], -1
2438 ; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]
2439 ; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[O]], 0
2440 ; CHECK-NEXT: [[R:%.*]] = or i1 [[GT]], [[LT]]
2441 ; CHECK-NEXT: ret i1 [[R]]
2442 ;
2443 %a = and i32 %x, %y
2444 %gt = icmp sgt i32 %a, -1
2445 %o = or i32 %x, %y
2446 %lt = icmp slt i32 %o, 0
2447 %r = or i1 %gt, %lt ; should be and here
2448 ret i1 %r
2449 }
2451 define i1 @samesign_inverted_mult_use(i32 %x, i32 %y) {
2452 ; CHECK-LABEL: @samesign_inverted_mult_use(
2453 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
2454 ; CHECK-NEXT: call void @use32(i32 [[A]])
2455 ; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]
2456 ; CHECK-NEXT: call void @use32(i32 [[O]])
2457 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X]], [[Y]]
2458 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 0
2459 ; CHECK-NEXT: ret i1 [[R]]
2460 ;
2461 %a = and i32 %x, %y
2462 call void @use32(i32 %a)
2463 %gt = icmp sgt i32 %a, -1
2464 %o = or i32 %x, %y
2465 call void @use32(i32 %o)
2466 %lt = icmp slt i32 %o, 0
2467 %r = and i1 %gt, %lt
2468 ret i1 %r
2469 }
2471 define i1 @samesign_inverted_mult_use2(i32 %x, i32 %y) {
2472 ; CHECK-LABEL: @samesign_inverted_mult_use2(
2473 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
2474 ; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[A]], -1
2475 ; CHECK-NEXT: call void @use(i1 [[GT]])
2476 ; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]
2477 ; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[O]], 0
2478 ; CHECK-NEXT: call void @use(i1 [[LT]])
2479 ; CHECK-NEXT: [[R:%.*]] = and i1 [[GT]], [[LT]]
2480 ; CHECK-NEXT: ret i1 [[R]]
2481 ;
2482 %a = and i32 %x, %y
2483 %gt = icmp sgt i32 %a, -1
2484 call void @use(i1 %gt)
2485 %o = or i32 %x, %y
2486 %lt = icmp slt i32 %o, 0
2487 call void @use(i1 %lt)
2488 %r = and i1 %gt, %lt
2489 ret i1 %r
2490 }
2492 define i1 @samesign_inverted_wrong_cmp(i32 %x, i32 %y) {
2493 ; CHECK-LABEL: @samesign_inverted_wrong_cmp(
2494 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
2495 ; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[A]], 0
2496 ; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]
2497 ; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[O]], 0
2498 ; CHECK-NEXT: [[R:%.*]] = and i1 [[GT]], [[LT]]
2499 ; CHECK-NEXT: ret i1 [[R]]
2500 ;
2501 %a = and i32 %x, %y
2502 %gt = icmp sgt i32 %a, 0 ; not a sign-bit test
2503 %o = or i32 %x, %y
2504 %lt = icmp slt i32 %o, 0
2505 %r = and i1 %gt, %lt
2506 ret i1 %r
2507 }
2509 define <2 x i1> @icmp_eq_m1_and_eq_m1(<2 x i8> %x, <2 x i8> %y) {
2510 ; CHECK-LABEL: @icmp_eq_m1_and_eq_m1(
2511 ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], [[Y:%.*]]
2512 ; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 -1, i8 -1>
2513 ; CHECK-NEXT: ret <2 x i1> [[R]]
2514 ;
2515 %rx = icmp eq <2 x i8> %x, <i8 -1, i8 poison>
2516 %ry = icmp eq <2 x i8> %y, <i8 -1, i8 poison>
2517 %r = and <2 x i1> %rx, %ry
2518 ret <2 x i1> %r
2519 }
2521 define <2 x i1> @icmp_eq_m1_and_eq_poison_m1(<2 x i8> %x, <2 x i8> %y) {
2522 ; CHECK-LABEL: @icmp_eq_m1_and_eq_poison_m1(
2523 ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], [[Y:%.*]]
2524 ; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 -1, i8 -1>
2525 ; CHECK-NEXT: ret <2 x i1> [[R]]
2526 ;
2527 %rx = icmp eq <2 x i8> %x, <i8 -1, i8 poison>
2528 %ry = icmp eq <2 x i8> %y, <i8 poison, i8 -1>
2529 %r = and <2 x i1> %rx, %ry
2530 ret <2 x i1> %r
2531 }
2533 define <2 x i1> @icmp_eq_poison_and_eq_m1_m2(<2 x i8> %x, <2 x i8> %y) {
2534 ; CHECK-LABEL: @icmp_eq_poison_and_eq_m1_m2(
2535 ; CHECK-NEXT: ret <2 x i1> poison
2536 ;
2537 %rx = icmp eq <2 x i8> %x, <i8 poison, i8 poison>
2538 %ry = icmp eq <2 x i8> %y, <i8 -1, i8 -2>
2539 %r = and <2 x i1> %rx, %ry
2540 ret <2 x i1> %r
2541 }
2543 define <2 x i1> @icmp_ne_m1_and_ne_m1_fail(<2 x i8> %x, <2 x i8> %y) {
2544 ; CHECK-LABEL: @icmp_ne_m1_and_ne_m1_fail(
2545 ; CHECK-NEXT: [[RX:%.*]] = icmp ne <2 x i8> [[X:%.*]], <i8 -1, i8 poison>
2546 ; CHECK-NEXT: [[RY:%.*]] = icmp ne <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>
2547 ; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[RX]], [[RY]]
2548 ; CHECK-NEXT: ret <2 x i1> [[R]]
2549 ;
2550 %rx = icmp ne <2 x i8> %x, <i8 -1, i8 poison>
2551 %ry = icmp ne <2 x i8> %y, <i8 -1, i8 poison>
2552 %r = and <2 x i1> %rx, %ry
2553 ret <2 x i1> %r
2554 }
2557 define <2 x i1> @icmp_eq_m1_or_eq_m1_fail(<2 x i8> %x, <2 x i8> %y) {
2558 ; CHECK-LABEL: @icmp_eq_m1_or_eq_m1_fail(
2559 ; CHECK-NEXT: [[RX:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 -1, i8 poison>
2560 ; CHECK-NEXT: [[RY:%.*]] = icmp eq <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>
2561 ; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[RX]], [[RY]]
2562 ; CHECK-NEXT: ret <2 x i1> [[R]]
2563 ;
2564 %rx = icmp eq <2 x i8> %x, <i8 -1, i8 poison>
2565 %ry = icmp eq <2 x i8> %y, <i8 -1, i8 poison>
2566 %r = or <2 x i1> %rx, %ry
2567 ret <2 x i1> %r
2568 }
2571 define <2 x i1> @icmp_ne_m1_or_ne_m1(<2 x i8> %x, <2 x i8> %y) {
2572 ; CHECK-LABEL: @icmp_ne_m1_or_ne_m1(
2573 ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], [[Y:%.*]]
2574 ; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[TMP1]], <i8 -1, i8 -1>
2575 ; CHECK-NEXT: ret <2 x i1> [[R]]
2576 ;
2577 %rx = icmp ne <2 x i8> %x, <i8 -1, i8 -1>
2578 %ry = icmp ne <2 x i8> %y, <i8 -1, i8 poison>
2579 %r = or <2 x i1> %rx, %ry
2580 ret <2 x i1> %r
2581 }
2583 define i32 @icmp_slt_0_or_icmp_sgt_0_i32(i32 %x) {
2584 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i32(
2585 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[X:%.*]], 0
2586 ; CHECK-NEXT: [[E:%.*]] = zext i1 [[TMP1]] to i32
2587 ; CHECK-NEXT: ret i32 [[E]]
2588 ;
2589 %A = icmp slt i32 %x, 0
2590 %B = icmp sgt i32 %x, 0
2591 %C = zext i1 %A to i32
2592 %D = zext i1 %B to i32
2593 %E = or i32 %C, %D
2594 ret i32 %E
2595 }
2597 define i64 @icmp_slt_0_or_icmp_sgt_0_i64(i64 %x) {
2598 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64(
2599 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[X:%.*]], 0
2600 ; CHECK-NEXT: [[E:%.*]] = zext i1 [[TMP1]] to i64
2601 ; CHECK-NEXT: ret i64 [[E]]
2602 ;
2603 %A = icmp slt i64 %x, 0
2604 %B = icmp sgt i64 %x, 0
2605 %C = zext i1 %A to i64
2606 %D = zext i1 %B to i64
2607 %E = or i64 %C, %D
2608 ret i64 %E
2609 }
2611 define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail0(i64 %x) {
2612 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail0(
2613 ; CHECK-NEXT: [[E:%.*]] = lshr i64 [[X:%.*]], 63
2614 ; CHECK-NEXT: ret i64 [[E]]
2615 ;
2616 %B = icmp slt i64 %x, 0
2617 %C = lshr i64 %x, 63
2618 %D = zext i1 %B to i64
2619 %E = or i64 %C, %D
2620 ret i64 %E
2621 }
2623 define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail1(i64 %x) {
2624 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail1(
2625 ; CHECK-NEXT: [[B:%.*]] = icmp sgt i64 [[X:%.*]], 0
2626 ; CHECK-NEXT: [[C:%.*]] = ashr i64 [[X]], 63
2627 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[B]] to i64
2628 ; CHECK-NEXT: [[E:%.*]] = or i64 [[C]], [[D]]
2629 ; CHECK-NEXT: ret i64 [[E]]
2630 ;
2631 %B = icmp sgt i64 %x, 0
2632 %C = ashr i64 %x, 63
2633 %D = zext i1 %B to i64
2634 %E = or i64 %C, %D
2635 ret i64 %E
2636 }
2638 define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail2(i64 %x) {
2639 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail2(
2640 ; CHECK-NEXT: [[B:%.*]] = icmp sgt i64 [[X:%.*]], 0
2641 ; CHECK-NEXT: [[C:%.*]] = lshr i64 [[X]], 62
2642 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[B]] to i64
2643 ; CHECK-NEXT: [[E:%.*]] = or i64 [[C]], [[D]]
2644 ; CHECK-NEXT: ret i64 [[E]]
2645 ;
2646 %B = icmp sgt i64 %x, 0
2647 %C = lshr i64 %x, 62
2648 %D = zext i1 %B to i64
2649 %E = or i64 %C, %D
2650 ret i64 %E
2651 }
2653 define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail3(i64 %x) {
2654 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail3(
2655 ; CHECK-NEXT: [[C:%.*]] = ashr i64 [[X:%.*]], 62
2656 ; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i64 [[X]], 63
2657 ; CHECK-NEXT: [[E:%.*]] = or i64 [[C]], [[X_LOBIT]]
2658 ; CHECK-NEXT: ret i64 [[E]]
2659 ;
2660 %B = icmp slt i64 %x, 0
2661 %C = ashr i64 %x, 62
2662 %D = zext i1 %B to i64
2663 %E = or i64 %C, %D
2664 ret i64 %E
2665 }
2667 define <2 x i64> @icmp_slt_0_or_icmp_sgt_0_i64x2(<2 x i64> %x) {
2668 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64x2(
2669 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i64> [[X:%.*]], zeroinitializer
2670 ; CHECK-NEXT: [[E:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i64>
2671 ; CHECK-NEXT: ret <2 x i64> [[E]]
2672 ;
2673 %A = icmp slt <2 x i64> %x, <i64 0,i64 0>
2674 %B = icmp sgt <2 x i64> %x, <i64 0,i64 0>
2675 %C = zext <2 x i1> %A to <2 x i64>
2676 %D = zext <2 x i1> %B to <2 x i64>
2677 %E = or <2 x i64> %C, %D
2678 ret <2 x i64> %E
2679 }
2681 define <2 x i64> @icmp_slt_0_or_icmp_sgt_0_i64x2_fail(<2 x i64> %x) {
2682 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64x2_fail(
2683 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i64> [[X:%.*]], <i64 1, i64 1>
2684 ; CHECK-NEXT: [[E:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i64>
2685 ; CHECK-NEXT: ret <2 x i64> [[E]]
2686 ;
2687 %B = icmp sgt <2 x i64> %x, <i64 1, i64 1>
2688 %C = lshr <2 x i64> %x, <i64 63, i64 63>
2689 %D = zext <2 x i1> %B to <2 x i64>
2690 %E = or <2 x i64> %C, %D
2691 ret <2 x i64> %E
2693 }
2695 define i32 @icmp_slt_0_and_icmp_sge_neg1_i32(i32 %x) {
2696 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg1_i32(
2697 ; CHECK-NEXT: ret i32 0
2698 ;
2699 %A = icmp sgt i32 %x, -1
2700 %B = zext i1 %A to i32
2701 %C = lshr i32 %x, 31
2702 %D = and i32 %C, %B
2703 ret i32 %D
2704 }
2706 define i32 @icmp_slt_0_or_icmp_sge_neg1_i32(i32 %x) {
2707 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sge_neg1_i32(
2708 ; CHECK-NEXT: ret i32 1
2709 ;
2710 %A = icmp sge i32 %x, -1
2711 %B = zext i1 %A to i32
2712 %C = lshr i32 %x, 31
2713 %D = or i32 %C, %B
2714 ret i32 %D
2715 }
2717 define i32 @icmp_slt_0_or_icmp_sge_100_i32(i32 %x) {
2718 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sge_100_i32(
2719 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], 99
2720 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i32
2721 ; CHECK-NEXT: ret i32 [[D]]
2722 ;
2723 %A = icmp sge i32 %x, 100
2724 %B = zext i1 %A to i32
2725 %C = lshr i32 %x, 31
2726 %D = or i32 %C, %B
2727 ret i32 %D
2728 }
2730 define i64 @icmp_slt_0_and_icmp_sge_neg1_i64(i64 %x) {
2731 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg1_i64(
2732 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[X:%.*]], -1
2733 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i64
2734 ; CHECK-NEXT: ret i64 [[D]]
2735 ;
2736 %A = icmp sge i64 %x, -1
2737 %B = zext i1 %A to i64
2738 %C = lshr i64 %x, 63
2739 %D = and i64 %C, %B
2740 ret i64 %D
2741 }
2743 define i64 @icmp_slt_0_and_icmp_sge_neg2_i64(i64 %x) {
2744 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg2_i64(
2745 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i64 [[X:%.*]], -3
2746 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i64
2747 ; CHECK-NEXT: ret i64 [[D]]
2748 ;
2749 %A = icmp sge i64 %x, -2
2750 %B = zext i1 %A to i64
2751 %C = lshr i64 %x, 63
2752 %D = and i64 %C, %B
2753 ret i64 %D
2754 }
2756 define i64 @ashr_and_icmp_sge_neg1_i64(i64 %x) {
2757 ; CHECK-LABEL: @ashr_and_icmp_sge_neg1_i64(
2758 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[X:%.*]], -1
2759 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i64
2760 ; CHECK-NEXT: ret i64 [[D]]
2761 ;
2762 %A = icmp sge i64 %x, -1
2763 %B = zext i1 %A to i64
2764 %C = ashr i64 %x, 63
2765 %D = and i64 %C, %B
2766 ret i64 %D
2767 }
2769 define i64 @icmp_slt_0_and_icmp_sgt_neg1_i64(i64 %x) {
2770 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sgt_neg1_i64(
2771 ; CHECK-NEXT: ret i64 0
2772 ;
2773 %A = icmp sgt i64 %x, -1
2774 %B = zext i1 %A to i64
2775 %C = lshr i64 %x, 63
2776 %D = and i64 %C, %B
2777 ret i64 %D
2778 }
2780 define i64 @icmp_slt_0_and_icmp_sge_neg1_i64_fail(i64 %x) {
2781 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg1_i64_fail(
2782 ; CHECK-NEXT: [[A:%.*]] = icmp sgt i64 [[X:%.*]], -2
2783 ; CHECK-NEXT: [[C:%.*]] = lshr i64 [[X]], 62
2784 ; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[C]], 1
2785 ; CHECK-NEXT: [[D:%.*]] = select i1 [[A]], i64 [[TMP1]], i64 0
2786 ; CHECK-NEXT: ret i64 [[D]]
2787 ;
2788 %A = icmp sge i64 %x, -1
2789 %B = zext i1 %A to i64
2790 %C = lshr i64 %x, 62
2791 %D = and i64 %C, %B
2792 ret i64 %D
2793 }
2795 define <2 x i32> @icmp_slt_0_and_icmp_sge_neg1_i32x2(<2 x i32> %x) {
2796 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg1_i32x2(
2797 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[X:%.*]], <i32 -1, i32 -1>
2798 ; CHECK-NEXT: [[D:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32>
2799 ; CHECK-NEXT: ret <2 x i32> [[D]]
2800 ;
2801 %A = icmp sge <2 x i32> %x, <i32 -1, i32 -1>
2802 %B = zext <2 x i1> %A to <2 x i32>
2803 %C = lshr <2 x i32> %x, <i32 31, i32 31>
2804 %D = and <2 x i32> %C, %B
2805 ret <2 x i32> %D
2806 }
2808 define <2 x i32> @icmp_slt_0_and_icmp_sge_neg2_i32x2(<2 x i32> %x) {
2809 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg2_i32x2(
2810 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i32> [[X:%.*]], <i32 -3, i32 -3>
2811 ; CHECK-NEXT: [[D:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32>
2812 ; CHECK-NEXT: ret <2 x i32> [[D]]
2813 ;
2814 %A = icmp sge <2 x i32> %x, <i32 -2, i32 -2>
2815 %B = zext <2 x i1> %A to <2 x i32>
2816 %C = lshr <2 x i32> %x, <i32 31, i32 31>
2817 %D = and <2 x i32> %C, %B
2818 ret <2 x i32> %D
2819 }
2822 define i32 @icmp_x_slt_0_xor_icmp_y_sgt_neg1_i32(i32 %x, i32 %y) {
2823 ; CHECK-LABEL: @icmp_x_slt_0_xor_icmp_y_sgt_neg1_i32(
2824 ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
2825 ; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], -1
2826 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i32
2827 ; CHECK-NEXT: ret i32 [[D]]
2828 ;
2829 %A = icmp sgt i32 %x, -1
2830 %B = zext i1 %A to i32
2831 %C = lshr i32 %y, 31
2832 %D = xor i32 %C, %B
2833 ret i32 %D
2834 }
2836 define i32 @icmp_slt_0_xor_icmp_sgt_neg2_i32(i32 %x) {
2837 ; CHECK-LABEL: @icmp_slt_0_xor_icmp_sgt_neg2_i32(
2838 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[X:%.*]], -1
2839 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i32
2840 ; CHECK-NEXT: ret i32 [[D]]
2841 ;
2842 %A = icmp sgt i32 %x, -2
2843 %B = zext i1 %A to i32
2844 %C = lshr i32 %x, 31
2845 %D = xor i32 %C, %B
2846 ret i32 %D
2847 }
2849 define i32 @icmp_slt_0_and_icmp_sge_neg1_i32_multiuse0(i32 %x) {
2850 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg1_i32_multiuse0(
2851 ; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -3
2852 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X]], -3
2853 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i32
2854 ; CHECK-NEXT: call void @use(i1 [[A]])
2855 ; CHECK-NEXT: ret i32 [[D]]
2856 ;
2857 %A = icmp sge i32 %x, -2
2858 %B = zext i1 %A to i32
2859 %C = lshr i32 %x, 31
2860 %D = and i32 %C, %B
2861 call void @use(i1 %A)
2862 ret i32 %D
2863 }
2865 define i32 @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse1(i32 %x) {
2866 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse1(
2867 ; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -3
2868 ; CHECK-NEXT: [[B:%.*]] = zext i1 [[A]] to i32
2869 ; CHECK-NEXT: [[C:%.*]] = lshr i32 [[X]], 31
2870 ; CHECK-NEXT: [[D:%.*]] = and i32 [[C]], [[B]]
2871 ; CHECK-NEXT: call void @use32(i32 [[B]])
2872 ; CHECK-NEXT: ret i32 [[D]]
2873 ;
2874 %A = icmp sge i32 %x, -2
2875 %B = zext i1 %A to i32
2876 %C = lshr i32 %x, 31
2877 %D = and i32 %C, %B
2878 call void @use32(i32 %B)
2879 ret i32 %D
2880 }
2882 define i32 @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse2(i32 %x) {
2883 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse2(
2884 ; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -3
2885 ; CHECK-NEXT: [[C:%.*]] = lshr i32 [[X]], 31
2886 ; CHECK-NEXT: [[D:%.*]] = select i1 [[A]], i32 [[C]], i32 0
2887 ; CHECK-NEXT: call void @use32(i32 [[C]])
2888 ; CHECK-NEXT: ret i32 [[D]]
2889 ;
2890 %A = icmp sge i32 %x, -2
2891 %B = zext i1 %A to i32
2892 %C = lshr i32 %x, 31
2893 %D = and i32 %C, %B
2894 call void @use32(i32 %C)
2895 ret i32 %D
2896 }
2898 define i32 @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse_fail0(i32 %x) {
2899 ; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse_fail0(
2900 ; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -3
2901 ; CHECK-NEXT: [[B:%.*]] = zext i1 [[A]] to i32
2902 ; CHECK-NEXT: [[C:%.*]] = lshr i32 [[X]], 31
2903 ; CHECK-NEXT: [[D:%.*]] = and i32 [[C]], [[B]]
2904 ; CHECK-NEXT: call void @use32(i32 [[B]])
2905 ; CHECK-NEXT: call void @use32(i32 [[C]])
2906 ; CHECK-NEXT: ret i32 [[D]]
2907 ;
2908 %A = icmp sge i32 %x, -2
2909 %B = zext i1 %A to i32
2910 %C = lshr i32 %x, 31
2911 %D = and i32 %C, %B
2912 call void @use32(i32 %B)
2913 call void @use32(i32 %C)
2914 ret i32 %D
2915 }
2917 define i32 @icmp_slt_0_or_icmp_eq_100_i32_multiuse_fail1(i32 %x) {
2918 ; CHECK-LABEL: @icmp_slt_0_or_icmp_eq_100_i32_multiuse_fail1(
2919 ; CHECK-NEXT: [[A:%.*]] = icmp eq i32 [[X:%.*]], 100
2920 ; CHECK-NEXT: [[B:%.*]] = zext i1 [[A]] to i32
2921 ; CHECK-NEXT: [[C:%.*]] = lshr i32 [[X]], 31
2922 ; CHECK-NEXT: [[D:%.*]] = or i32 [[C]], [[B]]
2923 ; CHECK-NEXT: call void @use32(i32 [[C]])
2924 ; CHECK-NEXT: ret i32 [[D]]
2925 ;
2926 %A = icmp eq i32 %x, 100
2927 %B = zext i1 %A to i32
2928 %C = lshr i32 %x, 31
2929 %D = or i32 %C, %B
2930 call void @use32(i32 %C)
2931 ret i32 %D
2932 }
2934 define i32 @icmp_x_slt_0_and_icmp_y_ne_neg2_i32_multiuse_fail2(i32 %x, i32 %y) {
2935 ; CHECK-LABEL: @icmp_x_slt_0_and_icmp_y_ne_neg2_i32_multiuse_fail2(
2936 ; CHECK-NEXT: [[A_NOT:%.*]] = icmp eq i32 [[X:%.*]], -2
2937 ; CHECK-NEXT: [[C:%.*]] = lshr i32 [[Y:%.*]], 31
2938 ; CHECK-NEXT: [[D:%.*]] = select i1 [[A_NOT]], i32 0, i32 [[C]]
2939 ; CHECK-NEXT: call void @use32(i32 [[C]])
2940 ; CHECK-NEXT: ret i32 [[D]]
2941 ;
2942 %A = icmp ne i32 %x, -2
2943 %B = zext i1 %A to i32
2944 %C = lshr i32 %y, 31
2945 %D = and i32 %C, %B
2946 call void @use32(i32 %C)
2947 ret i32 %D
2948 }
2950 define i32 @icmp_slt_0_or_icmp_eq_100_i32_multiuse_fail3(i32 %x) {
2951 ; CHECK-LABEL: @icmp_slt_0_or_icmp_eq_100_i32_multiuse_fail3(
2952 ; CHECK-NEXT: [[A:%.*]] = icmp eq i32 [[X:%.*]], 100
2953 ; CHECK-NEXT: [[B:%.*]] = zext i1 [[A]] to i32
2954 ; CHECK-NEXT: [[C:%.*]] = lshr i32 [[X]], 31
2955 ; CHECK-NEXT: [[D:%.*]] = or i32 [[C]], [[B]]
2956 ; CHECK-NEXT: call void @use32(i32 [[B]])
2957 ; CHECK-NEXT: ret i32 [[D]]
2958 ;
2959 %A = icmp eq i32 %x, 100
2960 %B = zext i1 %A to i32
2961 %C = lshr i32 %x, 31
2962 %D = or i32 %C, %B
2963 call void @use32(i32 %B)
2964 ret i32 %D
2965 }
2967 define i32 @icmp_slt_0_or_icmp_eq_100_i32_fail(i32 %x) {
2968 ; CHECK-LABEL: @icmp_slt_0_or_icmp_eq_100_i32_fail(
2969 ; CHECK-NEXT: [[A:%.*]] = icmp eq i32 [[X:%.*]], 100
2970 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X]], 0
2971 ; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[TMP1]], [[A]]
2972 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i32
2973 ; CHECK-NEXT: ret i32 [[D]]
2974 ;
2975 %A = icmp eq i32 %x, 100
2976 %B = zext i1 %A to i32
2977 %C = lshr i32 %x, 31
2978 %D = or i32 %C, %B
2979 ret i32 %D
2980 }
2982 define i32 @icmp_slt_0_and_icmp_ne_neg2_i32_fail(i32 %x) {
2983 ; CHECK-LABEL: @icmp_slt_0_and_icmp_ne_neg2_i32_fail(
2984 ; CHECK-NEXT: [[A:%.*]] = icmp ne i32 [[X:%.*]], -2
2985 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X]], 0
2986 ; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[A]]
2987 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i32
2988 ; CHECK-NEXT: ret i32 [[D]]
2989 ;
2990 %A = icmp ne i32 %x, -2
2991 %B = zext i1 %A to i32
2992 %C = lshr i32 %x, 31
2993 %D = and i32 %C, %B
2994 ret i32 %D
2995 }
2997 define i32 @icmp_x_slt_0_and_icmp_y_ne_neg2_i32_fail(i32 %x, i32 %y) {
2998 ; CHECK-LABEL: @icmp_x_slt_0_and_icmp_y_ne_neg2_i32_fail(
2999 ; CHECK-NEXT: [[A:%.*]] = icmp ne i32 [[X:%.*]], -2
3000 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[Y:%.*]], 0
3001 ; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[A]]
3002 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i32
3003 ; CHECK-NEXT: ret i32 [[D]]
3004 ;
3005 %A = icmp ne i32 %x, -2
3006 %B = zext i1 %A to i32
3007 %C = lshr i32 %y, 31
3008 %D = and i32 %C, %B
3009 ret i32 %D
3010 }
3012 define i32 @icmp_x_slt_0_and_icmp_y_sgt_neg1_i32_fail(i32 %x, i32 %y) {
3013 ; CHECK-LABEL: @icmp_x_slt_0_and_icmp_y_sgt_neg1_i32_fail(
3014 ; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -1
3015 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[Y:%.*]], 0
3016 ; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[A]]
3017 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i32
3018 ; CHECK-NEXT: ret i32 [[D]]
3019 ;
3020 %A = icmp sgt i32 %x, -1
3021 %B = zext i1 %A to i32
3022 %C = lshr i32 %y, 31
3023 %D = and i32 %C, %B
3024 ret i32 %D
3025 }
3027 define i32 @icmp_slt_0_xor_icmp_sge_neg2_i32_fail(i32 %x) {
3028 ; CHECK-LABEL: @icmp_slt_0_xor_icmp_sge_neg2_i32_fail(
3029 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], -2
3030 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i32
3031 ; CHECK-NEXT: ret i32 [[D]]
3032 ;
3033 %A = icmp sge i32 %x, -2
3034 %B = zext i1 %A to i32
3035 %C = lshr i32 %x, 31
3036 %D = xor i32 %C, %B
3037 ret i32 %D
3038 }
3040 define i32 @icmp_slt_0_or_icmp_add_1_sge_100_i32_fail(i32 %x) {
3041 ; CHECK-LABEL: @icmp_slt_0_or_icmp_add_1_sge_100_i32_fail(
3042 ; CHECK-NEXT: [[X1:%.*]] = add i32 [[X:%.*]], 1
3043 ; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X1]], 99
3044 ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X]], 0
3045 ; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[TMP1]], [[A]]
3046 ; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i32
3047 ; CHECK-NEXT: ret i32 [[D]]
3048 ;
3049 %X1 = add i32 %x, 1
3050 %A = icmp sge i32 %X1, 100
3051 %B = zext i1 %A to i32
3052 %C = lshr i32 %x, 31
3053 %D = or i32 %C, %B
3054 ret i32 %D
3055 }
3057 define i1 @logical_and_icmps1(i32 %a, i1 %other_cond) {
3058 ; CHECK-LABEL: @logical_and_icmps1(
3059 ; CHECK-NEXT: entry:
3060 ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[A:%.*]], 10086
3061 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[OTHER_COND:%.*]], i1 [[TMP0]], i1 false
3062 ; CHECK-NEXT: ret i1 [[RET]]
3063 ;
3064 entry:
3065 %cmp1 = icmp sgt i32 %a, -1
3066 %logical_and = select i1 %other_cond, i1 %cmp1, i1 false
3067 %cmp2 = icmp slt i32 %a, 10086
3068 %ret = select i1 %logical_and, i1 %cmp2, i1 false
3069 ret i1 %ret
3070 }
3072 define i1 @logical_and_icmps2(i32 %a, i1 %other_cond) {
3073 ; CHECK-LABEL: @logical_and_icmps2(
3074 ; CHECK-NEXT: entry:
3075 ; CHECK-NEXT: ret i1 false
3076 ;
3077 entry:
3078 %cmp1 = icmp slt i32 %a, -1
3079 %logical_and = select i1 %other_cond, i1 %cmp1, i1 false
3080 %cmp2 = icmp eq i32 %a, 10086
3081 %ret = select i1 %logical_and, i1 %cmp2, i1 false
3082 ret i1 %ret
3083 }
3085 define <4 x i1> @logical_and_icmps_vec1(<4 x i32> %a, <4 x i1> %other_cond) {
3086 ; CHECK-LABEL: @logical_and_icmps_vec1(
3087 ; CHECK-NEXT: entry:
3088 ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i32> [[A:%.*]], <i32 10086, i32 10086, i32 10086, i32 10086>
3089 ; CHECK-NEXT: [[RET:%.*]] = select <4 x i1> [[OTHER_COND:%.*]], <4 x i1> [[TMP0]], <4 x i1> zeroinitializer
3090 ; CHECK-NEXT: ret <4 x i1> [[RET]]
3091 ;
3092 entry:
3093 %cmp1 = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1 >
3094 %logical_and = select <4 x i1> %other_cond, <4 x i1> %cmp1, <4 x i1> zeroinitializer
3095 %cmp2 = icmp slt <4 x i32> %a, <i32 10086, i32 10086, i32 10086, i32 10086 >
3096 %ret = select <4 x i1> %logical_and, <4 x i1> %cmp2, <4 x i1> zeroinitializer
3097 ret <4 x i1> %ret
3098 }
3100 define i1 @logical_and_icmps_fail1(i32 %a, i32 %b, i1 %other_cond) {
3101 ; CHECK-LABEL: @logical_and_icmps_fail1(
3102 ; CHECK-NEXT: entry:
3103 ; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A:%.*]], -1
3104 ; CHECK-NEXT: [[LOGICAL_AND:%.*]] = select i1 [[OTHER_COND:%.*]], i1 [[CMP1]], i1 false
3105 ; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B:%.*]]
3106 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[LOGICAL_AND]], i1 [[CMP2]], i1 false
3107 ; CHECK-NEXT: ret i1 [[RET]]
3108 ;
3109 entry:
3110 %cmp1 = icmp sgt i32 %a, -1
3111 %logical_and = select i1 %other_cond, i1 %cmp1, i1 false
3112 %cmp2 = icmp slt i32 %a, %b
3113 %ret = select i1 %logical_and, i1 %cmp2, i1 false
3114 ret i1 %ret
3115 }
3118 define i1 @icmp_eq_or_z_or_pow2orz(i8 %x, i8 %y) {
3119 ; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz(
3120 ; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3121 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3122 ; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[POW2ORZ]], [[X:%.*]]
3123 ; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], [[X]]
3124 ; CHECK-NEXT: ret i1 [[R]]
3125 ;
3126 %ny = sub i8 0, %y
3127 %pow2orz = and i8 %ny, %y
3129 %c0 = icmp eq i8 %x, 0
3130 %cp2 = icmp eq i8 %x, %pow2orz
3131 %r = or i1 %cp2, %c0
3132 ret i1 %r
3133 }
3136 define i1 @icmp_eq_or_z_or_pow2orz_logical(i8 %x, i8 %y) {
3137 ; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_logical(
3138 ; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3139 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3140 ; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[POW2ORZ]], [[X:%.*]]
3141 ; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], [[X]]
3142 ; CHECK-NEXT: ret i1 [[R]]
3143 ;
3144 %ny = sub i8 0, %y
3145 %pow2orz = and i8 %ny, %y
3147 %c0 = icmp eq i8 %x, 0
3148 %cp2 = icmp eq i8 %x, %pow2orz
3149 %r = select i1 %cp2, i1 true, i1 %c0
3150 ret i1 %r
3151 }
3155 define i1 @icmp_eq_or_z_or_pow2orz_fail_multiuse(i8 %x, i8 %y) {
3156 ; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_multiuse(
3157 ; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3158 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3159 ; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
3160 ; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
3161 ; CHECK-NEXT: call void @use(i1 [[C0]])
3162 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
3163 ; CHECK-NEXT: ret i1 [[R]]
3164 ;
3165 %ny = sub i8 0, %y
3166 %pow2orz = and i8 %ny, %y
3168 %c0 = icmp eq i8 %x, 0
3169 %cp2 = icmp eq i8 %x, %pow2orz
3170 call void @use(i1 %c0)
3171 %r = or i1 %c0, %cp2
3172 ret i1 %r
3173 }
3176 define i1 @icmp_eq_or_z_or_pow2orz_fail_logic_or(i8 %x, i8 %y) {
3177 ; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_logic_or(
3178 ; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3179 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3180 ; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
3181 ; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
3182 ; CHECK-NEXT: [[R:%.*]] = select i1 [[C0]], i1 true, i1 [[CP2]]
3183 ; CHECK-NEXT: ret i1 [[R]]
3184 ;
3185 %ny = sub i8 0, %y
3186 %pow2orz = and i8 %ny, %y
3188 %c0 = icmp eq i8 %x, 0
3189 %cp2 = icmp eq i8 %x, %pow2orz
3190 %r = select i1 %c0, i1 true, i1 %cp2
3191 ret i1 %r
3192 }
3195 define <2 x i1> @icmp_ne_and_z_and_pow2orz(<2 x i8> %x, <2 x i8> %y) {
3196 ; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz(
3197 ; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
3198 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
3199 ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[POW2ORZ]], [[X:%.*]]
3200 ; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]]
3201 ; CHECK-NEXT: ret <2 x i1> [[R]]
3202 ;
3203 %ny = sub <2 x i8> zeroinitializer, %y
3204 %pow2orz = and <2 x i8> %ny, %y
3206 %c0 = icmp ne <2 x i8> %x, zeroinitializer
3207 %cp2 = icmp ne <2 x i8> %x, %pow2orz
3208 %r = and <2 x i1> %c0, %cp2
3209 ret <2 x i1> %r
3210 }
3213 define i1 @icmp_ne_and_z_and_onefail(i8 %x) {
3214 ; CHECK-LABEL: @icmp_ne_and_z_and_onefail(
3215 ; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[X:%.*]], 2
3216 ; CHECK-NEXT: ret i1 [[R]]
3217 ;
3218 %c0 = icmp ne i8 %x, 0
3219 %cp2 = icmp ne i8 %x, 1
3220 %cp3 = icmp ne i8 %x, 2
3221 %rr = and i1 %c0, %cp2
3222 %r = and i1 %rr, %cp3
3223 ret i1 %r
3224 }
3226 define i1 @icmp_ne_and_z_and_pow2orz_fail_multiuse1(i8 %x, i8 %y) {
3227 ; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_multiuse1(
3228 ; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3229 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3230 ; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
3231 ; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
3232 ; CHECK-NEXT: call void @use(i1 [[C0]])
3233 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
3234 ; CHECK-NEXT: ret i1 [[R]]
3235 ;
3236 %ny = sub i8 0, %y
3237 %pow2orz = and i8 %ny, %y
3239 %c0 = icmp eq i8 %x, 0
3240 %cp2 = icmp eq i8 %x, %pow2orz
3241 call void @use(i1 %c0)
3242 %r = or i1 %c0, %cp2
3243 ret i1 %r
3244 }
3247 define <2 x i1> @icmp_ne_and_z_and_pow2orz_fail_logic_and(<2 x i8> %x, <2 x i8> %y) {
3248 ; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_logic_and(
3249 ; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
3250 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
3251 ; CHECK-NEXT: [[C0:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer
3252 ; CHECK-NEXT: [[CP2:%.*]] = icmp ne <2 x i8> [[POW2ORZ]], [[X]]
3253 ; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C0]], <2 x i1> [[CP2]], <2 x i1> zeroinitializer
3254 ; CHECK-NEXT: ret <2 x i1> [[R]]
3255 ;
3256 %ny = sub <2 x i8> zeroinitializer, %y
3257 %pow2orz = and <2 x i8> %ny, %y
3259 %c0 = icmp ne <2 x i8> %x, zeroinitializer
3260 %cp2 = icmp ne <2 x i8> %x, %pow2orz
3261 %r = select <2 x i1> %c0, <2 x i1> %cp2, <2 x i1> zeroinitializer
3262 ret <2 x i1> %r
3263 }
3265 define i1 @icmp_eq_or_z_or_pow2orz_fail_not_pow2(i8 %x, i8 %y) {
3266 ; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_not_pow2(
3267 ; CHECK-NEXT: [[NY:%.*]] = sub i8 1, [[Y:%.*]]
3268 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3269 ; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
3270 ; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
3271 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
3272 ; CHECK-NEXT: ret i1 [[R]]
3273 ;
3274 %ny = sub i8 1, %y
3275 %pow2orz = and i8 %ny, %y
3277 %c0 = icmp eq i8 %x, 0
3278 %cp2 = icmp eq i8 %x, %pow2orz
3279 %r = or i1 %c0, %cp2
3280 ret i1 %r
3281 }
3283 define i1 @icmp_eq_or_z_or_pow2orz_fail_nonzero_const(i8 %x, i8 %y) {
3284 ; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_nonzero_const(
3285 ; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3286 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3287 ; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 1
3288 ; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
3289 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
3290 ; CHECK-NEXT: ret i1 [[R]]
3291 ;
3292 %ny = sub i8 0, %y
3293 %pow2orz = and i8 %ny, %y
3295 %c0 = icmp eq i8 %x, 1
3296 %cp2 = icmp eq i8 %x, %pow2orz
3297 %r = or i1 %c0, %cp2
3298 ret i1 %r
3299 }
3301 define <2 x i1> @icmp_ne_and_z_and_pow2orz_fail_bad_pred(<2 x i8> %x, <2 x i8> %y) {
3302 ; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_bad_pred(
3303 ; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
3304 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
3305 ; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i8> [[POW2ORZ]], [[X:%.*]]
3306 ; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], zeroinitializer
3307 ; CHECK-NEXT: ret <2 x i1> [[R]]
3308 ;
3309 %ny = sub <2 x i8> zeroinitializer, %y
3310 %pow2orz = and <2 x i8> %ny, %y
3312 %c0 = icmp eq <2 x i8> %x, zeroinitializer
3313 %cp2 = icmp eq <2 x i8> %x, %pow2orz
3314 %r = and <2 x i1> %c0, %cp2
3315 ret <2 x i1> %r
3316 }
3318 define i1 @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(i8 %x, i8 %y) {
3319 ; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(
3320 ; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3321 ; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3322 ; CHECK-NEXT: [[C0:%.*]] = icmp slt i8 [[X:%.*]], 1
3323 ; CHECK-NEXT: [[CP2:%.*]] = icmp sge i8 [[POW2ORZ]], [[X]]
3324 ; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
3325 ; CHECK-NEXT: ret i1 [[R]]
3326 ;
3327 %ny = sub i8 0, %y
3328 %pow2orz = and i8 %ny, %y
3330 %c0 = icmp sle i8 %x, 0
3331 %cp2 = icmp sle i8 %x, %pow2orz
3332 %r = or i1 %c0, %cp2
3333 ret i1 %r
3334 }