1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -S -passes=loop-predication < %s 2>&1 | FileCheck %s
4 declare void @llvm.experimental.deoptimize.isVoid(...)
6 define void @test_01(i1 %cond) {
7 ; CHECK-LABEL: @test_01(
9 ; CHECK-NEXT: [[INST:%.*]] = call i1 @llvm.experimental.widenable.condition()
10 ; CHECK-NEXT: [[TMP0:%.*]] = freeze i1 true
11 ; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[TMP0]], [[INST]]
12 ; CHECK-NEXT: br label [[LOOP:%.*]]
14 ; CHECK-NEXT: unreachable
16 ; CHECK-NEXT: [[INST3:%.*]] = phi i32 [ 0, [[BB:%.*]] ], [ [[INST4:%.*]], [[BACKEDGE:%.*]] ]
17 ; CHECK-NEXT: [[INST4]] = add nsw i32 [[INST3]], 1
18 ; CHECK-NEXT: br i1 [[COND:%.*]], label [[BACKEDGE]], label [[GUARD_BLOCK:%.*]]
20 ; CHECK-NEXT: ret void
22 ; CHECK-NEXT: [[ASSUME_COND:%.*]] = phi i1 [ [[INST9:%.*]], [[GUARD_BLOCK]] ], [ true, [[LOOP]] ]
23 ; CHECK-NEXT: call void @llvm.assume(i1 [[ASSUME_COND]])
24 ; CHECK-NEXT: [[INST7:%.*]] = icmp sgt i32 [[INST3]], 137
25 ; CHECK-NEXT: br i1 [[INST7]], label [[UNREACHED:%.*]], label [[LOOP]]
27 ; CHECK-NEXT: [[INST9]] = icmp ult i32 [[INST4]], 10000
28 ; CHECK-NEXT: br i1 [[TMP1]], label [[BACKEDGE]], label [[DEOPT:%.*]]
30 ; CHECK-NEXT: call void (...) @llvm.experimental.deoptimize.isVoid(i32 13) [ "deopt"() ]
31 ; CHECK-NEXT: ret void
33 ; CHECK-NEXT: ret void
36 %inst = call i1 @llvm.experimental.widenable.condition()
39 unreached: ; preds = %backedge
42 loop: ; preds = %backedge, %bb
43 %inst3 = phi i32 [ 0, %bb ], [ %inst4, %backedge ]
44 %inst4 = add nsw i32 %inst3, 1
45 br i1 %cond, label %backedge, label %guard_block
47 normal_ret: ; preds = %loop
50 backedge: ; preds = %guard_block, %loop
51 %inst7 = icmp sgt i32 %inst3, 137
52 br i1 %inst7, label %unreached, label %loop
54 guard_block: ; preds = %loop, %loop
55 %inst9 = icmp ult i32 %inst4, 10000
56 %inst10 = and i1 %inst9, %inst
57 br i1 %inst10, label %backedge, label %deopt
59 deopt: ; preds = %guard_block
60 call void (...) @llvm.experimental.deoptimize.isVoid(i32 13) [ "deopt"() ]
67 declare i1 @llvm.experimental.widenable.condition()