1 ; RUN: opt -loop-reduce -S < %s | FileCheck %s
3 ; <rdar://10619599> "SelectionDAGBuilder shouldn't visit PHI nodes!" assert.
4 ; <rdar://10655343> SCEVExpander segfault on simple test case
6 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-f128:128:128-n8:16:32"
7 target triple = "i386-apple-darwin"
9 ; LSR should convert the inner loop (bb7.us) IV (j.01.us) into float*.
10 ; This involves a nested AddRec, the outer AddRec's loop invariant components
11 ; cannot find a preheader, so they should be expanded in the loop header
12 ; (bb7.lr.ph.us) below the existing phi i.12.us.
13 ; Currently, LSR won't kick in on such loops.
14 ; CHECK-LABEL: @nopreheader(
17 ; CHECK: %j.01.us = phi i32
19 define void @nopreheader(ptr nocapture %a, i32 %n) nounwind {
21 %0 = sdiv i32 %n, undef
22 indirectbr ptr undef, [label %bb10.preheader]
24 bb10.preheader: ; preds = %bb4
25 indirectbr ptr undef, [label %bb8.preheader.lr.ph, label %return]
27 bb8.preheader.lr.ph: ; preds = %bb10.preheader
28 indirectbr ptr null, [label %bb7.lr.ph.us, label %bb9]
30 bb7.lr.ph.us: ; preds = %bb9.us, %bb8.preheader.lr.ph
31 %i.12.us = phi i32 [ %2, %bb9.us ], [ 0, %bb8.preheader.lr.ph ]
32 %tmp30 = mul i32 %0, %i.12.us
33 indirectbr ptr undef, [label %bb7.us]
35 bb7.us: ; preds = %bb7.lr.ph.us, %bb7.us
36 %j.01.us = phi i32 [ 0, %bb7.lr.ph.us ], [ %1, %bb7.us ]
37 %tmp31 = add i32 %tmp30, %j.01.us
38 %scevgep9 = getelementptr float, ptr %a, i32 %tmp31
39 store float undef, ptr %scevgep9, align 1
40 %1 = add nsw i32 %j.01.us, 1
41 indirectbr ptr undef, [label %bb9.us, label %bb7.us]
43 bb9.us: ; preds = %bb7.us
44 %2 = add nsw i32 %i.12.us, 1
45 indirectbr ptr undef, [label %bb7.lr.ph.us, label %return]
47 bb9: ; preds = %bb9, %bb8.preheader.lr.ph
48 indirectbr ptr undef, [label %bb9, label %return]
50 return: ; preds = %bb9, %bb9.us, %bb10.preheader
54 ; In this case, SCEVExpander simply cannot materialize the AddRecExpr
55 ; that LSR picks. We must detect that %bb8.preheader does not have a
56 ; preheader and avoid performing LSR on %bb7.
57 ; CHECK-LABEL: @nopreheader2(
59 ; CHECK: %indvar = phi i32
60 define fastcc void @nopreheader2(ptr nocapture %Array2) nounwind {
62 indirectbr ptr undef, [label %bb]
64 bb: ; preds = %bb, %entry
65 indirectbr ptr undef, [label %bb3, label %bb]
67 bb3: ; preds = %bb3, %bb
68 indirectbr ptr undef, [label %bb8.preheader, label %bb3]
70 bb8.preheader: ; preds = %bb9, %bb3
71 %indvar5 = phi i32 [ %indvar.next6, %bb9 ], [ 0, %bb3 ]
72 %tmp26 = add i32 %indvar5, 13
73 indirectbr ptr null, [label %bb7]
75 bb7: ; preds = %bb8.preheader, %bb7
76 %indvar = phi i32 [ 0, %bb8.preheader ], [ %indvar.next, %bb7 ]
77 %scevgep = getelementptr [200 x i32], ptr %Array2, i32 %tmp26, i32 %indvar
78 store i32 undef, ptr %scevgep, align 4
79 %indvar.next = add i32 %indvar, 1
80 indirectbr ptr undef, [label %bb9, label %bb7]
83 %indvar.next6 = add i32 %indvar5, 1
84 indirectbr ptr undef, [label %return, label %bb8.preheader]
86 return: ; preds = %bb9