[llvm-project.git] / llvm / test / Transforms / SLPVectorizer / X86 / extract-many-users-buildvector.ll
| blob | eb7498fea6f793d658708910130d0f15eaa0cdfb |
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
2 ; RUN: opt -S -passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
4 define i1 @test(float %0, double %1) {
5 ; CHECK-LABEL: define i1 @test
6 ; CHECK-SAME: (float [[TMP0:%.*]], double [[TMP1:%.*]]) {
7 ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float poison>, float [[TMP0]], i32 3
8 ; CHECK-NEXT: [[TMP4:%.*]] = fpext <4 x float> [[TMP3]] to <4 x double>
9 ; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x double> <double poison, double 0.000000e+00>, double [[TMP1]], i32 0
10 ; CHECK-NEXT: [[TMP6:%.*]] = fmul <2 x double> zeroinitializer, [[TMP5]]
11 ; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x double> [[TMP6]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 1, i32 poison>
12 ; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x double> [[TMP7]], <4 x double> <double 0.000000e+00, double poison, double poison, double 0.000000e+00>, <4 x i32> <i32 4, i32 poison, i32 2, i32 7>
13 ; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x double> [[TMP8]], double [[TMP1]], i32 1
14 ; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x double> [[TMP4]], <4 x double> [[TMP7]], <2 x i32> <i32 1, i32 5>
15 ; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <2 x double> [[TMP10]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
16 ; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <4 x double> [[TMP4]], <4 x double> [[TMP11]], <4 x i32> <i32 2, i32 0, i32 4, i32 5>
17 ; CHECK-NEXT: [[TMP13:%.*]] = fmul <4 x double> [[TMP9]], [[TMP12]]
18 ; CHECK-NEXT: [[TMP14:%.*]] = fmul <4 x double> zeroinitializer, [[TMP4]]
19 ; CHECK-NEXT: [[TMP15:%.*]] = shufflevector <4 x double> [[TMP13]], <4 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
20 ; CHECK-NEXT: [[TMP16:%.*]] = shufflevector <8 x double> <double poison, double poison, double poison, double poison, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00>, <8 x double> [[TMP15]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
21 ; CHECK-NEXT: [[TMP17:%.*]] = shufflevector <4 x double> [[TMP14]], <4 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
22 ; CHECK-NEXT: [[TMP18:%.*]] = shufflevector <8 x double> <double poison, double poison, double poison, double poison, double poison, double poison, double 0.000000e+00, double 0.000000e+00>, <8 x double> [[TMP17]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 poison, i32 poison, i32 6, i32 7>
23 ; CHECK-NEXT: [[TMP19:%.*]] = shufflevector <2 x double> [[TMP6]], <2 x double> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
24 ; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <8 x double> [[TMP18]], <8 x double> [[TMP19]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7>
25 ; CHECK-NEXT: [[TMP21:%.*]] = fsub <8 x double> [[TMP16]], [[TMP20]]
26 ; CHECK-NEXT: [[TMP22:%.*]] = fmul <8 x double> [[TMP16]], [[TMP20]]
27 ; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <8 x double> [[TMP21]], <8 x double> [[TMP22]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 13, i32 14, i32 15>
28 ; CHECK-NEXT: [[TMP24:%.*]] = fptrunc <8 x double> [[TMP23]] to <8 x float>
29 ; CHECK-NEXT: [[TMP25:%.*]] = fmul <8 x float> [[TMP24]], zeroinitializer
30 ; CHECK-NEXT: [[TMP26:%.*]] = fcmp oeq <8 x float> [[TMP25]], zeroinitializer
31 ; CHECK-NEXT: [[TMP27:%.*]] = freeze <8 x i1> [[TMP26]]
32 ; CHECK-NEXT: [[TMP28:%.*]] = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> [[TMP27]])
33 ; CHECK-NEXT: ret i1 [[TMP28]]
34 ;
35 %3 = fpext float %0 to double
36 %4 = fpext float 0.000000e+00 to double
37 %5 = fpext float 0.000000e+00 to double
38 %6 = fpext float 0.000000e+00 to double
39 %7 = fmul double 0.000000e+00, 0.000000e+00
40 %8 = fmul double 0.000000e+00, %1
41 %9 = fmul double 0.000000e+00, 0.000000e+00
42 %10 = fmul double 0.000000e+00, %5
43 %11 = fmul double 0.000000e+00, %6
44 %12 = fsub double %10, %11
45 %13 = fptrunc double %12 to float
46 %14 = fmul double %9, 0.000000e+00
47 %15 = fmul double 0.000000e+00, %3
48 %16 = fsub double %14, %15
49 %17 = fptrunc double %16 to float
50 %18 = fptrunc double %7 to float
51 %19 = fmul double %1, %6
52 %20 = fmul double 0.000000e+00, %4
53 %21 = fsub double %19, %20
54 %22 = fptrunc double %21 to float
55 %23 = fsub double 0.000000e+00, %8
56 %24 = fptrunc double %23 to float
57 %25 = fmul double 0.000000e+00, 0.000000e+00
58 %26 = fptrunc double %25 to float
59 %27 = fmul double %9, %4
60 %28 = fmul double 0.000000e+00, %5
61 %29 = fsub double %27, %28
62 %30 = fptrunc double %29 to float
63 %31 = fmul double %9, 0.000000e+00
64 %32 = fptrunc double %31 to float
65 %33 = fmul float %13, 0.000000e+00
66 %34 = fcmp oeq float %33, 0.000000e+00
67 %35 = fmul float %22, 0.000000e+00
68 %36 = fcmp oeq float %35, 0.000000e+00
69 %37 = select i1 %34, i1 %36, i1 false
70 %38 = fmul float %30, 0.000000e+00
71 %39 = fcmp oeq float %38, 0.000000e+00
72 %40 = select i1 %37, i1 %39, i1 false
73 %41 = fmul float %17, 0.000000e+00
74 %42 = fcmp oeq float %41, 0.000000e+00
75 %43 = select i1 %40, i1 %42, i1 false
76 %44 = fmul float %24, 0.000000e+00
77 %45 = fcmp oeq float %44, 0.000000e+00
78 %46 = select i1 %43, i1 %45, i1 false
79 %47 = fmul float %32, 0.000000e+00
80 %48 = fcmp oeq float %47, 0.000000e+00
81 %49 = select i1 %46, i1 %48, i1 false
82 %50 = fmul float %18, 0.000000e+00
83 %51 = fcmp oeq float %50, 0.000000e+00
84 %52 = select i1 %49, i1 %51, i1 false
85 %53 = fmul float %26, 0.000000e+00
86 %54 = fcmp oeq float %53, 0.000000e+00
87 %55 = select i1 %52, i1 %54, i1 false
88 ret i1 %55
89 }