1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
5 target triple = "x86_64-apple-macosx10.8.0"
6 define void @fextr(ptr %ptr) {
9 ; CHECK-NEXT: [[LD:%.*]] = load <2 x double>, ptr undef, align 16
10 ; CHECK-NEXT: [[TMP0:%.*]] = fadd <2 x double> [[LD]], <double 0.000000e+00, double 1.100000e+00>
11 ; CHECK-NEXT: store <2 x double> [[TMP0]], ptr [[PTR:%.*]], align 4
12 ; CHECK-NEXT: ret void
15 %LD = load <2 x double>, ptr undef
16 %V0 = extractelement <2 x double> %LD, i32 0
17 %V1 = extractelement <2 x double> %LD, i32 1
18 %P1 = getelementptr inbounds double, ptr %ptr, i64 1
19 %A0 = fadd double %V0, 0.0
20 %A1 = fadd double %V1, 1.1
21 store double %A0, ptr %ptr, align 4
22 store double %A1, ptr %P1, align 4
26 define void @fextr1(ptr %ptr) {
27 ; CHECK-LABEL: @fextr1(
29 ; CHECK-NEXT: [[LD:%.*]] = load <2 x double>, ptr undef, align 16
30 ; CHECK-NEXT: [[TMP0:%.*]] = fadd <2 x double> [[LD]], <double 1.200000e+00, double 3.400000e+00>
31 ; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> <i32 1, i32 0>
32 ; CHECK-NEXT: store <2 x double> [[TMP1]], ptr [[PTR:%.*]], align 4
33 ; CHECK-NEXT: ret void
36 %LD = load <2 x double>, ptr undef
37 %V0 = extractelement <2 x double> %LD, i32 0
38 %V1 = extractelement <2 x double> %LD, i32 1
39 %P0 = getelementptr inbounds double, ptr %ptr, i64 1 ; <--- incorrect order
40 %A0 = fadd double %V0, 1.2
41 %A1 = fadd double %V1, 3.4
42 store double %A0, ptr %P0, align 4
43 store double %A1, ptr %ptr, align 4
47 define void @fextr2(ptr %ptr) {
48 ; CHECK-LABEL: @fextr2(
50 ; CHECK-NEXT: [[LD:%.*]] = load <4 x double>, ptr undef, align 32
51 ; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <4 x double> [[LD]], <4 x double> poison, <2 x i32> <i32 0, i32 1>
52 ; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x double> [[TMP0]], <double 5.500000e+00, double 6.600000e+00>
53 ; CHECK-NEXT: store <2 x double> [[TMP1]], ptr [[PTR:%.*]], align 4
54 ; CHECK-NEXT: ret void
57 %LD = load <4 x double>, ptr undef
58 %V0 = extractelement <4 x double> %LD, i32 0 ; <--- invalid size.
59 %V1 = extractelement <4 x double> %LD, i32 1
60 %P1 = getelementptr inbounds double, ptr %ptr, i64 1
61 %A0 = fadd double %V0, 5.5
62 %A1 = fadd double %V1, 6.6
63 store double %A0, ptr %ptr, align 4
64 store double %A1, ptr %P1, align 4