1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=slp-vectorizer -slp-threshold=1000 -passes=dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
5 target triple = "x86_64-apple-macosx10.8.0"
7 ; Check that the command line flag works.
8 define i32 @rollable(ptr noalias nocapture %in, ptr noalias nocapture %out, i64 %n) {
9 ; CHECK-LABEL: @rollable(
10 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[N:%.*]], 0
11 ; CHECK-NEXT: br i1 [[TMP1]], label [[DOT_CRIT_EDGE:%.*]], label [[DOTLR_PH:%.*]]
13 ; CHECK-NEXT: [[I_019:%.*]] = phi i64 [ [[TMP26:%.*]], [[DOTLR_PH]] ], [ 0, [[TMP0:%.*]] ]
14 ; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[I_019]], 2
15 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[IN:%.*]], i64 [[TMP2]]
16 ; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
17 ; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[TMP2]], 1
18 ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[IN]], i64 [[TMP5]]
19 ; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
20 ; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP2]], 2
21 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[IN]], i64 [[TMP8]]
22 ; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
23 ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[TMP2]], 3
24 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[IN]], i64 [[TMP11]]
25 ; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
26 ; CHECK-NEXT: [[TMP14:%.*]] = mul i32 [[TMP4]], 7
27 ; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP14]], 7
28 ; CHECK-NEXT: [[TMP16:%.*]] = mul i32 [[TMP7]], 7
29 ; CHECK-NEXT: [[TMP17:%.*]] = add i32 [[TMP16]], 14
30 ; CHECK-NEXT: [[TMP18:%.*]] = mul i32 [[TMP10]], 7
31 ; CHECK-NEXT: [[TMP19:%.*]] = add i32 [[TMP18]], 21
32 ; CHECK-NEXT: [[TMP20:%.*]] = mul i32 [[TMP13]], 7
33 ; CHECK-NEXT: [[TMP21:%.*]] = add i32 [[TMP20]], 28
34 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[OUT:%.*]], i64 [[TMP2]]
35 ; CHECK-NEXT: store i32 [[TMP15]], ptr [[TMP22]], align 4
36 ; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[TMP5]]
37 ; CHECK-NEXT: store i32 [[TMP17]], ptr [[TMP23]], align 4
38 ; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[TMP8]]
39 ; CHECK-NEXT: store i32 [[TMP19]], ptr [[TMP24]], align 4
40 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[TMP11]]
41 ; CHECK-NEXT: store i32 [[TMP21]], ptr [[TMP25]], align 4
42 ; CHECK-NEXT: [[TMP26]] = add i64 [[I_019]], 1
43 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP26]], [[N]]
44 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]]
46 ; CHECK-NEXT: ret i32 undef
48 %1 = icmp eq i64 %n, 0
49 br i1 %1, label %._crit_edge, label %.lr.ph
51 .lr.ph: ; preds = %0, %.lr.ph
52 %i.019 = phi i64 [ %26, %.lr.ph ], [ 0, %0 ]
53 %2 = shl i64 %i.019, 2
54 %3 = getelementptr inbounds i32, ptr %in, i64 %2
55 %4 = load i32, ptr %3, align 4
57 %6 = getelementptr inbounds i32, ptr %in, i64 %5
58 %7 = load i32, ptr %6, align 4
60 %9 = getelementptr inbounds i32, ptr %in, i64 %8
61 %10 = load i32, ptr %9, align 4
63 %12 = getelementptr inbounds i32, ptr %in, i64 %11
64 %13 = load i32, ptr %12, align 4
73 %22 = getelementptr inbounds i32, ptr %out, i64 %2
74 store i32 %15, ptr %22, align 4
75 %23 = getelementptr inbounds i32, ptr %out, i64 %5
76 store i32 %17, ptr %23, align 4
77 %24 = getelementptr inbounds i32, ptr %out, i64 %8
78 store i32 %19, ptr %24, align 4
79 %25 = getelementptr inbounds i32, ptr %out, i64 %11
80 store i32 %21, ptr %25, align 4
81 %26 = add i64 %i.019, 1
82 %exitcond = icmp eq i64 %26, %n
83 br i1 %exitcond, label %._crit_edge, label %.lr.ph
85 ._crit_edge: ; preds = %.lr.ph, %0