1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2 ; RUN: opt --passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
5 ; CHECK-LABEL: define void @test() {
7 ; CHECK-NEXT: store <8 x i16> zeroinitializer, ptr null, align 2
11 %arrayidx8 = getelementptr i8, ptr null, i64 2
12 %shr10 = ashr i32 0, 0
13 %shr19 = lshr i32 0, 0
14 %sub20 = or i32 %shr19, %shr10
15 %xor21 = xor i32 %sub20, 0
16 %conv22 = trunc i32 %xor21 to i16
17 store i16 %conv22, ptr %arrayidx8, align 2
18 %arrayidx28 = getelementptr i8, ptr null, i64 4
19 %shr34 = lshr i32 0, 0
20 %sub35 = or i32 %shr34, %shr10
21 %xor36 = xor i32 %sub35, 0
22 %conv37 = trunc i32 %xor36 to i16
23 store i16 %conv37, ptr %arrayidx28, align 2
24 %arrayidx43 = getelementptr i8, ptr null, i64 6
25 %shr49 = lshr i32 0, 0
26 %sub50 = or i32 %shr49, %shr10
27 %xor51 = xor i32 %sub50, 0
28 %conv52 = trunc i32 %xor51 to i16
29 store i16 %conv52, ptr %arrayidx43, align 2
30 %arrayidx.1 = getelementptr i8, ptr null, i64 8
31 %shr.1 = lshr i32 0, 0
32 %xor2.1 = xor i32 %shr.1, %shr10
33 %sub3.1 = or i32 %xor2.1, 0
34 %conv4.1 = trunc i32 %sub3.1 to i16
35 store i16 %conv4.1, ptr %arrayidx.1, align 2
36 %arrayidx8.1 = getelementptr i8, ptr null, i64 10
37 %shr10.1 = ashr i32 0, 0
38 %shr19.1 = lshr i32 0, 0
39 %sub20.1 = or i32 %shr19.1, %shr10.1
40 %xor21.1 = xor i32 %sub20.1, 0
41 %conv22.1 = trunc i32 %xor21.1 to i16
42 store i16 %conv22.1, ptr %arrayidx8.1, align 2
43 %arrayidx28.1 = getelementptr i8, ptr null, i64 12
44 %shr34.1 = lshr i32 0, 0
45 %sub35.1 = or i32 %shr34.1, %shr10.1
46 %xor36.1 = xor i32 %sub35.1, 0
47 %conv37.1 = trunc i32 %xor36.1 to i16
48 store i16 %conv37.1, ptr %arrayidx28.1, align 2
49 %arrayidx43.1 = getelementptr i8, ptr null, i64 14
50 %shr49.1 = lshr i32 0, 0
51 %sub50.1 = or i32 %shr49.1, %shr10.1
52 %xor51.1 = xor i32 %sub50.1, 0
53 %conv52.1 = trunc i32 %xor51.1 to i16
54 store i16 %conv52.1, ptr %arrayidx43.1, align 2
55 %shr.2 = lshr i32 0, 0
56 %xor2.2 = xor i32 %shr.2, %shr10.1
57 %sub3.2 = or i32 %xor2.2, 0
58 %conv4.2 = trunc i32 %sub3.2 to i16
59 store i16 %conv4.2, ptr null, align 2