1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
5 target triple = "x86_64-apple-macosx10.7.0"
7 ; int bar(ptr A, int d) {
12 ; if (d) foo(); <----- This splits the blocks
20 define i32 @bar(ptr nocapture %A, i32 %d) {
22 ; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[A:%.*]], align 8
23 ; CHECK-NEXT: [[TMP2:%.*]] = fptrunc <2 x double> [[TMP1]] to <2 x float>
24 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[D:%.*]], 0
25 ; CHECK-NEXT: br i1 [[TMP3]], label [[TMP6:%.*]], label [[TMP4:%.*]]
27 ; CHECK-NEXT: [[TMP5:%.*]] = tail call i32 (...) @foo()
28 ; CHECK-NEXT: br label [[TMP6]]
30 ; CHECK-NEXT: [[TMP7:%.*]] = fadd <2 x float> [[TMP2]], <float 4.000000e+00, float 5.000000e+00>
31 ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds double, ptr [[A]], i64 8
32 ; CHECK-NEXT: [[TMP9:%.*]] = fpext <2 x float> [[TMP7]] to <2 x double>
33 ; CHECK-NEXT: [[TMP10:%.*]] = fadd <2 x double> [[TMP9]], <double 9.000000e+00, double 5.000000e+00>
34 ; CHECK-NEXT: store <2 x double> [[TMP10]], ptr [[TMP8]], align 8
35 ; CHECK-NEXT: ret i32 undef
37 %1 = load double, ptr %A, align 8
38 %2 = getelementptr inbounds double, ptr %A, i64 1
39 %3 = load double, ptr %2, align 8
40 %4 = fptrunc double %1 to float
41 %5 = fptrunc double %3 to float
42 %6 = icmp eq i32 %d, 0
43 br i1 %6, label %9, label %7
45 ; <label>:7 ; preds = %0
46 %8 = tail call i32 (...) @foo()
49 ; <label>:9 ; preds = %0, %7
50 %10 = fadd float %4, 4.000000e+00
51 %11 = fadd float %5, 5.000000e+00
52 %12 = fpext float %10 to double
53 %13 = fadd double %12, 9.000000e+00
54 %14 = getelementptr inbounds double, ptr %A, i64 8
55 store double %13, ptr %14, align 8
56 %15 = fpext float %11 to double
57 %16 = fadd double %15, 5.000000e+00
58 %17 = getelementptr inbounds double, ptr %A, i64 9
59 store double %16, ptr %17, align 8