1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
5 target triple = "x86_64-apple-macosx10.7.0"
7 ;int foo (int *A, int n) {
15 define i32 @foo(ptr nocapture %A, i32 %n) {
17 ; CHECK-NEXT: [[TMP1:%.*]] = mul nsw i32 [[N:%.*]], 5
18 ; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1]], i32 0
19 ; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <4 x i32> zeroinitializer
20 ; CHECK-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[SHUFFLE]], <i32 7, i32 8, i32 9, i32 10>
21 ; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i32>, ptr [[A:%.*]], align 4
22 ; CHECK-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP5]]
23 ; CHECK-NEXT: store <4 x i32> [[TMP6]], ptr [[A]], align 4
24 ; CHECK-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP1]], 11
25 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 4
26 ; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
27 ; CHECK-NEXT: [[TMP11:%.*]] = add nsw i32 [[TMP8]], [[TMP10]]
28 ; CHECK-NEXT: store i32 [[TMP11]], ptr [[TMP9]], align 4
29 ; CHECK-NEXT: ret i32 undef
31 %1 = mul nsw i32 %n, 5
32 %2 = add nsw i32 %1, 7
33 %3 = load i32, ptr %A, align 4
34 %4 = add nsw i32 %2, %3
35 store i32 %4, ptr %A, align 4
36 %5 = add nsw i32 %1, 8
37 %6 = getelementptr inbounds i32, ptr %A, i64 1
38 %7 = load i32, ptr %6, align 4
39 %8 = add nsw i32 %5, %7
40 store i32 %8, ptr %6, align 4
41 %9 = add nsw i32 %1, 9
42 %10 = getelementptr inbounds i32, ptr %A, i64 2
43 %11 = load i32, ptr %10, align 4
44 %12 = add nsw i32 %9, %11
45 store i32 %12, ptr %10, align 4
46 %13 = add nsw i32 %1, 10
47 %14 = getelementptr inbounds i32, ptr %A, i64 3
48 %15 = load i32, ptr %14, align 4
49 %16 = add nsw i32 %13, %15
50 store i32 %16, ptr %14, align 4
51 %17 = add nsw i32 %1, 11
52 %18 = getelementptr inbounds i32, ptr %A, i64 4
53 %19 = load i32, ptr %18, align 4
54 %20 = add nsw i32 %17, %19
55 store i32 %20, ptr %18, align 4