| blob | 23bada8f7790dcbaf91dceb497c8adf6c0373dc0 |
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux -slp-threshold=-2 | FileCheck %s
4 define void @foo(ptr noalias nocapture writeonly %B, ptr noalias nocapture readonly %A, ptr noalias nocapture readonly %C, i32 %n, i32 %m) {
5 ; CHECK-LABEL: @foo(
6 ; CHECK-NEXT: entry:
7 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A:%.*]], align 4
8 ; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[N:%.*]]
9 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[C:%.*]], align 4
10 ; CHECK-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP1]], [[M:%.*]]
11 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL2]], [[MUL]]
12 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 1
13 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX3]], align 4
14 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i32 [[ADD]], [[TMP2]]
15 ; CHECK-NEXT: store i32 [[MUL4]], ptr [[B:%.*]], align 4
16 ; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 1
17 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX8]], align 4
18 ; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP3]], [[M]]
19 ; CHECK-NEXT: [[ADD10:%.*]] = add nsw i32 [[MUL9]], [[MUL]]
20 ; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 2
21 ; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX11]], align 4
22 ; CHECK-NEXT: [[MUL12:%.*]] = mul nsw i32 [[ADD10]], [[TMP4]]
23 ; CHECK-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 1
24 ; CHECK-NEXT: store i32 [[MUL12]], ptr [[ARRAYIDX13]], align 4
25 ; CHECK-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP2]], [[N]]
26 ; CHECK-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP4]], [[M]]
27 ; CHECK-NEXT: [[ADD18:%.*]] = add nsw i32 [[MUL17]], [[MUL15]]
28 ; CHECK-NEXT: [[MUL20:%.*]] = mul nsw i32 [[ADD18]], [[TMP0]]
29 ; CHECK-NEXT: [[ARRAYIDX21:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 2
30 ; CHECK-NEXT: store i32 [[MUL20]], ptr [[ARRAYIDX21]], align 4
31 ; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 3
32 ; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX24]], align 4
33 ; CHECK-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP5]], [[M]]
34 ; CHECK-NEXT: [[ADD26:%.*]] = add nsw i32 [[MUL25]], [[MUL15]]
35 ; CHECK-NEXT: [[MUL28:%.*]] = mul nsw i32 [[ADD26]], [[TMP1]]
36 ; CHECK-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 3
37 ; CHECK-NEXT: store i32 [[MUL28]], ptr [[ARRAYIDX29]], align 4
38 ; CHECK-NEXT: ret void
39 ;
40 entry:
41 %0 = load i32, ptr %A, align 4
42 %mul = mul nsw i32 %0, %n
43 %1 = load i32, ptr %C, align 4
44 %mul2 = mul nsw i32 %1, %m
45 %add = add nsw i32 %mul2, %mul
46 %arrayidx3 = getelementptr inbounds i32, ptr %A, i64 1
47 %2 = load i32, ptr %arrayidx3, align 4
48 %mul4 = mul nsw i32 %add, %2
49 store i32 %mul4, ptr %B, align 4
50 %arrayidx8 = getelementptr inbounds i32, ptr %C, i64 1
51 %3 = load i32, ptr %arrayidx8, align 4
52 %mul9 = mul nsw i32 %3, %m
53 %add10 = add nsw i32 %mul9, %mul
54 %arrayidx11 = getelementptr inbounds i32, ptr %C, i64 2
55 %4 = load i32, ptr %arrayidx11, align 4
56 %mul12 = mul nsw i32 %add10, %4
57 %arrayidx13 = getelementptr inbounds i32, ptr %B, i64 1
58 store i32 %mul12, ptr %arrayidx13, align 4
59 %mul15 = mul nsw i32 %2, %n
60 %mul17 = mul nsw i32 %4, %m
61 %add18 = add nsw i32 %mul17, %mul15
62 %mul20 = mul nsw i32 %add18, %0
63 %arrayidx21 = getelementptr inbounds i32, ptr %B, i64 2
64 store i32 %mul20, ptr %arrayidx21, align 4
65 %arrayidx24 = getelementptr inbounds i32, ptr %C, i64 3
66 %5 = load i32, ptr %arrayidx24, align 4
67 %mul25 = mul nsw i32 %5, %m
68 %add26 = add nsw i32 %mul25, %mul15
69 %mul28 = mul nsw i32 %add26, %1
70 %arrayidx29 = getelementptr inbounds i32, ptr %B, i64 3
71 store i32 %mul28, ptr %arrayidx29, align 4
72 ret void
73 }