1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
4 define void @tiny_tree_fully_vectorizable(ptr noalias nocapture %dst, ptr noalias nocapture readonly %src, i64 %count) #0 {
5 ; CHECK-LABEL: @tiny_tree_fully_vectorizable(
7 ; CHECK-NEXT: [[CMP12:%.*]] = icmp eq i64 [[COUNT:%.*]], 0
8 ; CHECK-NEXT: br i1 [[CMP12]], label [[FOR_END:%.*]], label [[FOR_BODY:%.*]]
10 ; CHECK-NEXT: [[I_015:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
11 ; CHECK-NEXT: [[DST_ADDR_014:%.*]] = phi ptr [ [[ADD_PTR4:%.*]], [[FOR_BODY]] ], [ [[DST:%.*]], [[ENTRY]] ]
12 ; CHECK-NEXT: [[SRC_ADDR_013:%.*]] = phi ptr [ [[ADD_PTR:%.*]], [[FOR_BODY]] ], [ [[SRC:%.*]], [[ENTRY]] ]
13 ; CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[SRC_ADDR_013]], align 8
14 ; CHECK-NEXT: store <2 x double> [[TMP0]], ptr [[DST_ADDR_014]], align 8
15 ; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds double, ptr [[SRC_ADDR_013]], i64 [[I_015]]
16 ; CHECK-NEXT: [[ADD_PTR4]] = getelementptr inbounds double, ptr [[DST_ADDR_014]], i64 [[I_015]]
17 ; CHECK-NEXT: [[INC]] = add i64 [[I_015]], 1
18 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INC]], [[COUNT]]
19 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]]
21 ; CHECK-NEXT: ret void
24 %cmp12 = icmp eq i64 %count, 0
25 br i1 %cmp12, label %for.end, label %for.body
27 for.body: ; preds = %entry, %for.body
28 %i.015 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
29 %dst.addr.014 = phi ptr [ %add.ptr4, %for.body ], [ %dst, %entry ]
30 %src.addr.013 = phi ptr [ %add.ptr, %for.body ], [ %src, %entry ]
31 %0 = load double, ptr %src.addr.013, align 8
32 store double %0, ptr %dst.addr.014, align 8
33 %arrayidx2 = getelementptr inbounds double, ptr %src.addr.013, i64 1
34 %1 = load double, ptr %arrayidx2, align 8
35 %arrayidx3 = getelementptr inbounds double, ptr %dst.addr.014, i64 1
36 store double %1, ptr %arrayidx3, align 8
37 %add.ptr = getelementptr inbounds double, ptr %src.addr.013, i64 %i.015
38 %add.ptr4 = getelementptr inbounds double, ptr %dst.addr.014, i64 %i.015
39 %inc = add i64 %i.015, 1
40 %exitcond = icmp eq i64 %inc, %count
41 br i1 %exitcond, label %for.end, label %for.body
43 for.end: ; preds = %for.body, %entry
47 define void @tiny_tree_fully_vectorizable2(ptr noalias nocapture %dst, ptr noalias nocapture readonly %src, i64 %count) #0 {
48 ; CHECK-LABEL: @tiny_tree_fully_vectorizable2(
50 ; CHECK-NEXT: [[CMP20:%.*]] = icmp eq i64 [[COUNT:%.*]], 0
51 ; CHECK-NEXT: br i1 [[CMP20]], label [[FOR_END:%.*]], label [[FOR_BODY:%.*]]
53 ; CHECK-NEXT: [[I_023:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
54 ; CHECK-NEXT: [[DST_ADDR_022:%.*]] = phi ptr [ [[ADD_PTR8:%.*]], [[FOR_BODY]] ], [ [[DST:%.*]], [[ENTRY]] ]
55 ; CHECK-NEXT: [[SRC_ADDR_021:%.*]] = phi ptr [ [[ADD_PTR:%.*]], [[FOR_BODY]] ], [ [[SRC:%.*]], [[ENTRY]] ]
56 ; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[SRC_ADDR_021]], align 4
57 ; CHECK-NEXT: store <4 x float> [[TMP0]], ptr [[DST_ADDR_022]], align 4
58 ; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds float, ptr [[SRC_ADDR_021]], i64 [[I_023]]
59 ; CHECK-NEXT: [[ADD_PTR8]] = getelementptr inbounds float, ptr [[DST_ADDR_022]], i64 [[I_023]]
60 ; CHECK-NEXT: [[INC]] = add i64 [[I_023]], 1
61 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INC]], [[COUNT]]
62 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]]
64 ; CHECK-NEXT: ret void
67 %cmp20 = icmp eq i64 %count, 0
68 br i1 %cmp20, label %for.end, label %for.body
70 for.body: ; preds = %entry, %for.body
71 %i.023 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
72 %dst.addr.022 = phi ptr [ %add.ptr8, %for.body ], [ %dst, %entry ]
73 %src.addr.021 = phi ptr [ %add.ptr, %for.body ], [ %src, %entry ]
74 %0 = load float, ptr %src.addr.021, align 4
75 store float %0, ptr %dst.addr.022, align 4
76 %arrayidx2 = getelementptr inbounds float, ptr %src.addr.021, i64 1
77 %1 = load float, ptr %arrayidx2, align 4
78 %arrayidx3 = getelementptr inbounds float, ptr %dst.addr.022, i64 1
79 store float %1, ptr %arrayidx3, align 4
80 %arrayidx4 = getelementptr inbounds float, ptr %src.addr.021, i64 2
81 %2 = load float, ptr %arrayidx4, align 4
82 %arrayidx5 = getelementptr inbounds float, ptr %dst.addr.022, i64 2
83 store float %2, ptr %arrayidx5, align 4
84 %arrayidx6 = getelementptr inbounds float, ptr %src.addr.021, i64 3
85 %3 = load float, ptr %arrayidx6, align 4
86 %arrayidx7 = getelementptr inbounds float, ptr %dst.addr.022, i64 3
87 store float %3, ptr %arrayidx7, align 4
88 %add.ptr = getelementptr inbounds float, ptr %src.addr.021, i64 %i.023
89 %add.ptr8 = getelementptr inbounds float, ptr %dst.addr.022, i64 %i.023
90 %inc = add i64 %i.023, 1
91 %exitcond = icmp eq i64 %inc, %count
92 br i1 %exitcond, label %for.end, label %for.body
94 for.end: ; preds = %for.body, %entry
98 ; We do not vectorize the tiny tree which is not fully vectorizable.
100 define void @tiny_tree_not_fully_vectorizable(ptr noalias nocapture %dst, ptr noalias nocapture readonly %src, i64 %count) #0 {
101 ; CHECK-LABEL: @tiny_tree_not_fully_vectorizable(
103 ; CHECK-NEXT: [[CMP12:%.*]] = icmp eq i64 [[COUNT:%.*]], 0
104 ; CHECK-NEXT: br i1 [[CMP12]], label [[FOR_END:%.*]], label [[FOR_BODY:%.*]]
106 ; CHECK-NEXT: [[I_015:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
107 ; CHECK-NEXT: [[DST_ADDR_014:%.*]] = phi ptr [ [[ADD_PTR4:%.*]], [[FOR_BODY]] ], [ [[DST:%.*]], [[ENTRY]] ]
108 ; CHECK-NEXT: [[SRC_ADDR_013:%.*]] = phi ptr [ [[ADD_PTR:%.*]], [[FOR_BODY]] ], [ [[SRC:%.*]], [[ENTRY]] ]
109 ; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[SRC_ADDR_013]], align 8
110 ; CHECK-NEXT: store double [[TMP0]], ptr [[DST_ADDR_014]], align 8
111 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[SRC_ADDR_013]], i64 2
112 ; CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[ARRAYIDX2]], align 8
113 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, ptr [[DST_ADDR_014]], i64 1
114 ; CHECK-NEXT: store double [[TMP1]], ptr [[ARRAYIDX3]], align 8
115 ; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds double, ptr [[SRC_ADDR_013]], i64 [[I_015]]
116 ; CHECK-NEXT: [[ADD_PTR4]] = getelementptr inbounds double, ptr [[DST_ADDR_014]], i64 [[I_015]]
117 ; CHECK-NEXT: [[INC]] = add i64 [[I_015]], 1
118 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INC]], [[COUNT]]
119 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]]
121 ; CHECK-NEXT: ret void
124 %cmp12 = icmp eq i64 %count, 0
125 br i1 %cmp12, label %for.end, label %for.body
127 for.body: ; preds = %entry, %for.body
128 %i.015 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
129 %dst.addr.014 = phi ptr [ %add.ptr4, %for.body ], [ %dst, %entry ]
130 %src.addr.013 = phi ptr [ %add.ptr, %for.body ], [ %src, %entry ]
131 %0 = load double, ptr %src.addr.013, align 8
132 store double %0, ptr %dst.addr.014, align 8
133 %arrayidx2 = getelementptr inbounds double, ptr %src.addr.013, i64 2
134 %1 = load double, ptr %arrayidx2, align 8
135 %arrayidx3 = getelementptr inbounds double, ptr %dst.addr.014, i64 1
136 store double %1, ptr %arrayidx3, align 8
137 %add.ptr = getelementptr inbounds double, ptr %src.addr.013, i64 %i.015
138 %add.ptr4 = getelementptr inbounds double, ptr %dst.addr.014, i64 %i.015
139 %inc = add i64 %i.015, 1
140 %exitcond = icmp eq i64 %inc, %count
141 br i1 %exitcond, label %for.end, label %for.body
143 for.end: ; preds = %for.body, %entry
147 define void @tiny_tree_not_fully_vectorizable2(ptr noalias nocapture %dst, ptr noalias nocapture readonly %src, i64 %count) #0 {
148 ; CHECK-LABEL: @tiny_tree_not_fully_vectorizable2(
150 ; CHECK-NEXT: [[CMP20:%.*]] = icmp eq i64 [[COUNT:%.*]], 0
151 ; CHECK-NEXT: br i1 [[CMP20]], label [[FOR_END:%.*]], label [[FOR_BODY:%.*]]
153 ; CHECK-NEXT: [[I_023:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
154 ; CHECK-NEXT: [[DST_ADDR_022:%.*]] = phi ptr [ [[ADD_PTR8:%.*]], [[FOR_BODY]] ], [ [[DST:%.*]], [[ENTRY]] ]
155 ; CHECK-NEXT: [[SRC_ADDR_021:%.*]] = phi ptr [ [[ADD_PTR:%.*]], [[FOR_BODY]] ], [ [[SRC:%.*]], [[ENTRY]] ]
156 ; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[SRC_ADDR_021]], align 4
157 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[SRC_ADDR_021]], i64 4
158 ; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX2]], align 4
159 ; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[SRC_ADDR_021]], i64 2
160 ; CHECK-NEXT: [[TMP2:%.*]] = load <2 x float>, ptr [[ARRAYIDX4]], align 4
161 ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i32 0
162 ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float [[TMP1]], i32 1
163 ; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
164 ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
165 ; CHECK-NEXT: store <4 x float> [[TMP6]], ptr [[DST_ADDR_022]], align 4
166 ; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds float, ptr [[SRC_ADDR_021]], i64 [[I_023]]
167 ; CHECK-NEXT: [[ADD_PTR8]] = getelementptr inbounds float, ptr [[DST_ADDR_022]], i64 [[I_023]]
168 ; CHECK-NEXT: [[INC]] = add i64 [[I_023]], 1
169 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INC]], [[COUNT]]
170 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]]
172 ; CHECK-NEXT: ret void
175 %cmp20 = icmp eq i64 %count, 0
176 br i1 %cmp20, label %for.end, label %for.body
178 for.body: ; preds = %entry, %for.body
179 %i.023 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
180 %dst.addr.022 = phi ptr [ %add.ptr8, %for.body ], [ %dst, %entry ]
181 %src.addr.021 = phi ptr [ %add.ptr, %for.body ], [ %src, %entry ]
182 %0 = load float, ptr %src.addr.021, align 4
183 store float %0, ptr %dst.addr.022, align 4
184 %arrayidx2 = getelementptr inbounds float, ptr %src.addr.021, i64 4
185 %1 = load float, ptr %arrayidx2, align 4
186 %arrayidx3 = getelementptr inbounds float, ptr %dst.addr.022, i64 1
187 store float %1, ptr %arrayidx3, align 4
188 %arrayidx4 = getelementptr inbounds float, ptr %src.addr.021, i64 2
189 %2 = load float, ptr %arrayidx4, align 4
190 %arrayidx5 = getelementptr inbounds float, ptr %dst.addr.022, i64 2
191 store float %2, ptr %arrayidx5, align 4
192 %arrayidx6 = getelementptr inbounds float, ptr %src.addr.021, i64 3
193 %3 = load float, ptr %arrayidx6, align 4
194 %arrayidx7 = getelementptr inbounds float, ptr %dst.addr.022, i64 3
195 store float %3, ptr %arrayidx7, align 4
196 %add.ptr = getelementptr inbounds float, ptr %src.addr.021, i64 %i.023
197 %add.ptr8 = getelementptr inbounds float, ptr %dst.addr.022, i64 %i.023
198 %inc = add i64 %i.023, 1
199 %exitcond = icmp eq i64 %inc, %count
200 br i1 %exitcond, label %for.end, label %for.body
202 for.end: ; preds = %for.body, %entry
206 define void @store_splat(ptr, float) {
207 ; CHECK-LABEL: @store_splat(
208 ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[TMP1:%.*]], i32 0
209 ; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> poison, <4 x i32> zeroinitializer
210 ; CHECK-NEXT: store <4 x float> [[TMP4]], ptr [[TMP0:%.*]], align 4
211 ; CHECK-NEXT: ret void
213 store float %1, ptr %0, align 4
214 %3 = getelementptr inbounds float, ptr %0, i64 1
215 store float %1, ptr %3, align 4
216 %4 = getelementptr inbounds float, ptr %0, i64 2
217 store float %1, ptr %4, align 4
218 %5 = getelementptr inbounds float, ptr %0, i64 3
219 store float %1, ptr %5, align 4
223 define void @store_const(ptr %a) {
224 ; CHECK-LABEL: @store_const(
226 ; CHECK-NEXT: store <4 x i32> <i32 10, i32 30, i32 20, i32 40>, ptr [[A:%.*]], align 4
227 ; CHECK-NEXT: ret void
230 store i32 10, ptr %a, align 4
231 %ptr1 = getelementptr inbounds i32, ptr %a, i64 1
232 store i32 30, ptr %ptr1, align 4
233 %ptr2 = getelementptr inbounds i32, ptr %a, i64 2
234 store i32 20, ptr %ptr2, align 4
235 %ptr3 = getelementptr inbounds i32, ptr %a, i64 3
236 store i32 40, ptr %ptr3, align 4
240 define void @tiny_vector_gather(ptr %a, ptr %v1, ptr %v2) {
241 ; CHECK-LABEL: @tiny_vector_gather(
242 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[V1:%.*]], align 4
243 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[V2:%.*]], align 4
244 ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> poison, i32 [[TMP1]], i32 0
245 ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[TMP2]], i32 1
246 ; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i32> [[TMP4]], <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
247 ; CHECK-NEXT: store <8 x i32> [[TMP5]], ptr [[A:%.*]], align 16
248 ; CHECK-NEXT: ret void
250 %1 = load i32, ptr %v1, align 4
251 %2 = load i32, ptr %v2, align 4
252 store i32 %1, ptr %a, align 16
253 %ptr1 = getelementptr inbounds i32, ptr %a, i64 1
254 store i32 %2, ptr %ptr1, align 4
255 %ptr2 = getelementptr inbounds i32, ptr %a, i64 2
256 store i32 %1, ptr %ptr2, align 8
257 %ptr3 = getelementptr inbounds i32, ptr %a, i64 3
258 store i32 %2, ptr %ptr3, align 4
259 %ptr4 = getelementptr inbounds i32, ptr %a, i64 4
260 store i32 %1, ptr %ptr4, align 16
261 %ptr5 = getelementptr inbounds i32, ptr %a, i64 5
262 store i32 %2, ptr %ptr5, align 4
263 %ptr6 = getelementptr inbounds i32, ptr %a, i64 6
264 store i32 %1, ptr %ptr6, align 8
265 %ptr7 = getelementptr inbounds i32, ptr %a, i64 7
266 store i32 %2, ptr %ptr7, align 4
270 define void @tiny_vector_with_diff_opcode(ptr %a, ptr %v1) {
271 ; CHECK-LABEL: @tiny_vector_with_diff_opcode(
272 ; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[V1:%.*]], align 4
273 ; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 undef to i16
274 ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> poison, i16 [[TMP1]], i32 0
275 ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[TMP2]], i32 1
276 ; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i16> [[TMP4]], <8 x i16> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
277 ; CHECK-NEXT: store <8 x i16> [[TMP5]], ptr [[A:%.*]], align 16
278 ; CHECK-NEXT: ret void
280 %1 = load i16, ptr %v1, align 4
281 %2 = trunc i64 undef to i16
282 store i16 %1, ptr %a, align 16
283 %ptr1 = getelementptr inbounds i16, ptr %a, i64 1
284 store i16 %2, ptr %ptr1, align 4
285 %ptr2 = getelementptr inbounds i16, ptr %a, i64 2
286 store i16 %1, ptr %ptr2, align 8
287 %ptr3 = getelementptr inbounds i16, ptr %a, i64 3
288 store i16 %2, ptr %ptr3, align 4
289 %ptr4 = getelementptr inbounds i16, ptr %a, i64 4
290 store i16 %1, ptr %ptr4, align 16
291 %ptr5 = getelementptr inbounds i16, ptr %a, i64 5
292 store i16 %2, ptr %ptr5, align 4
293 %ptr6 = getelementptr inbounds i16, ptr %a, i64 6
294 store i16 %1, ptr %ptr6, align 8
295 %ptr7 = getelementptr inbounds i16, ptr %a, i64 7
296 store i16 %2, ptr %ptr7, align 4