| blob | 92760b43e273b57c0676c28bbc4f5874e73c0335 |
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -passes=slp-vectorizer -S -o - -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell < %s | FileCheck %s
4 @k = external dso_local constant [8 x [4 x i32]], align 16
5 @l = external dso_local global [366 x i32], align 16
7 ; Function Attrs: nofree norecurse noreturn nounwind writeonly
8 define void @n() local_unnamed_addr #0 {
9 ; CHECK-LABEL: @n(
10 ; CHECK-NEXT: entry:
11 ; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr @k, align 16
12 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 1, i64 0), align 16
13 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 1, i64 1), align 4
14 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 1, i64 2), align 8
15 ; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 1, i64 3), align 4
16 ; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 2, i64 0), align 16
17 ; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 2, i64 1), align 4
18 ; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 2, i64 2), align 8
19 ; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 2, i64 3), align 4
20 ; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 3, i64 0), align 16
21 ; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 3, i64 1), align 4
22 ; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 3, i64 2), align 8
23 ; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 3, i64 3), align 4
24 ; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 4, i64 0), align 16
25 ; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 4, i64 1), align 4
26 ; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 4, i64 2), align 8
27 ; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 4, i64 3), align 4
28 ; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 5, i64 0), align 16
29 ; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 5, i64 1), align 4
30 ; CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 5, i64 2), align 8
31 ; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 5, i64 3), align 4
32 ; CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 6, i64 0), align 16
33 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 6, i64 1), align 4
34 ; CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 6, i64 2), align 8
35 ; CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 6, i64 3), align 4
36 ; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 7, i64 0), align 16
37 ; CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 7, i64 1), align 4
38 ; CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 7, i64 2), align 8
39 ; CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 7, i64 3), align 4
40 ; CHECK-NEXT: br label [[FOR_COND:%.*]]
41 ; CHECK: for.cond:
42 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_COND]] ], [ 0, [[ENTRY:%.*]] ]
43 ; CHECK-NEXT: [[B_0:%.*]] = phi i32 [ [[SPEC_SELECT8_3_7:%.*]], [[FOR_COND]] ], [ undef, [[ENTRY]] ]
44 ; CHECK-NEXT: [[TMP29:%.*]] = trunc i64 [[INDVARS_IV]] to i32
45 ; CHECK-NEXT: [[TMP30:%.*]] = add i32 [[TMP29]], -183
46 ; CHECK-NEXT: [[TMP31:%.*]] = insertelement <4 x i32> poison, i32 [[TMP30]], i32 0
47 ; CHECK-NEXT: [[TMP32:%.*]] = shufflevector <4 x i32> [[TMP31]], <4 x i32> poison, <4 x i32> zeroinitializer
48 ; CHECK-NEXT: [[TMP33:%.*]] = sub <4 x i32> [[TMP32]], [[TMP0]]
49 ; CHECK-NEXT: [[TMP34:%.*]] = icmp slt <4 x i32> [[TMP33]], zeroinitializer
50 ; CHECK-NEXT: [[TMP35:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP33]]
51 ; CHECK-NEXT: [[TMP36:%.*]] = select <4 x i1> [[TMP34]], <4 x i32> [[TMP35]], <4 x i32> [[TMP33]]
52 ; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> [[TMP36]])
53 ; CHECK-NEXT: [[OP_RDX:%.*]] = icmp slt i32 [[TMP37]], [[B_0]]
54 ; CHECK-NEXT: [[OP_RDX1:%.*]] = select i1 [[OP_RDX]], i32 [[TMP37]], i32 [[B_0]]
55 ; CHECK-NEXT: [[SUB_116:%.*]] = sub i32 [[TMP30]], [[TMP1]]
56 ; CHECK-NEXT: [[TMP38:%.*]] = icmp slt i32 [[SUB_116]], 0
57 ; CHECK-NEXT: [[NEG_117:%.*]] = sub nsw i32 0, [[SUB_116]]
58 ; CHECK-NEXT: [[TMP39:%.*]] = select i1 [[TMP38]], i32 [[NEG_117]], i32 [[SUB_116]]
59 ; CHECK-NEXT: [[CMP12_118:%.*]] = icmp slt i32 [[TMP39]], [[OP_RDX1]]
60 ; CHECK-NEXT: [[SPEC_SELECT8_120:%.*]] = select i1 [[CMP12_118]], i32 [[TMP39]], i32 [[OP_RDX1]]
61 ; CHECK-NEXT: [[SUB_1_1:%.*]] = sub i32 [[TMP30]], [[TMP2]]
62 ; CHECK-NEXT: [[TMP40:%.*]] = icmp slt i32 [[SUB_1_1]], 0
63 ; CHECK-NEXT: [[NEG_1_1:%.*]] = sub nsw i32 0, [[SUB_1_1]]
64 ; CHECK-NEXT: [[TMP41:%.*]] = select i1 [[TMP40]], i32 [[NEG_1_1]], i32 [[SUB_1_1]]
65 ; CHECK-NEXT: [[CMP12_1_1:%.*]] = icmp slt i32 [[TMP41]], [[SPEC_SELECT8_120]]
66 ; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[CMP12_1_1]], [[CMP12_118]]
67 ; CHECK-NEXT: [[SPEC_SELECT8_1_1:%.*]] = select i1 [[CMP12_1_1]], i32 [[TMP41]], i32 [[SPEC_SELECT8_120]]
68 ; CHECK-NEXT: [[SUB_2_1:%.*]] = sub i32 [[TMP30]], [[TMP3]]
69 ; CHECK-NEXT: [[TMP42:%.*]] = icmp slt i32 [[SUB_2_1]], 0
70 ; CHECK-NEXT: [[NEG_2_1:%.*]] = sub nsw i32 0, [[SUB_2_1]]
71 ; CHECK-NEXT: [[TMP43:%.*]] = select i1 [[TMP42]], i32 [[NEG_2_1]], i32 [[SUB_2_1]]
72 ; CHECK-NEXT: [[CMP12_2_1:%.*]] = icmp slt i32 [[TMP43]], [[SPEC_SELECT8_1_1]]
73 ; CHECK-NEXT: [[NARROW34:%.*]] = or i1 [[CMP12_2_1]], [[NARROW]]
74 ; CHECK-NEXT: [[SPEC_SELECT8_2_1:%.*]] = select i1 [[CMP12_2_1]], i32 [[TMP43]], i32 [[SPEC_SELECT8_1_1]]
75 ; CHECK-NEXT: [[SUB_3_1:%.*]] = sub i32 [[TMP30]], [[TMP4]]
76 ; CHECK-NEXT: [[TMP44:%.*]] = icmp slt i32 [[SUB_3_1]], 0
77 ; CHECK-NEXT: [[NEG_3_1:%.*]] = sub nsw i32 0, [[SUB_3_1]]
78 ; CHECK-NEXT: [[TMP45:%.*]] = select i1 [[TMP44]], i32 [[NEG_3_1]], i32 [[SUB_3_1]]
79 ; CHECK-NEXT: [[CMP12_3_1:%.*]] = icmp slt i32 [[TMP45]], [[SPEC_SELECT8_2_1]]
80 ; CHECK-NEXT: [[NARROW35:%.*]] = or i1 [[CMP12_3_1]], [[NARROW34]]
81 ; CHECK-NEXT: [[SPEC_SELECT_3_1:%.*]] = zext i1 [[NARROW35]] to i32
82 ; CHECK-NEXT: [[SPEC_SELECT8_3_1:%.*]] = select i1 [[CMP12_3_1]], i32 [[TMP45]], i32 [[SPEC_SELECT8_2_1]]
83 ; CHECK-NEXT: [[SUB_222:%.*]] = sub i32 [[TMP30]], [[TMP5]]
84 ; CHECK-NEXT: [[TMP46:%.*]] = icmp slt i32 [[SUB_222]], 0
85 ; CHECK-NEXT: [[NEG_223:%.*]] = sub nsw i32 0, [[SUB_222]]
86 ; CHECK-NEXT: [[TMP47:%.*]] = select i1 [[TMP46]], i32 [[NEG_223]], i32 [[SUB_222]]
87 ; CHECK-NEXT: [[CMP12_224:%.*]] = icmp slt i32 [[TMP47]], [[SPEC_SELECT8_3_1]]
88 ; CHECK-NEXT: [[SPEC_SELECT8_226:%.*]] = select i1 [[CMP12_224]], i32 [[TMP47]], i32 [[SPEC_SELECT8_3_1]]
89 ; CHECK-NEXT: [[SUB_1_2:%.*]] = sub i32 [[TMP30]], [[TMP6]]
90 ; CHECK-NEXT: [[TMP48:%.*]] = icmp slt i32 [[SUB_1_2]], 0
91 ; CHECK-NEXT: [[NEG_1_2:%.*]] = sub nsw i32 0, [[SUB_1_2]]
92 ; CHECK-NEXT: [[TMP49:%.*]] = select i1 [[TMP48]], i32 [[NEG_1_2]], i32 [[SUB_1_2]]
93 ; CHECK-NEXT: [[CMP12_1_2:%.*]] = icmp slt i32 [[TMP49]], [[SPEC_SELECT8_226]]
94 ; CHECK-NEXT: [[TMP50:%.*]] = or i1 [[CMP12_1_2]], [[CMP12_224]]
95 ; CHECK-NEXT: [[SPEC_SELECT8_1_2:%.*]] = select i1 [[CMP12_1_2]], i32 [[TMP49]], i32 [[SPEC_SELECT8_226]]
96 ; CHECK-NEXT: [[SUB_2_2:%.*]] = sub i32 [[TMP30]], [[TMP7]]
97 ; CHECK-NEXT: [[TMP51:%.*]] = icmp slt i32 [[SUB_2_2]], 0
98 ; CHECK-NEXT: [[NEG_2_2:%.*]] = sub nsw i32 0, [[SUB_2_2]]
99 ; CHECK-NEXT: [[TMP52:%.*]] = select i1 [[TMP51]], i32 [[NEG_2_2]], i32 [[SUB_2_2]]
100 ; CHECK-NEXT: [[CMP12_2_2:%.*]] = icmp slt i32 [[TMP52]], [[SPEC_SELECT8_1_2]]
101 ; CHECK-NEXT: [[TMP53:%.*]] = or i1 [[CMP12_2_2]], [[TMP50]]
102 ; CHECK-NEXT: [[SPEC_SELECT8_2_2:%.*]] = select i1 [[CMP12_2_2]], i32 [[TMP52]], i32 [[SPEC_SELECT8_1_2]]
103 ; CHECK-NEXT: [[SUB_3_2:%.*]] = sub i32 [[TMP30]], [[TMP8]]
104 ; CHECK-NEXT: [[TMP54:%.*]] = icmp slt i32 [[SUB_3_2]], 0
105 ; CHECK-NEXT: [[NEG_3_2:%.*]] = sub nsw i32 0, [[SUB_3_2]]
106 ; CHECK-NEXT: [[TMP55:%.*]] = select i1 [[TMP54]], i32 [[NEG_3_2]], i32 [[SUB_3_2]]
107 ; CHECK-NEXT: [[CMP12_3_2:%.*]] = icmp slt i32 [[TMP55]], [[SPEC_SELECT8_2_2]]
108 ; CHECK-NEXT: [[TMP56:%.*]] = or i1 [[CMP12_3_2]], [[TMP53]]
109 ; CHECK-NEXT: [[SPEC_SELECT_3_2:%.*]] = select i1 [[TMP56]], i32 2, i32 [[SPEC_SELECT_3_1]]
110 ; CHECK-NEXT: [[SPEC_SELECT8_3_2:%.*]] = select i1 [[CMP12_3_2]], i32 [[TMP55]], i32 [[SPEC_SELECT8_2_2]]
111 ; CHECK-NEXT: [[SUB_328:%.*]] = sub i32 [[TMP30]], [[TMP9]]
112 ; CHECK-NEXT: [[TMP57:%.*]] = icmp slt i32 [[SUB_328]], 0
113 ; CHECK-NEXT: [[NEG_329:%.*]] = sub nsw i32 0, [[SUB_328]]
114 ; CHECK-NEXT: [[TMP58:%.*]] = select i1 [[TMP57]], i32 [[NEG_329]], i32 [[SUB_328]]
115 ; CHECK-NEXT: [[CMP12_330:%.*]] = icmp slt i32 [[TMP58]], [[SPEC_SELECT8_3_2]]
116 ; CHECK-NEXT: [[SPEC_SELECT8_332:%.*]] = select i1 [[CMP12_330]], i32 [[TMP58]], i32 [[SPEC_SELECT8_3_2]]
117 ; CHECK-NEXT: [[SUB_1_3:%.*]] = sub i32 [[TMP30]], [[TMP10]]
118 ; CHECK-NEXT: [[TMP59:%.*]] = icmp slt i32 [[SUB_1_3]], 0
119 ; CHECK-NEXT: [[NEG_1_3:%.*]] = sub nsw i32 0, [[SUB_1_3]]
120 ; CHECK-NEXT: [[TMP60:%.*]] = select i1 [[TMP59]], i32 [[NEG_1_3]], i32 [[SUB_1_3]]
121 ; CHECK-NEXT: [[CMP12_1_3:%.*]] = icmp slt i32 [[TMP60]], [[SPEC_SELECT8_332]]
122 ; CHECK-NEXT: [[TMP61:%.*]] = or i1 [[CMP12_1_3]], [[CMP12_330]]
123 ; CHECK-NEXT: [[SPEC_SELECT8_1_3:%.*]] = select i1 [[CMP12_1_3]], i32 [[TMP60]], i32 [[SPEC_SELECT8_332]]
124 ; CHECK-NEXT: [[SUB_2_3:%.*]] = sub i32 [[TMP30]], [[TMP11]]
125 ; CHECK-NEXT: [[TMP62:%.*]] = icmp slt i32 [[SUB_2_3]], 0
126 ; CHECK-NEXT: [[NEG_2_3:%.*]] = sub nsw i32 0, [[SUB_2_3]]
127 ; CHECK-NEXT: [[TMP63:%.*]] = select i1 [[TMP62]], i32 [[NEG_2_3]], i32 [[SUB_2_3]]
128 ; CHECK-NEXT: [[CMP12_2_3:%.*]] = icmp slt i32 [[TMP63]], [[SPEC_SELECT8_1_3]]
129 ; CHECK-NEXT: [[TMP64:%.*]] = or i1 [[CMP12_2_3]], [[TMP61]]
130 ; CHECK-NEXT: [[SPEC_SELECT8_2_3:%.*]] = select i1 [[CMP12_2_3]], i32 [[TMP63]], i32 [[SPEC_SELECT8_1_3]]
131 ; CHECK-NEXT: [[SUB_3_3:%.*]] = sub i32 [[TMP30]], [[TMP12]]
132 ; CHECK-NEXT: [[TMP65:%.*]] = icmp slt i32 [[SUB_3_3]], 0
133 ; CHECK-NEXT: [[NEG_3_3:%.*]] = sub nsw i32 0, [[SUB_3_3]]
134 ; CHECK-NEXT: [[TMP66:%.*]] = select i1 [[TMP65]], i32 [[NEG_3_3]], i32 [[SUB_3_3]]
135 ; CHECK-NEXT: [[CMP12_3_3:%.*]] = icmp slt i32 [[TMP66]], [[SPEC_SELECT8_2_3]]
136 ; CHECK-NEXT: [[TMP67:%.*]] = or i1 [[CMP12_3_3]], [[TMP64]]
137 ; CHECK-NEXT: [[SPEC_SELECT_3_3:%.*]] = select i1 [[TMP67]], i32 3, i32 [[SPEC_SELECT_3_2]]
138 ; CHECK-NEXT: [[SPEC_SELECT8_3_3:%.*]] = select i1 [[CMP12_3_3]], i32 [[TMP66]], i32 [[SPEC_SELECT8_2_3]]
139 ; CHECK-NEXT: [[SUB_4:%.*]] = sub i32 [[TMP30]], [[TMP13]]
140 ; CHECK-NEXT: [[TMP68:%.*]] = icmp slt i32 [[SUB_4]], 0
141 ; CHECK-NEXT: [[NEG_4:%.*]] = sub nsw i32 0, [[SUB_4]]
142 ; CHECK-NEXT: [[TMP69:%.*]] = select i1 [[TMP68]], i32 [[NEG_4]], i32 [[SUB_4]]
143 ; CHECK-NEXT: [[CMP12_4:%.*]] = icmp slt i32 [[TMP69]], [[SPEC_SELECT8_3_3]]
144 ; CHECK-NEXT: [[SPEC_SELECT8_4:%.*]] = select i1 [[CMP12_4]], i32 [[TMP69]], i32 [[SPEC_SELECT8_3_3]]
145 ; CHECK-NEXT: [[SUB_1_4:%.*]] = sub i32 [[TMP30]], [[TMP14]]
146 ; CHECK-NEXT: [[TMP70:%.*]] = icmp slt i32 [[SUB_1_4]], 0
147 ; CHECK-NEXT: [[NEG_1_4:%.*]] = sub nsw i32 0, [[SUB_1_4]]
148 ; CHECK-NEXT: [[TMP71:%.*]] = select i1 [[TMP70]], i32 [[NEG_1_4]], i32 [[SUB_1_4]]
149 ; CHECK-NEXT: [[CMP12_1_4:%.*]] = icmp slt i32 [[TMP71]], [[SPEC_SELECT8_4]]
150 ; CHECK-NEXT: [[TMP72:%.*]] = or i1 [[CMP12_1_4]], [[CMP12_4]]
151 ; CHECK-NEXT: [[SPEC_SELECT8_1_4:%.*]] = select i1 [[CMP12_1_4]], i32 [[TMP71]], i32 [[SPEC_SELECT8_4]]
152 ; CHECK-NEXT: [[SUB_2_4:%.*]] = sub i32 [[TMP30]], [[TMP15]]
153 ; CHECK-NEXT: [[TMP73:%.*]] = icmp slt i32 [[SUB_2_4]], 0
154 ; CHECK-NEXT: [[NEG_2_4:%.*]] = sub nsw i32 0, [[SUB_2_4]]
155 ; CHECK-NEXT: [[TMP74:%.*]] = select i1 [[TMP73]], i32 [[NEG_2_4]], i32 [[SUB_2_4]]
156 ; CHECK-NEXT: [[CMP12_2_4:%.*]] = icmp slt i32 [[TMP74]], [[SPEC_SELECT8_1_4]]
157 ; CHECK-NEXT: [[TMP75:%.*]] = or i1 [[CMP12_2_4]], [[TMP72]]
158 ; CHECK-NEXT: [[SPEC_SELECT8_2_4:%.*]] = select i1 [[CMP12_2_4]], i32 [[TMP74]], i32 [[SPEC_SELECT8_1_4]]
159 ; CHECK-NEXT: [[SUB_3_4:%.*]] = sub i32 [[TMP30]], [[TMP16]]
160 ; CHECK-NEXT: [[TMP76:%.*]] = icmp slt i32 [[SUB_3_4]], 0
161 ; CHECK-NEXT: [[NEG_3_4:%.*]] = sub nsw i32 0, [[SUB_3_4]]
162 ; CHECK-NEXT: [[TMP77:%.*]] = select i1 [[TMP76]], i32 [[NEG_3_4]], i32 [[SUB_3_4]]
163 ; CHECK-NEXT: [[CMP12_3_4:%.*]] = icmp slt i32 [[TMP77]], [[SPEC_SELECT8_2_4]]
164 ; CHECK-NEXT: [[TMP78:%.*]] = or i1 [[CMP12_3_4]], [[TMP75]]
165 ; CHECK-NEXT: [[SPEC_SELECT_3_4:%.*]] = select i1 [[TMP78]], i32 4, i32 [[SPEC_SELECT_3_3]]
166 ; CHECK-NEXT: [[SPEC_SELECT8_3_4:%.*]] = select i1 [[CMP12_3_4]], i32 [[TMP77]], i32 [[SPEC_SELECT8_2_4]]
167 ; CHECK-NEXT: [[SUB_5:%.*]] = sub i32 [[TMP30]], [[TMP17]]
168 ; CHECK-NEXT: [[TMP79:%.*]] = icmp slt i32 [[SUB_5]], 0
169 ; CHECK-NEXT: [[NEG_5:%.*]] = sub nsw i32 0, [[SUB_5]]
170 ; CHECK-NEXT: [[TMP80:%.*]] = select i1 [[TMP79]], i32 [[NEG_5]], i32 [[SUB_5]]
171 ; CHECK-NEXT: [[CMP12_5:%.*]] = icmp slt i32 [[TMP80]], [[SPEC_SELECT8_3_4]]
172 ; CHECK-NEXT: [[SPEC_SELECT8_5:%.*]] = select i1 [[CMP12_5]], i32 [[TMP80]], i32 [[SPEC_SELECT8_3_4]]
173 ; CHECK-NEXT: [[SUB_1_5:%.*]] = sub i32 [[TMP30]], [[TMP18]]
174 ; CHECK-NEXT: [[TMP81:%.*]] = icmp slt i32 [[SUB_1_5]], 0
175 ; CHECK-NEXT: [[NEG_1_5:%.*]] = sub nsw i32 0, [[SUB_1_5]]
176 ; CHECK-NEXT: [[TMP82:%.*]] = select i1 [[TMP81]], i32 [[NEG_1_5]], i32 [[SUB_1_5]]
177 ; CHECK-NEXT: [[CMP12_1_5:%.*]] = icmp slt i32 [[TMP82]], [[SPEC_SELECT8_5]]
178 ; CHECK-NEXT: [[TMP83:%.*]] = or i1 [[CMP12_1_5]], [[CMP12_5]]
179 ; CHECK-NEXT: [[SPEC_SELECT8_1_5:%.*]] = select i1 [[CMP12_1_5]], i32 [[TMP82]], i32 [[SPEC_SELECT8_5]]
180 ; CHECK-NEXT: [[SUB_2_5:%.*]] = sub i32 [[TMP30]], [[TMP19]]
181 ; CHECK-NEXT: [[TMP84:%.*]] = icmp slt i32 [[SUB_2_5]], 0
182 ; CHECK-NEXT: [[NEG_2_5:%.*]] = sub nsw i32 0, [[SUB_2_5]]
183 ; CHECK-NEXT: [[TMP85:%.*]] = select i1 [[TMP84]], i32 [[NEG_2_5]], i32 [[SUB_2_5]]
184 ; CHECK-NEXT: [[CMP12_2_5:%.*]] = icmp slt i32 [[TMP85]], [[SPEC_SELECT8_1_5]]
185 ; CHECK-NEXT: [[TMP86:%.*]] = or i1 [[CMP12_2_5]], [[TMP83]]
186 ; CHECK-NEXT: [[SPEC_SELECT8_2_5:%.*]] = select i1 [[CMP12_2_5]], i32 [[TMP85]], i32 [[SPEC_SELECT8_1_5]]
187 ; CHECK-NEXT: [[SUB_3_5:%.*]] = sub i32 [[TMP30]], [[TMP20]]
188 ; CHECK-NEXT: [[TMP87:%.*]] = icmp slt i32 [[SUB_3_5]], 0
189 ; CHECK-NEXT: [[NEG_3_5:%.*]] = sub nsw i32 0, [[SUB_3_5]]
190 ; CHECK-NEXT: [[TMP88:%.*]] = select i1 [[TMP87]], i32 [[NEG_3_5]], i32 [[SUB_3_5]]
191 ; CHECK-NEXT: [[CMP12_3_5:%.*]] = icmp slt i32 [[TMP88]], [[SPEC_SELECT8_2_5]]
192 ; CHECK-NEXT: [[TMP89:%.*]] = or i1 [[CMP12_3_5]], [[TMP86]]
193 ; CHECK-NEXT: [[SPEC_SELECT_3_5:%.*]] = select i1 [[TMP89]], i32 5, i32 [[SPEC_SELECT_3_4]]
194 ; CHECK-NEXT: [[SPEC_SELECT8_3_5:%.*]] = select i1 [[CMP12_3_5]], i32 [[TMP88]], i32 [[SPEC_SELECT8_2_5]]
195 ; CHECK-NEXT: [[SUB_6:%.*]] = sub i32 [[TMP30]], [[TMP21]]
196 ; CHECK-NEXT: [[TMP90:%.*]] = icmp slt i32 [[SUB_6]], 0
197 ; CHECK-NEXT: [[NEG_6:%.*]] = sub nsw i32 0, [[SUB_6]]
198 ; CHECK-NEXT: [[TMP91:%.*]] = select i1 [[TMP90]], i32 [[NEG_6]], i32 [[SUB_6]]
199 ; CHECK-NEXT: [[CMP12_6:%.*]] = icmp slt i32 [[TMP91]], [[SPEC_SELECT8_3_5]]
200 ; CHECK-NEXT: [[SPEC_SELECT8_6:%.*]] = select i1 [[CMP12_6]], i32 [[TMP91]], i32 [[SPEC_SELECT8_3_5]]
201 ; CHECK-NEXT: [[SUB_1_6:%.*]] = sub i32 [[TMP30]], [[TMP22]]
202 ; CHECK-NEXT: [[TMP92:%.*]] = icmp slt i32 [[SUB_1_6]], 0
203 ; CHECK-NEXT: [[NEG_1_6:%.*]] = sub nsw i32 0, [[SUB_1_6]]
204 ; CHECK-NEXT: [[TMP93:%.*]] = select i1 [[TMP92]], i32 [[NEG_1_6]], i32 [[SUB_1_6]]
205 ; CHECK-NEXT: [[CMP12_1_6:%.*]] = icmp slt i32 [[TMP93]], [[SPEC_SELECT8_6]]
206 ; CHECK-NEXT: [[TMP94:%.*]] = or i1 [[CMP12_1_6]], [[CMP12_6]]
207 ; CHECK-NEXT: [[SPEC_SELECT8_1_6:%.*]] = select i1 [[CMP12_1_6]], i32 [[TMP93]], i32 [[SPEC_SELECT8_6]]
208 ; CHECK-NEXT: [[SUB_2_6:%.*]] = sub i32 [[TMP30]], [[TMP23]]
209 ; CHECK-NEXT: [[TMP95:%.*]] = icmp slt i32 [[SUB_2_6]], 0
210 ; CHECK-NEXT: [[NEG_2_6:%.*]] = sub nsw i32 0, [[SUB_2_6]]
211 ; CHECK-NEXT: [[TMP96:%.*]] = select i1 [[TMP95]], i32 [[NEG_2_6]], i32 [[SUB_2_6]]
212 ; CHECK-NEXT: [[CMP12_2_6:%.*]] = icmp slt i32 [[TMP96]], [[SPEC_SELECT8_1_6]]
213 ; CHECK-NEXT: [[TMP97:%.*]] = or i1 [[CMP12_2_6]], [[TMP94]]
214 ; CHECK-NEXT: [[SPEC_SELECT8_2_6:%.*]] = select i1 [[CMP12_2_6]], i32 [[TMP96]], i32 [[SPEC_SELECT8_1_6]]
215 ; CHECK-NEXT: [[SUB_3_6:%.*]] = sub i32 [[TMP30]], [[TMP24]]
216 ; CHECK-NEXT: [[TMP98:%.*]] = icmp slt i32 [[SUB_3_6]], 0
217 ; CHECK-NEXT: [[NEG_3_6:%.*]] = sub nsw i32 0, [[SUB_3_6]]
218 ; CHECK-NEXT: [[TMP99:%.*]] = select i1 [[TMP98]], i32 [[NEG_3_6]], i32 [[SUB_3_6]]
219 ; CHECK-NEXT: [[CMP12_3_6:%.*]] = icmp slt i32 [[TMP99]], [[SPEC_SELECT8_2_6]]
220 ; CHECK-NEXT: [[TMP100:%.*]] = or i1 [[CMP12_3_6]], [[TMP97]]
221 ; CHECK-NEXT: [[SPEC_SELECT_3_6:%.*]] = select i1 [[TMP100]], i32 6, i32 [[SPEC_SELECT_3_5]]
222 ; CHECK-NEXT: [[SPEC_SELECT8_3_6:%.*]] = select i1 [[CMP12_3_6]], i32 [[TMP99]], i32 [[SPEC_SELECT8_2_6]]
223 ; CHECK-NEXT: [[SUB_7:%.*]] = sub i32 [[TMP30]], [[TMP25]]
224 ; CHECK-NEXT: [[TMP101:%.*]] = icmp slt i32 [[SUB_7]], 0
225 ; CHECK-NEXT: [[NEG_7:%.*]] = sub nsw i32 0, [[SUB_7]]
226 ; CHECK-NEXT: [[TMP102:%.*]] = select i1 [[TMP101]], i32 [[NEG_7]], i32 [[SUB_7]]
227 ; CHECK-NEXT: [[CMP12_7:%.*]] = icmp slt i32 [[TMP102]], [[SPEC_SELECT8_3_6]]
228 ; CHECK-NEXT: [[SPEC_SELECT8_7:%.*]] = select i1 [[CMP12_7]], i32 [[TMP102]], i32 [[SPEC_SELECT8_3_6]]
229 ; CHECK-NEXT: [[SUB_1_7:%.*]] = sub i32 [[TMP30]], [[TMP26]]
230 ; CHECK-NEXT: [[TMP103:%.*]] = icmp slt i32 [[SUB_1_7]], 0
231 ; CHECK-NEXT: [[NEG_1_7:%.*]] = sub nsw i32 0, [[SUB_1_7]]
232 ; CHECK-NEXT: [[TMP104:%.*]] = select i1 [[TMP103]], i32 [[NEG_1_7]], i32 [[SUB_1_7]]
233 ; CHECK-NEXT: [[CMP12_1_7:%.*]] = icmp slt i32 [[TMP104]], [[SPEC_SELECT8_7]]
234 ; CHECK-NEXT: [[TMP105:%.*]] = or i1 [[CMP12_1_7]], [[CMP12_7]]
235 ; CHECK-NEXT: [[SPEC_SELECT8_1_7:%.*]] = select i1 [[CMP12_1_7]], i32 [[TMP104]], i32 [[SPEC_SELECT8_7]]
236 ; CHECK-NEXT: [[SUB_2_7:%.*]] = sub i32 [[TMP30]], [[TMP27]]
237 ; CHECK-NEXT: [[TMP106:%.*]] = icmp slt i32 [[SUB_2_7]], 0
238 ; CHECK-NEXT: [[NEG_2_7:%.*]] = sub nsw i32 0, [[SUB_2_7]]
239 ; CHECK-NEXT: [[TMP107:%.*]] = select i1 [[TMP106]], i32 [[NEG_2_7]], i32 [[SUB_2_7]]
240 ; CHECK-NEXT: [[CMP12_2_7:%.*]] = icmp slt i32 [[TMP107]], [[SPEC_SELECT8_1_7]]
241 ; CHECK-NEXT: [[TMP108:%.*]] = or i1 [[CMP12_2_7]], [[TMP105]]
242 ; CHECK-NEXT: [[SPEC_SELECT8_2_7:%.*]] = select i1 [[CMP12_2_7]], i32 [[TMP107]], i32 [[SPEC_SELECT8_1_7]]
243 ; CHECK-NEXT: [[SUB_3_7:%.*]] = sub i32 [[TMP30]], [[TMP28]]
244 ; CHECK-NEXT: [[TMP109:%.*]] = icmp slt i32 [[SUB_3_7]], 0
245 ; CHECK-NEXT: [[NEG_3_7:%.*]] = sub nsw i32 0, [[SUB_3_7]]
246 ; CHECK-NEXT: [[TMP110:%.*]] = select i1 [[TMP109]], i32 [[NEG_3_7]], i32 [[SUB_3_7]]
247 ; CHECK-NEXT: [[CMP12_3_7:%.*]] = icmp slt i32 [[TMP110]], [[SPEC_SELECT8_2_7]]
248 ; CHECK-NEXT: [[TMP111:%.*]] = or i1 [[CMP12_3_7]], [[TMP108]]
249 ; CHECK-NEXT: [[SPEC_SELECT_3_7:%.*]] = select i1 [[TMP111]], i32 7, i32 [[SPEC_SELECT_3_6]]
250 ; CHECK-NEXT: [[SPEC_SELECT8_3_7]] = select i1 [[CMP12_3_7]], i32 [[TMP110]], i32 [[SPEC_SELECT8_2_7]]
251 ; CHECK-NEXT: [[K:%.*]] = getelementptr inbounds [366 x i32], ptr @l, i64 0, i64 [[INDVARS_IV]]
252 ; CHECK-NEXT: store i32 [[SPEC_SELECT_3_7]], ptr [[K]], align 4
253 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
254 ; CHECK-NEXT: br label [[FOR_COND]]
255 ;
256 entry:
257 %0 = load i32, ptr @k, align 16
258 %1 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 0, i64 1), align 4
259 %2 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 0, i64 2), align 8
260 %3 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 0, i64 3), align 4
261 %4 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 1, i64 0), align 16
262 %5 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 1, i64 1), align 4
263 %6 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 1, i64 2), align 8
264 %7 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 1, i64 3), align 4
265 %8 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 2, i64 0), align 16
266 %9 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 2, i64 1), align 4
267 %10 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 2, i64 2), align 8
268 %11 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 2, i64 3), align 4
269 %12 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 3, i64 0), align 16
270 %13 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 3, i64 1), align 4
271 %14 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 3, i64 2), align 8
272 %15 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 3, i64 3), align 4
273 %16 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 4, i64 0), align 16
274 %17 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 4, i64 1), align 4
275 %18 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 4, i64 2), align 8
276 %19 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 4, i64 3), align 4
277 %20 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 5, i64 0), align 16
278 %21 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 5, i64 1), align 4
279 %22 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 5, i64 2), align 8
280 %23 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 5, i64 3), align 4
281 %24 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 6, i64 0), align 16
282 %25 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 6, i64 1), align 4
283 %26 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 6, i64 2), align 8
284 %27 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 6, i64 3), align 4
285 %28 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 7, i64 0), align 16
286 %29 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 7, i64 1), align 4
287 %30 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 7, i64 2), align 8
288 %31 = load i32, ptr getelementptr inbounds ([8 x [4 x i32]], ptr @k, i64 0, i64 7, i64 3), align 4
289 br label %for.cond
291 for.cond: ; preds = %for.cond, %entry
292 %indvars.iv = phi i64 [ %indvars.iv.next, %for.cond ], [ 0, %entry ]
293 %b.0 = phi i32 [ %spec.select8.3.7, %for.cond ], [ undef, %entry ]
294 %32 = trunc i64 %indvars.iv to i32
295 %33 = add i32 %32, -183
296 %sub = sub i32 %33, %0
297 %34 = icmp slt i32 %sub, 0
298 %neg = sub nsw i32 0, %sub
299 %35 = select i1 %34, i32 %neg, i32 %sub
300 %cmp12 = icmp slt i32 %35, %b.0
301 %spec.select8 = select i1 %cmp12, i32 %35, i32 %b.0
302 %sub.1 = sub i32 %33, %1
303 %36 = icmp slt i32 %sub.1, 0
304 %neg.1 = sub nsw i32 0, %sub.1
305 %37 = select i1 %36, i32 %neg.1, i32 %sub.1
306 %cmp12.1 = icmp slt i32 %37, %spec.select8
307 %spec.select8.1 = select i1 %cmp12.1, i32 %37, i32 %spec.select8
308 %sub.2 = sub i32 %33, %2
309 %38 = icmp slt i32 %sub.2, 0
310 %neg.2 = sub nsw i32 0, %sub.2
311 %39 = select i1 %38, i32 %neg.2, i32 %sub.2
312 %cmp12.2 = icmp slt i32 %39, %spec.select8.1
313 %spec.select8.2 = select i1 %cmp12.2, i32 %39, i32 %spec.select8.1
314 %sub.3 = sub i32 %33, %3
315 %40 = icmp slt i32 %sub.3, 0
316 %neg.3 = sub nsw i32 0, %sub.3
317 %41 = select i1 %40, i32 %neg.3, i32 %sub.3
318 %cmp12.3 = icmp slt i32 %41, %spec.select8.2
319 %spec.select8.3 = select i1 %cmp12.3, i32 %41, i32 %spec.select8.2
320 %sub.116 = sub i32 %33, %4
321 %42 = icmp slt i32 %sub.116, 0
322 %neg.117 = sub nsw i32 0, %sub.116
323 %43 = select i1 %42, i32 %neg.117, i32 %sub.116
324 %cmp12.118 = icmp slt i32 %43, %spec.select8.3
325 %spec.select8.120 = select i1 %cmp12.118, i32 %43, i32 %spec.select8.3
326 %sub.1.1 = sub i32 %33, %5
327 %44 = icmp slt i32 %sub.1.1, 0
328 %neg.1.1 = sub nsw i32 0, %sub.1.1
329 %45 = select i1 %44, i32 %neg.1.1, i32 %sub.1.1
330 %cmp12.1.1 = icmp slt i32 %45, %spec.select8.120
331 %narrow = or i1 %cmp12.1.1, %cmp12.118
332 %spec.select8.1.1 = select i1 %cmp12.1.1, i32 %45, i32 %spec.select8.120
333 %sub.2.1 = sub i32 %33, %6
334 %46 = icmp slt i32 %sub.2.1, 0
335 %neg.2.1 = sub nsw i32 0, %sub.2.1
336 %47 = select i1 %46, i32 %neg.2.1, i32 %sub.2.1
337 %cmp12.2.1 = icmp slt i32 %47, %spec.select8.1.1
338 %narrow34 = or i1 %cmp12.2.1, %narrow
339 %spec.select8.2.1 = select i1 %cmp12.2.1, i32 %47, i32 %spec.select8.1.1
340 %sub.3.1 = sub i32 %33, %7
341 %48 = icmp slt i32 %sub.3.1, 0
342 %neg.3.1 = sub nsw i32 0, %sub.3.1
343 %49 = select i1 %48, i32 %neg.3.1, i32 %sub.3.1
344 %cmp12.3.1 = icmp slt i32 %49, %spec.select8.2.1
345 %narrow35 = or i1 %cmp12.3.1, %narrow34
346 %spec.select.3.1 = zext i1 %narrow35 to i32
347 %spec.select8.3.1 = select i1 %cmp12.3.1, i32 %49, i32 %spec.select8.2.1
348 %sub.222 = sub i32 %33, %8
349 %50 = icmp slt i32 %sub.222, 0
350 %neg.223 = sub nsw i32 0, %sub.222
351 %51 = select i1 %50, i32 %neg.223, i32 %sub.222
352 %cmp12.224 = icmp slt i32 %51, %spec.select8.3.1
353 %spec.select8.226 = select i1 %cmp12.224, i32 %51, i32 %spec.select8.3.1
354 %sub.1.2 = sub i32 %33, %9
355 %52 = icmp slt i32 %sub.1.2, 0
356 %neg.1.2 = sub nsw i32 0, %sub.1.2
357 %53 = select i1 %52, i32 %neg.1.2, i32 %sub.1.2
358 %cmp12.1.2 = icmp slt i32 %53, %spec.select8.226
359 %54 = or i1 %cmp12.1.2, %cmp12.224
360 %spec.select8.1.2 = select i1 %cmp12.1.2, i32 %53, i32 %spec.select8.226
361 %sub.2.2 = sub i32 %33, %10
362 %55 = icmp slt i32 %sub.2.2, 0
363 %neg.2.2 = sub nsw i32 0, %sub.2.2
364 %56 = select i1 %55, i32 %neg.2.2, i32 %sub.2.2
365 %cmp12.2.2 = icmp slt i32 %56, %spec.select8.1.2
366 %57 = or i1 %cmp12.2.2, %54
367 %spec.select8.2.2 = select i1 %cmp12.2.2, i32 %56, i32 %spec.select8.1.2
368 %sub.3.2 = sub i32 %33, %11
369 %58 = icmp slt i32 %sub.3.2, 0
370 %neg.3.2 = sub nsw i32 0, %sub.3.2
371 %59 = select i1 %58, i32 %neg.3.2, i32 %sub.3.2
372 %cmp12.3.2 = icmp slt i32 %59, %spec.select8.2.2
373 %60 = or i1 %cmp12.3.2, %57
374 %spec.select.3.2 = select i1 %60, i32 2, i32 %spec.select.3.1
375 %spec.select8.3.2 = select i1 %cmp12.3.2, i32 %59, i32 %spec.select8.2.2
376 %sub.328 = sub i32 %33, %12
377 %61 = icmp slt i32 %sub.328, 0
378 %neg.329 = sub nsw i32 0, %sub.328
379 %62 = select i1 %61, i32 %neg.329, i32 %sub.328
380 %cmp12.330 = icmp slt i32 %62, %spec.select8.3.2
381 %spec.select8.332 = select i1 %cmp12.330, i32 %62, i32 %spec.select8.3.2
382 %sub.1.3 = sub i32 %33, %13
383 %63 = icmp slt i32 %sub.1.3, 0
384 %neg.1.3 = sub nsw i32 0, %sub.1.3
385 %64 = select i1 %63, i32 %neg.1.3, i32 %sub.1.3
386 %cmp12.1.3 = icmp slt i32 %64, %spec.select8.332
387 %65 = or i1 %cmp12.1.3, %cmp12.330
388 %spec.select8.1.3 = select i1 %cmp12.1.3, i32 %64, i32 %spec.select8.332
389 %sub.2.3 = sub i32 %33, %14
390 %66 = icmp slt i32 %sub.2.3, 0
391 %neg.2.3 = sub nsw i32 0, %sub.2.3
392 %67 = select i1 %66, i32 %neg.2.3, i32 %sub.2.3
393 %cmp12.2.3 = icmp slt i32 %67, %spec.select8.1.3
394 %68 = or i1 %cmp12.2.3, %65
395 %spec.select8.2.3 = select i1 %cmp12.2.3, i32 %67, i32 %spec.select8.1.3
396 %sub.3.3 = sub i32 %33, %15
397 %69 = icmp slt i32 %sub.3.3, 0
398 %neg.3.3 = sub nsw i32 0, %sub.3.3
399 %70 = select i1 %69, i32 %neg.3.3, i32 %sub.3.3
400 %cmp12.3.3 = icmp slt i32 %70, %spec.select8.2.3
401 %71 = or i1 %cmp12.3.3, %68
402 %spec.select.3.3 = select i1 %71, i32 3, i32 %spec.select.3.2
403 %spec.select8.3.3 = select i1 %cmp12.3.3, i32 %70, i32 %spec.select8.2.3
404 %sub.4 = sub i32 %33, %16
405 %72 = icmp slt i32 %sub.4, 0
406 %neg.4 = sub nsw i32 0, %sub.4
407 %73 = select i1 %72, i32 %neg.4, i32 %sub.4
408 %cmp12.4 = icmp slt i32 %73, %spec.select8.3.3
409 %spec.select8.4 = select i1 %cmp12.4, i32 %73, i32 %spec.select8.3.3
410 %sub.1.4 = sub i32 %33, %17
411 %74 = icmp slt i32 %sub.1.4, 0
412 %neg.1.4 = sub nsw i32 0, %sub.1.4
413 %75 = select i1 %74, i32 %neg.1.4, i32 %sub.1.4
414 %cmp12.1.4 = icmp slt i32 %75, %spec.select8.4
415 %76 = or i1 %cmp12.1.4, %cmp12.4
416 %spec.select8.1.4 = select i1 %cmp12.1.4, i32 %75, i32 %spec.select8.4
417 %sub.2.4 = sub i32 %33, %18
418 %77 = icmp slt i32 %sub.2.4, 0
419 %neg.2.4 = sub nsw i32 0, %sub.2.4
420 %78 = select i1 %77, i32 %neg.2.4, i32 %sub.2.4
421 %cmp12.2.4 = icmp slt i32 %78, %spec.select8.1.4
422 %79 = or i1 %cmp12.2.4, %76
423 %spec.select8.2.4 = select i1 %cmp12.2.4, i32 %78, i32 %spec.select8.1.4
424 %sub.3.4 = sub i32 %33, %19
425 %80 = icmp slt i32 %sub.3.4, 0
426 %neg.3.4 = sub nsw i32 0, %sub.3.4
427 %81 = select i1 %80, i32 %neg.3.4, i32 %sub.3.4
428 %cmp12.3.4 = icmp slt i32 %81, %spec.select8.2.4
429 %82 = or i1 %cmp12.3.4, %79
430 %spec.select.3.4 = select i1 %82, i32 4, i32 %spec.select.3.3
431 %spec.select8.3.4 = select i1 %cmp12.3.4, i32 %81, i32 %spec.select8.2.4
432 %sub.5 = sub i32 %33, %20
433 %83 = icmp slt i32 %sub.5, 0
434 %neg.5 = sub nsw i32 0, %sub.5
435 %84 = select i1 %83, i32 %neg.5, i32 %sub.5
436 %cmp12.5 = icmp slt i32 %84, %spec.select8.3.4
437 %spec.select8.5 = select i1 %cmp12.5, i32 %84, i32 %spec.select8.3.4
438 %sub.1.5 = sub i32 %33, %21
439 %85 = icmp slt i32 %sub.1.5, 0
440 %neg.1.5 = sub nsw i32 0, %sub.1.5
441 %86 = select i1 %85, i32 %neg.1.5, i32 %sub.1.5
442 %cmp12.1.5 = icmp slt i32 %86, %spec.select8.5
443 %87 = or i1 %cmp12.1.5, %cmp12.5
444 %spec.select8.1.5 = select i1 %cmp12.1.5, i32 %86, i32 %spec.select8.5
445 %sub.2.5 = sub i32 %33, %22
446 %88 = icmp slt i32 %sub.2.5, 0
447 %neg.2.5 = sub nsw i32 0, %sub.2.5
448 %89 = select i1 %88, i32 %neg.2.5, i32 %sub.2.5
449 %cmp12.2.5 = icmp slt i32 %89, %spec.select8.1.5
450 %90 = or i1 %cmp12.2.5, %87
451 %spec.select8.2.5 = select i1 %cmp12.2.5, i32 %89, i32 %spec.select8.1.5
452 %sub.3.5 = sub i32 %33, %23
453 %91 = icmp slt i32 %sub.3.5, 0
454 %neg.3.5 = sub nsw i32 0, %sub.3.5
455 %92 = select i1 %91, i32 %neg.3.5, i32 %sub.3.5
456 %cmp12.3.5 = icmp slt i32 %92, %spec.select8.2.5
457 %93 = or i1 %cmp12.3.5, %90
458 %spec.select.3.5 = select i1 %93, i32 5, i32 %spec.select.3.4
459 %spec.select8.3.5 = select i1 %cmp12.3.5, i32 %92, i32 %spec.select8.2.5
460 %sub.6 = sub i32 %33, %24
461 %94 = icmp slt i32 %sub.6, 0
462 %neg.6 = sub nsw i32 0, %sub.6
463 %95 = select i1 %94, i32 %neg.6, i32 %sub.6
464 %cmp12.6 = icmp slt i32 %95, %spec.select8.3.5
465 %spec.select8.6 = select i1 %cmp12.6, i32 %95, i32 %spec.select8.3.5
466 %sub.1.6 = sub i32 %33, %25
467 %96 = icmp slt i32 %sub.1.6, 0
468 %neg.1.6 = sub nsw i32 0, %sub.1.6
469 %97 = select i1 %96, i32 %neg.1.6, i32 %sub.1.6
470 %cmp12.1.6 = icmp slt i32 %97, %spec.select8.6
471 %98 = or i1 %cmp12.1.6, %cmp12.6
472 %spec.select8.1.6 = select i1 %cmp12.1.6, i32 %97, i32 %spec.select8.6
473 %sub.2.6 = sub i32 %33, %26
474 %99 = icmp slt i32 %sub.2.6, 0
475 %neg.2.6 = sub nsw i32 0, %sub.2.6
476 %100 = select i1 %99, i32 %neg.2.6, i32 %sub.2.6
477 %cmp12.2.6 = icmp slt i32 %100, %spec.select8.1.6
478 %101 = or i1 %cmp12.2.6, %98
479 %spec.select8.2.6 = select i1 %cmp12.2.6, i32 %100, i32 %spec.select8.1.6
480 %sub.3.6 = sub i32 %33, %27
481 %102 = icmp slt i32 %sub.3.6, 0
482 %neg.3.6 = sub nsw i32 0, %sub.3.6
483 %103 = select i1 %102, i32 %neg.3.6, i32 %sub.3.6
484 %cmp12.3.6 = icmp slt i32 %103, %spec.select8.2.6
485 %104 = or i1 %cmp12.3.6, %101
486 %spec.select.3.6 = select i1 %104, i32 6, i32 %spec.select.3.5
487 %spec.select8.3.6 = select i1 %cmp12.3.6, i32 %103, i32 %spec.select8.2.6
488 %sub.7 = sub i32 %33, %28
489 %105 = icmp slt i32 %sub.7, 0
490 %neg.7 = sub nsw i32 0, %sub.7
491 %106 = select i1 %105, i32 %neg.7, i32 %sub.7
492 %cmp12.7 = icmp slt i32 %106, %spec.select8.3.6
493 %spec.select8.7 = select i1 %cmp12.7, i32 %106, i32 %spec.select8.3.6
494 %sub.1.7 = sub i32 %33, %29
495 %107 = icmp slt i32 %sub.1.7, 0
496 %neg.1.7 = sub nsw i32 0, %sub.1.7
497 %108 = select i1 %107, i32 %neg.1.7, i32 %sub.1.7
498 %cmp12.1.7 = icmp slt i32 %108, %spec.select8.7
499 %109 = or i1 %cmp12.1.7, %cmp12.7
500 %spec.select8.1.7 = select i1 %cmp12.1.7, i32 %108, i32 %spec.select8.7
501 %sub.2.7 = sub i32 %33, %30
502 %110 = icmp slt i32 %sub.2.7, 0
503 %neg.2.7 = sub nsw i32 0, %sub.2.7
504 %111 = select i1 %110, i32 %neg.2.7, i32 %sub.2.7
505 %cmp12.2.7 = icmp slt i32 %111, %spec.select8.1.7
506 %112 = or i1 %cmp12.2.7, %109
507 %spec.select8.2.7 = select i1 %cmp12.2.7, i32 %111, i32 %spec.select8.1.7
508 %sub.3.7 = sub i32 %33, %31
509 %113 = icmp slt i32 %sub.3.7, 0
510 %neg.3.7 = sub nsw i32 0, %sub.3.7
511 %114 = select i1 %113, i32 %neg.3.7, i32 %sub.3.7
512 %cmp12.3.7 = icmp slt i32 %114, %spec.select8.2.7
513 %115 = or i1 %cmp12.3.7, %112
514 %spec.select.3.7 = select i1 %115, i32 7, i32 %spec.select.3.6
515 %spec.select8.3.7 = select i1 %cmp12.3.7, i32 %114, i32 %spec.select8.2.7
516 %k = getelementptr inbounds [366 x i32], ptr @l, i64 0, i64 %indvars.iv
517 store i32 %spec.select.3.7, ptr %k, align 4
518 %indvars.iv.next = add i64 %indvars.iv, 1
519 br label %for.cond
520 }