1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s
3 target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
4 target triple = "nvptx64-nvidia-cuda"
7 ; __global__ void foo(int b, int s) {
9 ; for (int i = 0; i < 4; ++i) {
14 define void @foo(i32 %b, i32 %s) {
15 ; CHECK-LABEL: .visible .entry foo(
17 ; CHECK: ld.param.u32 [[s:%r[0-9]+]], [foo_param_1];
18 ; CHECK: ld.param.u32 [[b:%r[0-9]+]], [foo_param_0];
19 %call = tail call zeroext i1 @cond(i32 0)
20 br i1 %call, label %if.then, label %for.inc
22 if.then: ; preds = %entry
23 %mul = mul nsw i32 %b, %s
24 ; CHECK: mul.lo.s32 [[a0:%r[0-9]+]], [[b]], [[s]]
25 tail call void @use(i32 %mul)
28 for.inc: ; preds = %entry, %if.then
29 %call.1 = tail call zeroext i1 @cond(i32 1)
30 br i1 %call.1, label %if.then.1, label %for.inc.1
32 if.then.1: ; preds = %for.inc
33 %add.1 = add nsw i32 %b, 1
34 %mul.1 = mul nsw i32 %add.1, %s
35 ; CHECK: add.s32 [[a1:%r[0-9]+]], [[a0]], [[s]]
36 tail call void @use(i32 %mul.1)
39 for.inc.1: ; preds = %if.then.1, %for.inc
40 %call.2 = tail call zeroext i1 @cond(i32 2)
41 br i1 %call.2, label %if.then.2, label %for.inc.2
43 if.then.2: ; preds = %for.inc.1
44 %add.2 = add nsw i32 %b, 2
45 %mul.2 = mul nsw i32 %add.2, %s
46 ; CHECK: add.s32 [[a2:%r[0-9]+]], [[a1]], [[s]]
47 tail call void @use(i32 %mul.2)
50 for.inc.2: ; preds = %if.then.2, %for.inc.1
51 %call.3 = tail call zeroext i1 @cond(i32 3)
52 br i1 %call.3, label %if.then.3, label %for.inc.3
54 if.then.3: ; preds = %for.inc.2
55 %add.3 = add nsw i32 %b, 3
56 %mul.3 = mul nsw i32 %add.3, %s
57 ; CHECK: add.s32 [[a3:%r[0-9]+]], [[a2]], [[s]]
58 tail call void @use(i32 %mul.3)
61 for.inc.3: ; preds = %if.then.3, %for.inc.2
65 declare zeroext i1 @cond(i32)
67 declare void @use(i32)
69 !nvvm.annotations = !{!0}
71 !0 = !{ptr @foo, !"kernel", i32 1}