clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c

   1 // REQUIRES: powerpc-registered-target
   2 // RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
   3 // RUN:   -triple powerpc64-unknown-linux-gnu -emit-llvm %s -o - \
   4 // RUN:   -D__XL_COMPAT_ALTIVEC__ -target-cpu pwr7 | FileCheck %s
   5 // RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
   6 // RUN:   -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \
   7 // RUN:   -D__XL_COMPAT_ALTIVEC__ -target-cpu pwr8 | FileCheck %s
   8 // RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
   9 // RUN:   -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \
  10 // RUN:   -U__XL_COMPAT_ALTIVEC__ -target-cpu pwr8 | FileCheck \
  11 // RUN:   --check-prefix=NOCOMPAT %s
  12 #include <altivec.h>
  13 vector double vd = { 3.4e22, 1.8e-3 };
  14 vector signed long long res_vsll, vsll = { -12345678999ll, 12345678999 };
  15 vector unsigned long long res_vull, vull = { 11547229456923630743llu, 18014402265226391llu };
  16 vector float res_vf;
  17 vector double res_vd;
  18 vector signed int res_vsi;
  19 vector unsigned int res_vui;
  20
  21 void test() {
  22 // CHECK-LABEL: @test(
  23 // CHECK-NEXT:  entry:
  24 // NOCOMPAT-LABEL: @test(
  25 // NOCOMPAT-NEXT:  entry:
  26
  27   res_vf = vec_ctf(vsll, 4);
  28 // CHECK:         [[TMP0:%.*]] = load <2 x i64>, ptr @vsll, align 16
  29 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x float> @llvm.ppc.vsx.xvcvsxdsp(<2 x i64> [[TMP0]])
  30 // CHECK-NEXT:    fmul <4 x float> [[TMP1]], <float 6.250000e-02, float 6.250000e-02, float 6.250000e-02, float 6.250000e-02>
  31 // NOCOMPAT:      [[TMP0:%.*]] = load <2 x i64>, ptr @vsll, align 16
  32 // NOCOMPAT-NEXT: [[CONV:%.*]] = sitofp <2 x i64> [[TMP0]] to <2 x double>
  33 // NOCOMPAT-NEXT: fmul <2 x double> [[CONV]], <double 6.250000e-02, double 6.250000e-02>
  34
  35   res_vf = vec_ctf(vull, 4);
  36 // CHECK:         [[TMP2:%.*]] = load <2 x i64>, ptr @vull, align 16
  37 // CHECK-NEXT:    [[TMP3:%.*]] = call <4 x float> @llvm.ppc.vsx.xvcvuxdsp(<2 x i64> [[TMP2]])
  38 // CHECK-NEXT:    fmul <4 x float> [[TMP3]], <float 6.250000e-02, float 6.250000e-02, float 6.250000e-02, float 6.250000e-02>
  39 // NOCOMPAT:      [[TMP2:%.*]] = load <2 x i64>, ptr @vull, align 16
  40 // NOCOMPAT-NEXT: [[CONV1:%.*]] = uitofp <2 x i64> [[TMP2]] to <2 x double>
  41 // NOCOMPAT-NEXT: fmul <2 x double> [[CONV1]], <double 6.250000e-02, double 6.250000e-02>
  42
  43   res_vsll = vec_cts(vd, 4);
  44 // CHECK:         [[TMP4:%.*]] = load <2 x double>, ptr @vd, align 16
  45 // CHECK-NEXT:    fmul <2 x double> [[TMP4]], <double 1.600000e+01, double 1.600000e+01>
  46 // CHECK:         call <4 x i32> @llvm.ppc.vsx.xvcvdpsxws(<2 x double>
  47 // NOCOMPAT:      [[TMP4:%.*]] = load <2 x double>, ptr @vd, align 16
  48 // NOCOMPAT-NEXT: fmul <2 x double> [[TMP4]], <double 1.600000e+01, double 1.600000e+01>
  49
  50   res_vull = vec_ctu(vd, 4);
  51 // CHECK:         [[TMP8:%.*]] = load <2 x double>, ptr @vd, align 16
  52 // CHECK-NEXT:    fmul <2 x double> [[TMP8]], <double 1.600000e+01, double 1.600000e+01>
  53 // CHECK:         call <4 x i32> @llvm.ppc.vsx.xvcvdpuxws(<2 x double>
  54 // NOCOMPAT:      [[TMP7:%.*]] = load <2 x double>, ptr @vd, align 16
  55 // NOCOMPAT-NEXT: fmul <2 x double> [[TMP7]], <double 1.600000e+01, double 1.600000e+01>
  56
  57   res_vd = vec_round(vd);
  58 // CHECK:         call double @llvm.ppc.readflm()
  59 // CHECK:         call double @llvm.ppc.setrnd(i32 0)
  60 // CHECK:         call <2 x double> @llvm.rint.v2f64(<2 x double>
  61 // CHECK:         call double @llvm.ppc.setflm(double
  62 // NOCOMPAT:      call <2 x double> @llvm.round.v2f64(<2 x double>
  63 }