clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknd.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // RUN: %clang_cc1 -triple riscv32 -target-feature +zknd -emit-llvm %s -o - \
   3 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
   4 // RUN:     | FileCheck %s  -check-prefix=RV32ZKND
   5
   6 #include <stdint.h>
   7
   8 // RV32ZKND-LABEL: @aes32dsi(
   9 // RV32ZKND-NEXT:  entry:
  10 // RV32ZKND-NEXT:    [[TMP0:%.*]] = call i32 @llvm.riscv.aes32dsi(i32 [[RS1:%.*]], i32 [[RS2:%.*]], i32 3)
  11 // RV32ZKND-NEXT:    ret i32 [[TMP0]]
  12 //
  13 uint32_t aes32dsi(uint32_t rs1, uint32_t rs2) {
  14   return __builtin_riscv_aes32dsi(rs1, rs2, 3);
  15 }
  16
  17 // RV32ZKND-LABEL: @aes32dsmi(
  18 // RV32ZKND-NEXT:  entry:
  19 // RV32ZKND-NEXT:    [[TMP0:%.*]] = call i32 @llvm.riscv.aes32dsmi(i32 [[RS1:%.*]], i32 [[RS2:%.*]], i32 3)
  20 // RV32ZKND-NEXT:    ret i32 [[TMP0]]
  21 //
  22 uint32_t aes32dsmi(uint32_t rs1, uint32_t rs2) {
  23   return __builtin_riscv_aes32dsmi(rs1, rs2, 3);
  24 }