1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
2 // REQUIRES: riscv-registered-target
3 // RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
4 // RUN: -target-feature +zvfh -disable-O0-optnone \
5 // RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
6 // RUN: FileCheck --check-prefix=CHECK-RV64 %s
8 #include <riscv_vector.h>
10 // CHECK-RV64-LABEL: define dso_local { <vscale x 1 x double>, <vscale x 1 x double> } @test_vlseg2e64ff_v_f64m1x2_m
11 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
12 // CHECK-RV64-NEXT: entry:
13 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 1 x double>, <vscale x 1 x double>, i64 } @llvm.riscv.vlseg2ff.mask.nxv1f64.i64(<vscale x 1 x double> poison, <vscale x 1 x double> poison, ptr [[BASE]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
14 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 1 x double>, <vscale x 1 x double>, i64 } [[TMP0]], 0
15 // CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { <vscale x 1 x double>, <vscale x 1 x double> } poison, <vscale x 1 x double> [[TMP1]], 0
16 // CHECK-RV64-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 1 x double>, <vscale x 1 x double>, i64 } [[TMP0]], 1
17 // CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { <vscale x 1 x double>, <vscale x 1 x double> } [[TMP2]], <vscale x 1 x double> [[TMP3]], 1
18 // CHECK-RV64-NEXT: [[TMP5:%.*]] = extractvalue { <vscale x 1 x double>, <vscale x 1 x double>, i64 } [[TMP0]], 2
19 // CHECK-RV64-NEXT: store i64 [[TMP5]], ptr [[NEW_VL]], align 8
20 // CHECK-RV64-NEXT: ret { <vscale x 1 x double>, <vscale x 1 x double> } [[TMP4]]
22 vfloat64m1x2_t
test_vlseg2e64ff_v_f64m1x2_m(vbool64_t mask
, const double *base
, size_t *new_vl
, size_t vl
) {
23 return __riscv_vlseg2e64ff(mask
, base
, new_vl
, vl
);
26 // CHECK-RV64-LABEL: define dso_local { <vscale x 2 x double>, <vscale x 2 x double> } @test_vlseg2e64ff_v_f64m2x2_m
27 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
28 // CHECK-RV64-NEXT: entry:
29 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 2 x double>, <vscale x 2 x double>, i64 } @llvm.riscv.vlseg2ff.mask.nxv2f64.i64(<vscale x 2 x double> poison, <vscale x 2 x double> poison, ptr [[BASE]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
30 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 2 x double>, <vscale x 2 x double>, i64 } [[TMP0]], 0
31 // CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { <vscale x 2 x double>, <vscale x 2 x double> } poison, <vscale x 2 x double> [[TMP1]], 0
32 // CHECK-RV64-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 2 x double>, <vscale x 2 x double>, i64 } [[TMP0]], 1
33 // CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { <vscale x 2 x double>, <vscale x 2 x double> } [[TMP2]], <vscale x 2 x double> [[TMP3]], 1
34 // CHECK-RV64-NEXT: [[TMP5:%.*]] = extractvalue { <vscale x 2 x double>, <vscale x 2 x double>, i64 } [[TMP0]], 2
35 // CHECK-RV64-NEXT: store i64 [[TMP5]], ptr [[NEW_VL]], align 8
36 // CHECK-RV64-NEXT: ret { <vscale x 2 x double>, <vscale x 2 x double> } [[TMP4]]
38 vfloat64m2x2_t
test_vlseg2e64ff_v_f64m2x2_m(vbool32_t mask
, const double *base
, size_t *new_vl
, size_t vl
) {
39 return __riscv_vlseg2e64ff(mask
, base
, new_vl
, vl
);
42 // CHECK-RV64-LABEL: define dso_local { <vscale x 4 x double>, <vscale x 4 x double> } @test_vlseg2e64ff_v_f64m4x2_m
43 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
44 // CHECK-RV64-NEXT: entry:
45 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 4 x double>, <vscale x 4 x double>, i64 } @llvm.riscv.vlseg2ff.mask.nxv4f64.i64(<vscale x 4 x double> poison, <vscale x 4 x double> poison, ptr [[BASE]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
46 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 4 x double>, <vscale x 4 x double>, i64 } [[TMP0]], 0
47 // CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { <vscale x 4 x double>, <vscale x 4 x double> } poison, <vscale x 4 x double> [[TMP1]], 0
48 // CHECK-RV64-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 4 x double>, <vscale x 4 x double>, i64 } [[TMP0]], 1
49 // CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { <vscale x 4 x double>, <vscale x 4 x double> } [[TMP2]], <vscale x 4 x double> [[TMP3]], 1
50 // CHECK-RV64-NEXT: [[TMP5:%.*]] = extractvalue { <vscale x 4 x double>, <vscale x 4 x double>, i64 } [[TMP0]], 2
51 // CHECK-RV64-NEXT: store i64 [[TMP5]], ptr [[NEW_VL]], align 8
52 // CHECK-RV64-NEXT: ret { <vscale x 4 x double>, <vscale x 4 x double> } [[TMP4]]
54 vfloat64m4x2_t
test_vlseg2e64ff_v_f64m4x2_m(vbool16_t mask
, const double *base
, size_t *new_vl
, size_t vl
) {
55 return __riscv_vlseg2e64ff(mask
, base
, new_vl
, vl
);
58 // CHECK-RV64-LABEL: define dso_local { <vscale x 1 x i64>, <vscale x 1 x i64> } @test_vlseg2e64ff_v_i64m1x2_m
59 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
60 // CHECK-RV64-NEXT: entry:
61 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 1 x i64>, <vscale x 1 x i64>, i64 } @llvm.riscv.vlseg2ff.mask.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison, ptr [[BASE]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
62 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, i64 } [[TMP0]], 0
63 // CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { <vscale x 1 x i64>, <vscale x 1 x i64> } poison, <vscale x 1 x i64> [[TMP1]], 0
64 // CHECK-RV64-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, i64 } [[TMP0]], 1
65 // CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { <vscale x 1 x i64>, <vscale x 1 x i64> } [[TMP2]], <vscale x 1 x i64> [[TMP3]], 1
66 // CHECK-RV64-NEXT: [[TMP5:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, i64 } [[TMP0]], 2
67 // CHECK-RV64-NEXT: store i64 [[TMP5]], ptr [[NEW_VL]], align 8
68 // CHECK-RV64-NEXT: ret { <vscale x 1 x i64>, <vscale x 1 x i64> } [[TMP4]]
70 vint64m1x2_t
test_vlseg2e64ff_v_i64m1x2_m(vbool64_t mask
, const int64_t *base
, size_t *new_vl
, size_t vl
) {
71 return __riscv_vlseg2e64ff(mask
, base
, new_vl
, vl
);
74 // CHECK-RV64-LABEL: define dso_local { <vscale x 2 x i64>, <vscale x 2 x i64> } @test_vlseg2e64ff_v_i64m2x2_m
75 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
76 // CHECK-RV64-NEXT: entry:
77 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64>, i64 } @llvm.riscv.vlseg2ff.mask.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison, ptr [[BASE]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
78 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, i64 } [[TMP0]], 0
79 // CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } poison, <vscale x 2 x i64> [[TMP1]], 0
80 // CHECK-RV64-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, i64 } [[TMP0]], 1
81 // CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP2]], <vscale x 2 x i64> [[TMP3]], 1
82 // CHECK-RV64-NEXT: [[TMP5:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, i64 } [[TMP0]], 2
83 // CHECK-RV64-NEXT: store i64 [[TMP5]], ptr [[NEW_VL]], align 8
84 // CHECK-RV64-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP4]]
86 vint64m2x2_t
test_vlseg2e64ff_v_i64m2x2_m(vbool32_t mask
, const int64_t *base
, size_t *new_vl
, size_t vl
) {
87 return __riscv_vlseg2e64ff(mask
, base
, new_vl
, vl
);
90 // CHECK-RV64-LABEL: define dso_local { <vscale x 4 x i64>, <vscale x 4 x i64> } @test_vlseg2e64ff_v_i64m4x2_m
91 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
92 // CHECK-RV64-NEXT: entry:
93 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 4 x i64>, <vscale x 4 x i64>, i64 } @llvm.riscv.vlseg2ff.mask.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> poison, ptr [[BASE]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
94 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64>, i64 } [[TMP0]], 0
95 // CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } poison, <vscale x 4 x i64> [[TMP1]], 0
96 // CHECK-RV64-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64>, i64 } [[TMP0]], 1
97 // CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } [[TMP2]], <vscale x 4 x i64> [[TMP3]], 1
98 // CHECK-RV64-NEXT: [[TMP5:%.*]] = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64>, i64 } [[TMP0]], 2
99 // CHECK-RV64-NEXT: store i64 [[TMP5]], ptr [[NEW_VL]], align 8
100 // CHECK-RV64-NEXT: ret { <vscale x 4 x i64>, <vscale x 4 x i64> } [[TMP4]]
102 vint64m4x2_t
test_vlseg2e64ff_v_i64m4x2_m(vbool16_t mask
, const int64_t *base
, size_t *new_vl
, size_t vl
) {
103 return __riscv_vlseg2e64ff(mask
, base
, new_vl
, vl
);
106 // CHECK-RV64-LABEL: define dso_local { <vscale x 1 x i64>, <vscale x 1 x i64> } @test_vlseg2e64ff_v_u64m1x2_m
107 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
108 // CHECK-RV64-NEXT: entry:
109 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 1 x i64>, <vscale x 1 x i64>, i64 } @llvm.riscv.vlseg2ff.mask.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison, ptr [[BASE]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
110 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, i64 } [[TMP0]], 0
111 // CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { <vscale x 1 x i64>, <vscale x 1 x i64> } poison, <vscale x 1 x i64> [[TMP1]], 0
112 // CHECK-RV64-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, i64 } [[TMP0]], 1
113 // CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { <vscale x 1 x i64>, <vscale x 1 x i64> } [[TMP2]], <vscale x 1 x i64> [[TMP3]], 1
114 // CHECK-RV64-NEXT: [[TMP5:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, i64 } [[TMP0]], 2
115 // CHECK-RV64-NEXT: store i64 [[TMP5]], ptr [[NEW_VL]], align 8
116 // CHECK-RV64-NEXT: ret { <vscale x 1 x i64>, <vscale x 1 x i64> } [[TMP4]]
118 vuint64m1x2_t
test_vlseg2e64ff_v_u64m1x2_m(vbool64_t mask
, const uint64_t *base
, size_t *new_vl
, size_t vl
) {
119 return __riscv_vlseg2e64ff(mask
, base
, new_vl
, vl
);
122 // CHECK-RV64-LABEL: define dso_local { <vscale x 2 x i64>, <vscale x 2 x i64> } @test_vlseg2e64ff_v_u64m2x2_m
123 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
124 // CHECK-RV64-NEXT: entry:
125 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64>, i64 } @llvm.riscv.vlseg2ff.mask.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison, ptr [[BASE]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
126 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, i64 } [[TMP0]], 0
127 // CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } poison, <vscale x 2 x i64> [[TMP1]], 0
128 // CHECK-RV64-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, i64 } [[TMP0]], 1
129 // CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP2]], <vscale x 2 x i64> [[TMP3]], 1
130 // CHECK-RV64-NEXT: [[TMP5:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, i64 } [[TMP0]], 2
131 // CHECK-RV64-NEXT: store i64 [[TMP5]], ptr [[NEW_VL]], align 8
132 // CHECK-RV64-NEXT: ret { <vscale x 2 x i64>, <vscale x 2 x i64> } [[TMP4]]
134 vuint64m2x2_t
test_vlseg2e64ff_v_u64m2x2_m(vbool32_t mask
, const uint64_t *base
, size_t *new_vl
, size_t vl
) {
135 return __riscv_vlseg2e64ff(mask
, base
, new_vl
, vl
);
138 // CHECK-RV64-LABEL: define dso_local { <vscale x 4 x i64>, <vscale x 4 x i64> } @test_vlseg2e64ff_v_u64m4x2_m
139 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
140 // CHECK-RV64-NEXT: entry:
141 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 4 x i64>, <vscale x 4 x i64>, i64 } @llvm.riscv.vlseg2ff.mask.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> poison, ptr [[BASE]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
142 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64>, i64 } [[TMP0]], 0
143 // CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } poison, <vscale x 4 x i64> [[TMP1]], 0
144 // CHECK-RV64-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64>, i64 } [[TMP0]], 1
145 // CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } [[TMP2]], <vscale x 4 x i64> [[TMP3]], 1
146 // CHECK-RV64-NEXT: [[TMP5:%.*]] = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64>, i64 } [[TMP0]], 2
147 // CHECK-RV64-NEXT: store i64 [[TMP5]], ptr [[NEW_VL]], align 8
148 // CHECK-RV64-NEXT: ret { <vscale x 4 x i64>, <vscale x 4 x i64> } [[TMP4]]
150 vuint64m4x2_t
test_vlseg2e64ff_v_u64m4x2_m(vbool16_t mask
, const uint64_t *base
, size_t *new_vl
, size_t vl
) {
151 return __riscv_vlseg2e64ff(mask
, base
, new_vl
, vl
);