clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaadd-out-of-range.c

   1 // REQUIRES: riscv-registered-target
   2 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
   3 // RUN:   -target-feature +v -target-feature +zfh -target-feature +zvfh \
   4 // RUN:   -fsyntax-only -verify %s
   5
   6 #include <riscv_vector.h>
   7
   8 vint32m1_t test_vaadd_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) {
   9   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  10   return __riscv_vaadd_vv_i32m1(op1, op2, 5, vl);
  11 }
  12
  13 vint32m1_t test_vaadd_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) {
  14   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  15   return __riscv_vaadd_vx_i32m1(op1, op2, 5, vl);
  16 }
  17
  18 vint32m1_t test_vaadd_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) {
  19   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  20   return __riscv_vaadd_vv_i32m1_m(mask, op1, op2, 5, vl);
  21 }
  22
  23 vint32m1_t test_vaadd_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) {
  24   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  25   return __riscv_vaadd_vx_i32m1_m(mask, op1, op2, 5, vl);
  26 }
  27
  28 vint32m1_t test_vaadd_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) {
  29   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  30   return __riscv_vaadd_vv_i32m1_tu(maskedoff, op1, op2, 5, vl);
  31 }
  32
  33 vint32m1_t test_vaadd_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) {
  34   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  35   return __riscv_vaadd_vx_i32m1_tu(maskedoff, op1, op2, 5, vl);
  36 }
  37
  38 vint32m1_t test_vaadd_vv_i32m1_tum(
  39   vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) {
  40   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  41   return __riscv_vaadd_vv_i32m1_tum(mask, maskedoff, op1, op2, 5, vl);
  42 }
  43
  44 vint32m1_t test_vaadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) {
  45   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  46   return __riscv_vaadd_vx_i32m1_tum(mask, maskedoff, op1, op2, 5, vl);
  47 }
  48
  49 vint32m1_t test_vaadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) {
  50   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  51   return __riscv_vaadd_vv_i32m1_tumu(mask, maskedoff, op1, op2, 5, vl);
  52 }
  53
  54 vint32m1_t test_vaadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) {
  55   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  56   return __riscv_vaadd_vx_i32m1_tumu(mask, maskedoff, op1, op2, 5, vl);
  57 }
  58
  59 vint32m1_t test_vaadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) {
  60   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  61   return __riscv_vaadd_vv_i32m1_mu(mask, maskedoff, op1, op2, 5, vl);
  62 }
  63
  64 vint32m1_t test_vaadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) {
  65   // expected-error@+1 {{argument value 5 is outside the valid range [0, 3]}}
  66   return __riscv_vaadd_vx_i32m1_mu(mask, maskedoff, op1, op2, 5, vl);
  67 }