1 // REQUIRES: riscv-registered-target
2 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
3 // RUN: -target-feature +v -target-feature +zfh -target-feature +zvfh \
4 // RUN: -fsyntax-only -verify %s
6 #include <riscv_vector.h>
8 vfloat32m1_t
test_vfadd_vv_f32m1(vfloat32m1_t op1
, vfloat32m1_t op2
, size_t vl
) {
9 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
10 return __riscv_vfadd_vv_f32m1_rm(op1
, op2
, 5, vl
);
13 vfloat32m1_t
test_vfadd_vf_f32m1(vfloat32m1_t op1
, float op2
, size_t vl
) {
14 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
15 return __riscv_vfadd_vf_f32m1_rm(op1
, op2
, 5, vl
);
18 vfloat32m1_t
test_vfadd_vv_f32m1_m(vbool32_t mask
, vfloat32m1_t op1
, vfloat32m1_t op2
, size_t vl
) {
19 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
20 return __riscv_vfadd_vv_f32m1_rm_m(mask
, op1
, op2
, 5, vl
);
23 vfloat32m1_t
test_vfadd_vf_f32m1_m(vbool32_t mask
, vfloat32m1_t op1
, float op2
, size_t vl
) {
24 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
25 return __riscv_vfadd_vf_f32m1_rm_m(mask
, op1
, op2
, 5, vl
);
28 vfloat32m1_t
test_vfadd_vv_f32m1_tu(vfloat32m1_t maskedoff
, vfloat32m1_t op1
, vfloat32m1_t op2
, size_t vl
) {
29 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
30 return __riscv_vfadd_vv_f32m1_rm_tu(maskedoff
, op1
, op2
, 5, vl
);
33 vfloat32m1_t
test_vfadd_vf_f32m1_tu(vfloat32m1_t maskedoff
, vfloat32m1_t op1
, float op2
, size_t vl
) {
34 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
35 return __riscv_vfadd_vf_f32m1_rm_tu(maskedoff
, op1
, op2
, 5, vl
);
38 vfloat32m1_t
test_vfadd_vv_f32m1_tum(
39 vbool32_t mask
, vfloat32m1_t maskedoff
, vfloat32m1_t op1
, vfloat32m1_t op2
, size_t vl
) {
40 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
41 return __riscv_vfadd_vv_f32m1_rm_tum(mask
, maskedoff
, op1
, op2
, 5, vl
);
44 vfloat32m1_t
test_vfadd_vf_f32m1_tum(vbool32_t mask
, vfloat32m1_t maskedoff
, vfloat32m1_t op1
, float op2
, size_t vl
) {
45 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
46 return __riscv_vfadd_vf_f32m1_rm_tum(mask
, maskedoff
, op1
, op2
, 5, vl
);
49 vfloat32m1_t
test_vfadd_vv_f32m1_tumu(vbool32_t mask
, vfloat32m1_t maskedoff
, vfloat32m1_t op1
, vfloat32m1_t op2
, size_t vl
) {
50 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
51 return __riscv_vfadd_vv_f32m1_rm_tumu(mask
, maskedoff
, op1
, op2
, 5, vl
);
54 vfloat32m1_t
test_vfadd_vf_f32m1_tumu(vbool32_t mask
, vfloat32m1_t maskedoff
, vfloat32m1_t op1
, float op2
, size_t vl
) {
55 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
56 return __riscv_vfadd_vf_f32m1_rm_tumu(mask
, maskedoff
, op1
, op2
, 5, vl
);
59 vfloat32m1_t
test_vfadd_vv_f32m1_mu(vbool32_t mask
, vfloat32m1_t maskedoff
, vfloat32m1_t op1
, vfloat32m1_t op2
, size_t vl
) {
60 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
61 return __riscv_vfadd_vv_f32m1_rm_mu(mask
, maskedoff
, op1
, op2
, 5, vl
);
64 vfloat32m1_t
test_vfadd_vf_f32m1_mu(vbool32_t mask
, vfloat32m1_t maskedoff
, vfloat32m1_t op1
, float op2
, size_t vl
) {
65 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
66 return __riscv_vfadd_vf_f32m1_rm_mu(mask
, maskedoff
, op1
, op2
, 5, vl
);