clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfwmacc-out-of-range.c

   1 // REQUIRES: riscv-registered-target
   2 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
   3 // RUN:   -target-feature +v -target-feature +zfh -target-feature +zvfh \
   4 // RUN:   -fsyntax-only -verify %s
   5
   6 #include <riscv_vector.h>
   7
   8 vfloat32m1_t test_vfwmacc_vv_f32m1_rm(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) {
   9   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  10   return __riscv_vfwmacc_vv_f32m1_rm(vd, vs1, vs2, 5, vl);
  11 }
  12
  13 vfloat32m1_t test_vfwmacc_vf_f32m1_rm(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) {
  14   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  15   return __riscv_vfwmacc_vf_f32m1_rm(vd, vs1, vs2, 5, vl);
  16 }
  17
  18 vfloat32m1_t test_vfwmacc_vv_f32m1_rm_m(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) {
  19   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  20   return __riscv_vfwmacc_vv_f32m1_rm_m(mask, vd, vs1, vs2, 5, vl);
  21 }
  22
  23 vfloat32m1_t test_vfwmacc_vf_f32m1_rm_m(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) {
  24   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  25   return __riscv_vfwmacc_vf_f32m1_rm_m(mask, vd, vs1, vs2, 5, vl);
  26 }
  27
  28 vfloat32m1_t test_vfwmacc_vv_f32m1_rm_tu(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) {
  29   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  30   return __riscv_vfwmacc_vv_f32m1_rm_tu(vd, vs1, vs2, 5, vl);
  31 }
  32
  33 vfloat32m1_t test_vfwmacc_vf_f32m1_rm_tu(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) {
  34   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  35   return __riscv_vfwmacc_vf_f32m1_rm_tu(vd, vs1, vs2, 5, vl);
  36 }
  37
  38 vfloat32m1_t test_vfwmacc_vv_f32m1_rm_tum(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) {
  39   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  40   return __riscv_vfwmacc_vv_f32m1_rm_tum(mask, vd, vs1, vs2, 5, vl);
  41 }
  42
  43 vfloat32m1_t test_vfwmacc_vf_f32m1_rm_tum(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) {
  44   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  45   return __riscv_vfwmacc_vf_f32m1_rm_tum(mask, vd, vs1, vs2, 5, vl);
  46 }
  47
  48 vfloat32m1_t test_vfwmacc_vv_f32m1_rm_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) {
  49   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  50   return __riscv_vfwmacc_vv_f32m1_rm_tumu(mask, vd, vs1, vs2, 5, vl);
  51 }
  52
  53 vfloat32m1_t test_vfwmacc_vf_f32m1_rm_tumu(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) {
  54   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  55   return __riscv_vfwmacc_vf_f32m1_rm_tumu(mask, vd, vs1, vs2, 5, vl);
  56 }
  57
  58 vfloat32m1_t test_vfwmacc_vv_f32m1_rm_mu(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) {
  59   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  60   return __riscv_vfwmacc_vv_f32m1_rm_mu(mask, vd, vs1, vs2, 5, vl);
  61 }
  62
  63 vfloat32m1_t test_vfwmacc_vf_f32m1_rm_mu(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) {
  64   // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}
  65   return __riscv_vfwmacc_vf_f32m1_rm_mu(mask, vd, vs1, vs2, 5, vl);
  66 }