clang/test/CodeGen/SystemZ/zvector.c

   1 // RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu z13 -fzvector \
   2 // RUN: -emit-llvm -o - -W -Wall -Werror \
   3 // RUN: %s | opt -S -passes=mem2reg | FileCheck %s
   4
   5 volatile vector signed char sc, sc2;
   6 volatile vector unsigned char uc, uc2;
   7 volatile vector bool char bc, bc2;
   8
   9 volatile vector signed short ss, ss2;
  10 volatile vector unsigned short us, us2;
  11 volatile vector bool short bs, bs2;
  12
  13 volatile vector signed int si, si2;
  14 volatile vector unsigned int ui, ui2;
  15 volatile vector bool int bi, bi2;
  16
  17 volatile vector signed long long sl, sl2;
  18 volatile vector unsigned long long ul, ul2;
  19 volatile vector bool long long bl, bl2;
  20
  21 volatile vector double fd, fd2;
  22
  23 volatile int cnt;
  24
  25 // CHECK-LABEL: define{{.*}} void @test_assign() #0 {
  26 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
  27 // CHECK:   store volatile <16 x i8> [[TMP0]], ptr @sc, align 8
  28 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
  29 // CHECK:   store volatile <16 x i8> [[TMP1]], ptr @uc, align 8
  30 // CHECK:   [[TMP2:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
  31 // CHECK:   store volatile <8 x i16> [[TMP2]], ptr @ss, align 8
  32 // CHECK:   [[TMP3:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
  33 // CHECK:   store volatile <8 x i16> [[TMP3]], ptr @us, align 8
  34 // CHECK:   [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
  35 // CHECK:   store volatile <4 x i32> [[TMP4]], ptr @si, align 8
  36 // CHECK:   [[TMP5:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
  37 // CHECK:   store volatile <4 x i32> [[TMP5]], ptr @ui, align 8
  38 // CHECK:   [[TMP6:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
  39 // CHECK:   store volatile <2 x i64> [[TMP6]], ptr @sl, align 8
  40 // CHECK:   [[TMP7:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
  41 // CHECK:   store volatile <2 x i64> [[TMP7]], ptr @ul, align 8
  42 // CHECK:   [[TMP8:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
  43 // CHECK:   store volatile <2 x double> [[TMP8]], ptr @fd, align 8
  44 // CHECK:   ret void
  45 void test_assign(void) {
  46
  47   sc = sc2;
  48   uc = uc2;
  49
  50   ss = ss2;
  51   us = us2;
  52
  53   si = si2;
  54   ui = ui2;
  55
  56   sl = sl2;
  57   ul = ul2;
  58
  59   fd = fd2;
  60 }
  61
  62 // CHECK-LABEL: define{{.*}} void @test_pos() #0 {
  63 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
  64 // CHECK:   store volatile <16 x i8> [[TMP0]], ptr @sc, align 8
  65 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
  66 // CHECK:   store volatile <16 x i8> [[TMP1]], ptr @uc, align 8
  67 // CHECK:   [[TMP2:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
  68 // CHECK:   store volatile <8 x i16> [[TMP2]], ptr @ss, align 8
  69 // CHECK:   [[TMP3:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
  70 // CHECK:   store volatile <8 x i16> [[TMP3]], ptr @us, align 8
  71 // CHECK:   [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
  72 // CHECK:   store volatile <4 x i32> [[TMP4]], ptr @si, align 8
  73 // CHECK:   [[TMP5:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
  74 // CHECK:   store volatile <4 x i32> [[TMP5]], ptr @ui, align 8
  75 // CHECK:   [[TMP6:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
  76 // CHECK:   store volatile <2 x i64> [[TMP6]], ptr @sl, align 8
  77 // CHECK:   [[TMP7:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
  78 // CHECK:   store volatile <2 x i64> [[TMP7]], ptr @ul, align 8
  79 // CHECK:   [[TMP8:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
  80 // CHECK:   store volatile <2 x double> [[TMP8]], ptr @fd, align 8
  81 // CHECK:   ret void
  82 void test_pos(void) {
  83
  84   sc = +sc2;
  85   uc = +uc2;
  86
  87   ss = +ss2;
  88   us = +us2;
  89
  90   si = +si2;
  91   ui = +ui2;
  92
  93   sl = +sl2;
  94   ul = +ul2;
  95
  96   fd = +fd2;
  97 }
  98
  99 // CHECK-LABEL: define{{.*}} void @test_neg() #0 {
 100 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 101 // CHECK:   [[SUB:%.*]] = sub <16 x i8> zeroinitializer, [[TMP0]]
 102 // CHECK:   store volatile <16 x i8> [[SUB]], ptr @sc, align 8
 103 // CHECK:   [[TMP1:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 104 // CHECK:   [[SUB1:%.*]] = sub <8 x i16> zeroinitializer, [[TMP1]]
 105 // CHECK:   store volatile <8 x i16> [[SUB1]], ptr @ss, align 8
 106 // CHECK:   [[TMP2:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 107 // CHECK:   [[SUB2:%.*]] = sub <4 x i32> zeroinitializer, [[TMP2]]
 108 // CHECK:   store volatile <4 x i32> [[SUB2]], ptr @si, align 8
 109 // CHECK:   [[TMP3:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 110 // CHECK:   [[SUB3:%.*]] = sub <2 x i64> zeroinitializer, [[TMP3]]
 111 // CHECK:   store volatile <2 x i64> [[SUB3]], ptr @sl, align 8
 112 // CHECK:   [[TMP4:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 113 // CHECK:   [[SUB4:%.*]] = fneg <2 x double> [[TMP4]]
 114 // CHECK:   store volatile <2 x double> [[SUB4]], ptr @fd, align 8
 115 // CHECK:   ret void
 116 void test_neg(void) {
 117
 118   sc = -sc2;
 119   ss = -ss2;
 120   si = -si2;
 121   sl = -sl2;
 122   fd = -fd2;
 123 }
 124
 125 // CHECK-LABEL: define{{.*}} void @test_preinc() #0 {
 126 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 127 // CHECK:   [[INC:%.*]] = add <16 x i8> [[TMP0]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
 128 // CHECK:   store volatile <16 x i8> [[INC]], ptr @sc2, align 8
 129 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 130 // CHECK:   [[INC1:%.*]] = add <16 x i8> [[TMP1]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
 131 // CHECK:   store volatile <16 x i8> [[INC1]], ptr @uc2, align 8
 132 // CHECK:   [[TMP2:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 133 // CHECK:   [[INC2:%.*]] = add <8 x i16> [[TMP2]], <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
 134 // CHECK:   store volatile <8 x i16> [[INC2]], ptr @ss2, align 8
 135 // CHECK:   [[TMP3:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 136 // CHECK:   [[INC3:%.*]] = add <8 x i16> [[TMP3]], <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
 137 // CHECK:   store volatile <8 x i16> [[INC3]], ptr @us2, align 8
 138 // CHECK:   [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 139 // CHECK:   [[INC4:%.*]] = add <4 x i32> [[TMP4]], <i32 1, i32 1, i32 1, i32 1>
 140 // CHECK:   store volatile <4 x i32> [[INC4]], ptr @si2, align 8
 141 // CHECK:   [[TMP5:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 142 // CHECK:   [[INC5:%.*]] = add <4 x i32> [[TMP5]], <i32 1, i32 1, i32 1, i32 1>
 143 // CHECK:   store volatile <4 x i32> [[INC5]], ptr @ui2, align 8
 144 // CHECK:   [[TMP6:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 145 // CHECK:   [[INC6:%.*]] = add <2 x i64> [[TMP6]], <i64 1, i64 1>
 146 // CHECK:   store volatile <2 x i64> [[INC6]], ptr @sl2, align 8
 147 // CHECK:   [[TMP7:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 148 // CHECK:   [[INC7:%.*]] = add <2 x i64> [[TMP7]], <i64 1, i64 1>
 149 // CHECK:   store volatile <2 x i64> [[INC7]], ptr @ul2, align 8
 150 // CHECK:   [[TMP8:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 151 // CHECK:   [[INC8:%.*]] = fadd <2 x double> [[TMP8]], <double 1.000000e+00, double 1.000000e+00>
 152 // CHECK:   store volatile <2 x double> [[INC8]], ptr @fd2, align 8
 153 // CHECK:   ret void
 154 void test_preinc(void) {
 155
 156   ++sc2;
 157   ++uc2;
 158
 159   ++ss2;
 160   ++us2;
 161
 162   ++si2;
 163   ++ui2;
 164
 165   ++sl2;
 166   ++ul2;
 167
 168   ++fd2;
 169 }
 170
 171 // CHECK-LABEL: define{{.*}} void @test_postinc() #0 {
 172 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 173 // CHECK:   [[INC:%.*]] = add <16 x i8> [[TMP0]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
 174 // CHECK:   store volatile <16 x i8> [[INC]], ptr @sc2, align 8
 175 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 176 // CHECK:   [[INC1:%.*]] = add <16 x i8> [[TMP1]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
 177 // CHECK:   store volatile <16 x i8> [[INC1]], ptr @uc2, align 8
 178 // CHECK:   [[TMP2:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 179 // CHECK:   [[INC2:%.*]] = add <8 x i16> [[TMP2]], <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
 180 // CHECK:   store volatile <8 x i16> [[INC2]], ptr @ss2, align 8
 181 // CHECK:   [[TMP3:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 182 // CHECK:   [[INC3:%.*]] = add <8 x i16> [[TMP3]], <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
 183 // CHECK:   store volatile <8 x i16> [[INC3]], ptr @us2, align 8
 184 // CHECK:   [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 185 // CHECK:   [[INC4:%.*]] = add <4 x i32> [[TMP4]], <i32 1, i32 1, i32 1, i32 1>
 186 // CHECK:   store volatile <4 x i32> [[INC4]], ptr @si2, align 8
 187 // CHECK:   [[TMP5:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 188 // CHECK:   [[INC5:%.*]] = add <4 x i32> [[TMP5]], <i32 1, i32 1, i32 1, i32 1>
 189 // CHECK:   store volatile <4 x i32> [[INC5]], ptr @ui2, align 8
 190 // CHECK:   [[TMP6:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 191 // CHECK:   [[INC6:%.*]] = add <2 x i64> [[TMP6]], <i64 1, i64 1>
 192 // CHECK:   store volatile <2 x i64> [[INC6]], ptr @sl2, align 8
 193 // CHECK:   [[TMP7:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 194 // CHECK:   [[INC7:%.*]] = add <2 x i64> [[TMP7]], <i64 1, i64 1>
 195 // CHECK:   store volatile <2 x i64> [[INC7]], ptr @ul2, align 8
 196 // CHECK:   [[TMP8:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 197 // CHECK:   [[INC8:%.*]] = fadd <2 x double> [[TMP8]], <double 1.000000e+00, double 1.000000e+00>
 198 // CHECK:   store volatile <2 x double> [[INC8]], ptr @fd2, align 8
 199 // CHECK:   ret void
 200 void test_postinc(void) {
 201
 202   sc2++;
 203   uc2++;
 204
 205   ss2++;
 206   us2++;
 207
 208   si2++;
 209   ui2++;
 210
 211   sl2++;
 212   ul2++;
 213
 214   fd2++;
 215 }
 216
 217 // CHECK-LABEL: define{{.*}} void @test_predec() #0 {
 218 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 219 // CHECK:   [[DEC:%.*]] = add <16 x i8> [[TMP0]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
 220 // CHECK:   store volatile <16 x i8> [[DEC]], ptr @sc2, align 8
 221 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 222 // CHECK:   [[DEC1:%.*]] = add <16 x i8> [[TMP1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
 223 // CHECK:   store volatile <16 x i8> [[DEC1]], ptr @uc2, align 8
 224 // CHECK:   [[TMP2:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 225 // CHECK:   [[DEC2:%.*]] = add <8 x i16> [[TMP2]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
 226 // CHECK:   store volatile <8 x i16> [[DEC2]], ptr @ss2, align 8
 227 // CHECK:   [[TMP3:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 228 // CHECK:   [[DEC3:%.*]] = add <8 x i16> [[TMP3]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
 229 // CHECK:   store volatile <8 x i16> [[DEC3]], ptr @us2, align 8
 230 // CHECK:   [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 231 // CHECK:   [[DEC4:%.*]] = add <4 x i32> [[TMP4]], <i32 -1, i32 -1, i32 -1, i32 -1>
 232 // CHECK:   store volatile <4 x i32> [[DEC4]], ptr @si2, align 8
 233 // CHECK:   [[TMP5:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 234 // CHECK:   [[DEC5:%.*]] = add <4 x i32> [[TMP5]], <i32 -1, i32 -1, i32 -1, i32 -1>
 235 // CHECK:   store volatile <4 x i32> [[DEC5]], ptr @ui2, align 8
 236 // CHECK:   [[TMP6:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 237 // CHECK:   [[DEC6:%.*]] = add <2 x i64> [[TMP6]], <i64 -1, i64 -1>
 238 // CHECK:   store volatile <2 x i64> [[DEC6]], ptr @sl2, align 8
 239 // CHECK:   [[TMP7:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 240 // CHECK:   [[DEC7:%.*]] = add <2 x i64> [[TMP7]], <i64 -1, i64 -1>
 241 // CHECK:   store volatile <2 x i64> [[DEC7]], ptr @ul2, align 8
 242 // CHECK:   [[TMP8:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 243 // CHECK:   [[DEC8:%.*]] = fadd <2 x double> [[TMP8]], <double -1.000000e+00, double -1.000000e+00>
 244 // CHECK:   store volatile <2 x double> [[DEC8]], ptr @fd2, align 8
 245 // CHECK:   ret void
 246 void test_predec(void) {
 247
 248   --sc2;
 249   --uc2;
 250
 251   --ss2;
 252   --us2;
 253
 254   --si2;
 255   --ui2;
 256
 257   --sl2;
 258   --ul2;
 259
 260   --fd2;
 261 }
 262
 263 // CHECK-LABEL: define{{.*}} void @test_postdec() #0 {
 264 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 265 // CHECK:   [[DEC:%.*]] = add <16 x i8> [[TMP0]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
 266 // CHECK:   store volatile <16 x i8> [[DEC]], ptr @sc2, align 8
 267 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 268 // CHECK:   [[DEC1:%.*]] = add <16 x i8> [[TMP1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
 269 // CHECK:   store volatile <16 x i8> [[DEC1]], ptr @uc2, align 8
 270 // CHECK:   [[TMP2:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 271 // CHECK:   [[DEC2:%.*]] = add <8 x i16> [[TMP2]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
 272 // CHECK:   store volatile <8 x i16> [[DEC2]], ptr @ss2, align 8
 273 // CHECK:   [[TMP3:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 274 // CHECK:   [[DEC3:%.*]] = add <8 x i16> [[TMP3]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
 275 // CHECK:   store volatile <8 x i16> [[DEC3]], ptr @us2, align 8
 276 // CHECK:   [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 277 // CHECK:   [[DEC4:%.*]] = add <4 x i32> [[TMP4]], <i32 -1, i32 -1, i32 -1, i32 -1>
 278 // CHECK:   store volatile <4 x i32> [[DEC4]], ptr @si2, align 8
 279 // CHECK:   [[TMP5:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 280 // CHECK:   [[DEC5:%.*]] = add <4 x i32> [[TMP5]], <i32 -1, i32 -1, i32 -1, i32 -1>
 281 // CHECK:   store volatile <4 x i32> [[DEC5]], ptr @ui2, align 8
 282 // CHECK:   [[TMP6:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 283 // CHECK:   [[DEC6:%.*]] = add <2 x i64> [[TMP6]], <i64 -1, i64 -1>
 284 // CHECK:   store volatile <2 x i64> [[DEC6]], ptr @sl2, align 8
 285 // CHECK:   [[TMP7:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 286 // CHECK:   [[DEC7:%.*]] = add <2 x i64> [[TMP7]], <i64 -1, i64 -1>
 287 // CHECK:   store volatile <2 x i64> [[DEC7]], ptr @ul2, align 8
 288 // CHECK:   [[TMP8:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 289 // CHECK:   [[DEC8:%.*]] = fadd <2 x double> [[TMP8]], <double -1.000000e+00, double -1.000000e+00>
 290 // CHECK:   store volatile <2 x double> [[DEC8]], ptr @fd2, align 8
 291 // CHECK:   ret void
 292 void test_postdec(void) {
 293
 294   sc2--;
 295   uc2--;
 296
 297   ss2--;
 298   us2--;
 299
 300   si2--;
 301   ui2--;
 302
 303   sl2--;
 304   ul2--;
 305
 306   fd2--;
 307 }
 308
 309 // CHECK-LABEL: define{{.*}} void @test_add() #0 {
 310 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 311 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 312 // CHECK:   [[ADD:%.*]] = add <16 x i8> [[TMP0]], [[TMP1]]
 313 // CHECK:   store volatile <16 x i8> [[ADD]], ptr @sc, align 8
 314 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 315 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
 316 // CHECK:   [[ADD1:%.*]] = add <16 x i8> [[TMP2]], [[TMP3]]
 317 // CHECK:   store volatile <16 x i8> [[ADD1]], ptr @sc, align 8
 318 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
 319 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 320 // CHECK:   [[ADD2:%.*]] = add <16 x i8> [[TMP4]], [[TMP5]]
 321 // CHECK:   store volatile <16 x i8> [[ADD2]], ptr @sc, align 8
 322 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 323 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 324 // CHECK:   [[ADD3:%.*]] = add <16 x i8> [[TMP6]], [[TMP7]]
 325 // CHECK:   store volatile <16 x i8> [[ADD3]], ptr @uc, align 8
 326 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 327 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
 328 // CHECK:   [[ADD4:%.*]] = add <16 x i8> [[TMP8]], [[TMP9]]
 329 // CHECK:   store volatile <16 x i8> [[ADD4]], ptr @uc, align 8
 330 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
 331 // CHECK:   [[TMP11:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 332 // CHECK:   [[ADD5:%.*]] = add <16 x i8> [[TMP10]], [[TMP11]]
 333 // CHECK:   store volatile <16 x i8> [[ADD5]], ptr @uc, align 8
 334 // CHECK:   [[TMP12:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 335 // CHECK:   [[TMP13:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 336 // CHECK:   [[ADD6:%.*]] = add <8 x i16> [[TMP12]], [[TMP13]]
 337 // CHECK:   store volatile <8 x i16> [[ADD6]], ptr @ss, align 8
 338 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 339 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
 340 // CHECK:   [[ADD7:%.*]] = add <8 x i16> [[TMP14]], [[TMP15]]
 341 // CHECK:   store volatile <8 x i16> [[ADD7]], ptr @ss, align 8
 342 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
 343 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 344 // CHECK:   [[ADD8:%.*]] = add <8 x i16> [[TMP16]], [[TMP17]]
 345 // CHECK:   store volatile <8 x i16> [[ADD8]], ptr @ss, align 8
 346 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 347 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 348 // CHECK:   [[ADD9:%.*]] = add <8 x i16> [[TMP18]], [[TMP19]]
 349 // CHECK:   store volatile <8 x i16> [[ADD9]], ptr @us, align 8
 350 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 351 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
 352 // CHECK:   [[ADD10:%.*]] = add <8 x i16> [[TMP20]], [[TMP21]]
 353 // CHECK:   store volatile <8 x i16> [[ADD10]], ptr @us, align 8
 354 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
 355 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 356 // CHECK:   [[ADD11:%.*]] = add <8 x i16> [[TMP22]], [[TMP23]]
 357 // CHECK:   store volatile <8 x i16> [[ADD11]], ptr @us, align 8
 358 // CHECK:   [[TMP24:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 359 // CHECK:   [[TMP25:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 360 // CHECK:   [[ADD12:%.*]] = add <4 x i32> [[TMP24]], [[TMP25]]
 361 // CHECK:   store volatile <4 x i32> [[ADD12]], ptr @si, align 8
 362 // CHECK:   [[TMP26:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 363 // CHECK:   [[TMP27:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
 364 // CHECK:   [[ADD13:%.*]] = add <4 x i32> [[TMP26]], [[TMP27]]
 365 // CHECK:   store volatile <4 x i32> [[ADD13]], ptr @si, align 8
 366 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
 367 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 368 // CHECK:   [[ADD14:%.*]] = add <4 x i32> [[TMP28]], [[TMP29]]
 369 // CHECK:   store volatile <4 x i32> [[ADD14]], ptr @si, align 8
 370 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 371 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 372 // CHECK:   [[ADD15:%.*]] = add <4 x i32> [[TMP30]], [[TMP31]]
 373 // CHECK:   store volatile <4 x i32> [[ADD15]], ptr @ui, align 8
 374 // CHECK:   [[TMP32:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 375 // CHECK:   [[TMP33:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
 376 // CHECK:   [[ADD16:%.*]] = add <4 x i32> [[TMP32]], [[TMP33]]
 377 // CHECK:   store volatile <4 x i32> [[ADD16]], ptr @ui, align 8
 378 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
 379 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 380 // CHECK:   [[ADD17:%.*]] = add <4 x i32> [[TMP34]], [[TMP35]]
 381 // CHECK:   store volatile <4 x i32> [[ADD17]], ptr @ui, align 8
 382 // CHECK:   [[TMP36:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 383 // CHECK:   [[TMP37:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 384 // CHECK:   [[ADD18:%.*]] = add <2 x i64> [[TMP36]], [[TMP37]]
 385 // CHECK:   store volatile <2 x i64> [[ADD18]], ptr @sl, align 8
 386 // CHECK:   [[TMP38:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 387 // CHECK:   [[TMP39:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
 388 // CHECK:   [[ADD19:%.*]] = add <2 x i64> [[TMP38]], [[TMP39]]
 389 // CHECK:   store volatile <2 x i64> [[ADD19]], ptr @sl, align 8
 390 // CHECK:   [[TMP40:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
 391 // CHECK:   [[TMP41:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 392 // CHECK:   [[ADD20:%.*]] = add <2 x i64> [[TMP40]], [[TMP41]]
 393 // CHECK:   store volatile <2 x i64> [[ADD20]], ptr @sl, align 8
 394 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 395 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 396 // CHECK:   [[ADD21:%.*]] = add <2 x i64> [[TMP42]], [[TMP43]]
 397 // CHECK:   store volatile <2 x i64> [[ADD21]], ptr @ul, align 8
 398 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 399 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
 400 // CHECK:   [[ADD22:%.*]] = add <2 x i64> [[TMP44]], [[TMP45]]
 401 // CHECK:   store volatile <2 x i64> [[ADD22]], ptr @ul, align 8
 402 // CHECK:   [[TMP46:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
 403 // CHECK:   [[TMP47:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 404 // CHECK:   [[ADD23:%.*]] = add <2 x i64> [[TMP46]], [[TMP47]]
 405 // CHECK:   store volatile <2 x i64> [[ADD23]], ptr @ul, align 8
 406 // CHECK:   [[TMP48:%.*]] = load volatile <2 x double>, ptr @fd, align 8
 407 // CHECK:   [[TMP49:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 408 // CHECK:   [[ADD24:%.*]] = fadd <2 x double> [[TMP48]], [[TMP49]]
 409 // CHECK:   store volatile <2 x double> [[ADD24]], ptr @fd, align 8
 410 // CHECK:   ret void
 411 void test_add(void) {
 412
 413   sc = sc + sc2;
 414   sc = sc + bc2;
 415   sc = bc + sc2;
 416   uc = uc + uc2;
 417   uc = uc + bc2;
 418   uc = bc + uc2;
 419
 420   ss = ss + ss2;
 421   ss = ss + bs2;
 422   ss = bs + ss2;
 423   us = us + us2;
 424   us = us + bs2;
 425   us = bs + us2;
 426
 427   si = si + si2;
 428   si = si + bi2;
 429   si = bi + si2;
 430   ui = ui + ui2;
 431   ui = ui + bi2;
 432   ui = bi + ui2;
 433
 434   sl = sl + sl2;
 435   sl = sl + bl2;
 436   sl = bl + sl2;
 437   ul = ul + ul2;
 438   ul = ul + bl2;
 439   ul = bl + ul2;
 440
 441   fd = fd + fd2;
 442 }
 443
 444 // CHECK-LABEL: define{{.*}} void @test_add_assign() #0 {
 445 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 446 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 447 // CHECK:   [[ADD:%.*]] = add <16 x i8> [[TMP1]], [[TMP0]]
 448 // CHECK:   store volatile <16 x i8> [[ADD]], ptr @sc, align 8
 449 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
 450 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 451 // CHECK:   [[ADD1:%.*]] = add <16 x i8> [[TMP3]], [[TMP2]]
 452 // CHECK:   store volatile <16 x i8> [[ADD1]], ptr @sc, align 8
 453 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 454 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 455 // CHECK:   [[ADD2:%.*]] = add <16 x i8> [[TMP5]], [[TMP4]]
 456 // CHECK:   store volatile <16 x i8> [[ADD2]], ptr @uc, align 8
 457 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
 458 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 459 // CHECK:   [[ADD3:%.*]] = add <16 x i8> [[TMP7]], [[TMP6]]
 460 // CHECK:   store volatile <16 x i8> [[ADD3]], ptr @uc, align 8
 461 // CHECK:   [[TMP8:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 462 // CHECK:   [[TMP9:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 463 // CHECK:   [[ADD4:%.*]] = add <8 x i16> [[TMP9]], [[TMP8]]
 464 // CHECK:   store volatile <8 x i16> [[ADD4]], ptr @ss, align 8
 465 // CHECK:   [[TMP10:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
 466 // CHECK:   [[TMP11:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 467 // CHECK:   [[ADD5:%.*]] = add <8 x i16> [[TMP11]], [[TMP10]]
 468 // CHECK:   store volatile <8 x i16> [[ADD5]], ptr @ss, align 8
 469 // CHECK:   [[TMP12:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 470 // CHECK:   [[TMP13:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 471 // CHECK:   [[ADD6:%.*]] = add <8 x i16> [[TMP13]], [[TMP12]]
 472 // CHECK:   store volatile <8 x i16> [[ADD6]], ptr @us, align 8
 473 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
 474 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 475 // CHECK:   [[ADD7:%.*]] = add <8 x i16> [[TMP15]], [[TMP14]]
 476 // CHECK:   store volatile <8 x i16> [[ADD7]], ptr @us, align 8
 477 // CHECK:   [[TMP16:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 478 // CHECK:   [[TMP17:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 479 // CHECK:   [[ADD8:%.*]] = add <4 x i32> [[TMP17]], [[TMP16]]
 480 // CHECK:   store volatile <4 x i32> [[ADD8]], ptr @si, align 8
 481 // CHECK:   [[TMP18:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
 482 // CHECK:   [[TMP19:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 483 // CHECK:   [[ADD9:%.*]] = add <4 x i32> [[TMP19]], [[TMP18]]
 484 // CHECK:   store volatile <4 x i32> [[ADD9]], ptr @si, align 8
 485 // CHECK:   [[TMP20:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 486 // CHECK:   [[TMP21:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 487 // CHECK:   [[ADD10:%.*]] = add <4 x i32> [[TMP21]], [[TMP20]]
 488 // CHECK:   store volatile <4 x i32> [[ADD10]], ptr @ui, align 8
 489 // CHECK:   [[TMP22:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
 490 // CHECK:   [[TMP23:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 491 // CHECK:   [[ADD11:%.*]] = add <4 x i32> [[TMP23]], [[TMP22]]
 492 // CHECK:   store volatile <4 x i32> [[ADD11]], ptr @ui, align 8
 493 // CHECK:   [[TMP24:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 494 // CHECK:   [[TMP25:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 495 // CHECK:   [[ADD12:%.*]] = add <2 x i64> [[TMP25]], [[TMP24]]
 496 // CHECK:   store volatile <2 x i64> [[ADD12]], ptr @sl, align 8
 497 // CHECK:   [[TMP26:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
 498 // CHECK:   [[TMP27:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 499 // CHECK:   [[ADD13:%.*]] = add <2 x i64> [[TMP27]], [[TMP26]]
 500 // CHECK:   store volatile <2 x i64> [[ADD13]], ptr @sl, align 8
 501 // CHECK:   [[TMP28:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 502 // CHECK:   [[TMP29:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 503 // CHECK:   [[ADD14:%.*]] = add <2 x i64> [[TMP29]], [[TMP28]]
 504 // CHECK:   store volatile <2 x i64> [[ADD14]], ptr @ul, align 8
 505 // CHECK:   [[TMP30:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
 506 // CHECK:   [[TMP31:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 507 // CHECK:   [[ADD15:%.*]] = add <2 x i64> [[TMP31]], [[TMP30]]
 508 // CHECK:   store volatile <2 x i64> [[ADD15]], ptr @ul, align 8
 509 // CHECK:   [[TMP32:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 510 // CHECK:   [[TMP33:%.*]] = load volatile <2 x double>, ptr @fd, align 8
 511 // CHECK:   [[ADD16:%.*]] = fadd <2 x double> [[TMP33]], [[TMP32]]
 512 // CHECK:   store volatile <2 x double> [[ADD16]], ptr @fd, align 8
 513 // CHECK:   ret void
 514 void test_add_assign(void) {
 515
 516   sc += sc2;
 517   sc += bc2;
 518   uc += uc2;
 519   uc += bc2;
 520
 521   ss += ss2;
 522   ss += bs2;
 523   us += us2;
 524   us += bs2;
 525
 526   si += si2;
 527   si += bi2;
 528   ui += ui2;
 529   ui += bi2;
 530
 531   sl += sl2;
 532   sl += bl2;
 533   ul += ul2;
 534   ul += bl2;
 535
 536   fd += fd2;
 537 }
 538
 539 // CHECK-LABEL: define{{.*}} void @test_sub() #0 {
 540 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 541 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 542 // CHECK:   [[SUB:%.*]] = sub <16 x i8> [[TMP0]], [[TMP1]]
 543 // CHECK:   store volatile <16 x i8> [[SUB]], ptr @sc, align 8
 544 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 545 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
 546 // CHECK:   [[SUB1:%.*]] = sub <16 x i8> [[TMP2]], [[TMP3]]
 547 // CHECK:   store volatile <16 x i8> [[SUB1]], ptr @sc, align 8
 548 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
 549 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 550 // CHECK:   [[SUB2:%.*]] = sub <16 x i8> [[TMP4]], [[TMP5]]
 551 // CHECK:   store volatile <16 x i8> [[SUB2]], ptr @sc, align 8
 552 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 553 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 554 // CHECK:   [[SUB3:%.*]] = sub <16 x i8> [[TMP6]], [[TMP7]]
 555 // CHECK:   store volatile <16 x i8> [[SUB3]], ptr @uc, align 8
 556 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 557 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
 558 // CHECK:   [[SUB4:%.*]] = sub <16 x i8> [[TMP8]], [[TMP9]]
 559 // CHECK:   store volatile <16 x i8> [[SUB4]], ptr @uc, align 8
 560 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
 561 // CHECK:   [[TMP11:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 562 // CHECK:   [[SUB5:%.*]] = sub <16 x i8> [[TMP10]], [[TMP11]]
 563 // CHECK:   store volatile <16 x i8> [[SUB5]], ptr @uc, align 8
 564 // CHECK:   [[TMP12:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 565 // CHECK:   [[TMP13:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 566 // CHECK:   [[SUB6:%.*]] = sub <8 x i16> [[TMP12]], [[TMP13]]
 567 // CHECK:   store volatile <8 x i16> [[SUB6]], ptr @ss, align 8
 568 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 569 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
 570 // CHECK:   [[SUB7:%.*]] = sub <8 x i16> [[TMP14]], [[TMP15]]
 571 // CHECK:   store volatile <8 x i16> [[SUB7]], ptr @ss, align 8
 572 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
 573 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 574 // CHECK:   [[SUB8:%.*]] = sub <8 x i16> [[TMP16]], [[TMP17]]
 575 // CHECK:   store volatile <8 x i16> [[SUB8]], ptr @ss, align 8
 576 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 577 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 578 // CHECK:   [[SUB9:%.*]] = sub <8 x i16> [[TMP18]], [[TMP19]]
 579 // CHECK:   store volatile <8 x i16> [[SUB9]], ptr @us, align 8
 580 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 581 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
 582 // CHECK:   [[SUB10:%.*]] = sub <8 x i16> [[TMP20]], [[TMP21]]
 583 // CHECK:   store volatile <8 x i16> [[SUB10]], ptr @us, align 8
 584 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
 585 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 586 // CHECK:   [[SUB11:%.*]] = sub <8 x i16> [[TMP22]], [[TMP23]]
 587 // CHECK:   store volatile <8 x i16> [[SUB11]], ptr @us, align 8
 588 // CHECK:   [[TMP24:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 589 // CHECK:   [[TMP25:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 590 // CHECK:   [[SUB12:%.*]] = sub <4 x i32> [[TMP24]], [[TMP25]]
 591 // CHECK:   store volatile <4 x i32> [[SUB12]], ptr @si, align 8
 592 // CHECK:   [[TMP26:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 593 // CHECK:   [[TMP27:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
 594 // CHECK:   [[SUB13:%.*]] = sub <4 x i32> [[TMP26]], [[TMP27]]
 595 // CHECK:   store volatile <4 x i32> [[SUB13]], ptr @si, align 8
 596 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
 597 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 598 // CHECK:   [[SUB14:%.*]] = sub <4 x i32> [[TMP28]], [[TMP29]]
 599 // CHECK:   store volatile <4 x i32> [[SUB14]], ptr @si, align 8
 600 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 601 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 602 // CHECK:   [[SUB15:%.*]] = sub <4 x i32> [[TMP30]], [[TMP31]]
 603 // CHECK:   store volatile <4 x i32> [[SUB15]], ptr @ui, align 8
 604 // CHECK:   [[TMP32:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 605 // CHECK:   [[TMP33:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
 606 // CHECK:   [[SUB16:%.*]] = sub <4 x i32> [[TMP32]], [[TMP33]]
 607 // CHECK:   store volatile <4 x i32> [[SUB16]], ptr @ui, align 8
 608 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
 609 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 610 // CHECK:   [[SUB17:%.*]] = sub <4 x i32> [[TMP34]], [[TMP35]]
 611 // CHECK:   store volatile <4 x i32> [[SUB17]], ptr @ui, align 8
 612 // CHECK:   [[TMP36:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 613 // CHECK:   [[TMP37:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 614 // CHECK:   [[SUB18:%.*]] = sub <2 x i64> [[TMP36]], [[TMP37]]
 615 // CHECK:   store volatile <2 x i64> [[SUB18]], ptr @sl, align 8
 616 // CHECK:   [[TMP38:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 617 // CHECK:   [[TMP39:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
 618 // CHECK:   [[SUB19:%.*]] = sub <2 x i64> [[TMP38]], [[TMP39]]
 619 // CHECK:   store volatile <2 x i64> [[SUB19]], ptr @sl, align 8
 620 // CHECK:   [[TMP40:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
 621 // CHECK:   [[TMP41:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 622 // CHECK:   [[SUB20:%.*]] = sub <2 x i64> [[TMP40]], [[TMP41]]
 623 // CHECK:   store volatile <2 x i64> [[SUB20]], ptr @sl, align 8
 624 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 625 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 626 // CHECK:   [[SUB21:%.*]] = sub <2 x i64> [[TMP42]], [[TMP43]]
 627 // CHECK:   store volatile <2 x i64> [[SUB21]], ptr @ul, align 8
 628 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 629 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
 630 // CHECK:   [[SUB22:%.*]] = sub <2 x i64> [[TMP44]], [[TMP45]]
 631 // CHECK:   store volatile <2 x i64> [[SUB22]], ptr @ul, align 8
 632 // CHECK:   [[TMP46:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
 633 // CHECK:   [[TMP47:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 634 // CHECK:   [[SUB23:%.*]] = sub <2 x i64> [[TMP46]], [[TMP47]]
 635 // CHECK:   store volatile <2 x i64> [[SUB23]], ptr @ul, align 8
 636 // CHECK:   [[TMP48:%.*]] = load volatile <2 x double>, ptr @fd, align 8
 637 // CHECK:   [[TMP49:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 638 // CHECK:   [[SUB24:%.*]] = fsub <2 x double> [[TMP48]], [[TMP49]]
 639 // CHECK:   store volatile <2 x double> [[SUB24]], ptr @fd, align 8
 640 // CHECK:   ret void
 641 void test_sub(void) {
 642
 643   sc = sc - sc2;
 644   sc = sc - bc2;
 645   sc = bc - sc2;
 646   uc = uc - uc2;
 647   uc = uc - bc2;
 648   uc = bc - uc2;
 649
 650   ss = ss - ss2;
 651   ss = ss - bs2;
 652   ss = bs - ss2;
 653   us = us - us2;
 654   us = us - bs2;
 655   us = bs - us2;
 656
 657   si = si - si2;
 658   si = si - bi2;
 659   si = bi - si2;
 660   ui = ui - ui2;
 661   ui = ui - bi2;
 662   ui = bi - ui2;
 663
 664   sl = sl - sl2;
 665   sl = sl - bl2;
 666   sl = bl - sl2;
 667   ul = ul - ul2;
 668   ul = ul - bl2;
 669   ul = bl - ul2;
 670
 671   fd = fd - fd2;
 672 }
 673
 674 // CHECK-LABEL: define{{.*}} void @test_sub_assign() #0 {
 675 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 676 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 677 // CHECK:   [[SUB:%.*]] = sub <16 x i8> [[TMP1]], [[TMP0]]
 678 // CHECK:   store volatile <16 x i8> [[SUB]], ptr @sc, align 8
 679 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
 680 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 681 // CHECK:   [[SUB1:%.*]] = sub <16 x i8> [[TMP3]], [[TMP2]]
 682 // CHECK:   store volatile <16 x i8> [[SUB1]], ptr @sc, align 8
 683 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 684 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 685 // CHECK:   [[SUB2:%.*]] = sub <16 x i8> [[TMP5]], [[TMP4]]
 686 // CHECK:   store volatile <16 x i8> [[SUB2]], ptr @uc, align 8
 687 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
 688 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 689 // CHECK:   [[SUB3:%.*]] = sub <16 x i8> [[TMP7]], [[TMP6]]
 690 // CHECK:   store volatile <16 x i8> [[SUB3]], ptr @uc, align 8
 691 // CHECK:   [[TMP8:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 692 // CHECK:   [[TMP9:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 693 // CHECK:   [[SUB4:%.*]] = sub <8 x i16> [[TMP9]], [[TMP8]]
 694 // CHECK:   store volatile <8 x i16> [[SUB4]], ptr @ss, align 8
 695 // CHECK:   [[TMP10:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
 696 // CHECK:   [[TMP11:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 697 // CHECK:   [[SUB5:%.*]] = sub <8 x i16> [[TMP11]], [[TMP10]]
 698 // CHECK:   store volatile <8 x i16> [[SUB5]], ptr @ss, align 8
 699 // CHECK:   [[TMP12:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 700 // CHECK:   [[TMP13:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 701 // CHECK:   [[SUB6:%.*]] = sub <8 x i16> [[TMP13]], [[TMP12]]
 702 // CHECK:   store volatile <8 x i16> [[SUB6]], ptr @us, align 8
 703 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
 704 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 705 // CHECK:   [[SUB7:%.*]] = sub <8 x i16> [[TMP15]], [[TMP14]]
 706 // CHECK:   store volatile <8 x i16> [[SUB7]], ptr @us, align 8
 707 // CHECK:   [[TMP16:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 708 // CHECK:   [[TMP17:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 709 // CHECK:   [[SUB8:%.*]] = sub <4 x i32> [[TMP17]], [[TMP16]]
 710 // CHECK:   store volatile <4 x i32> [[SUB8]], ptr @si, align 8
 711 // CHECK:   [[TMP18:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
 712 // CHECK:   [[TMP19:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 713 // CHECK:   [[SUB9:%.*]] = sub <4 x i32> [[TMP19]], [[TMP18]]
 714 // CHECK:   store volatile <4 x i32> [[SUB9]], ptr @si, align 8
 715 // CHECK:   [[TMP20:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 716 // CHECK:   [[TMP21:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 717 // CHECK:   [[SUB10:%.*]] = sub <4 x i32> [[TMP21]], [[TMP20]]
 718 // CHECK:   store volatile <4 x i32> [[SUB10]], ptr @ui, align 8
 719 // CHECK:   [[TMP22:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
 720 // CHECK:   [[TMP23:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 721 // CHECK:   [[SUB11:%.*]] = sub <4 x i32> [[TMP23]], [[TMP22]]
 722 // CHECK:   store volatile <4 x i32> [[SUB11]], ptr @ui, align 8
 723 // CHECK:   [[TMP24:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 724 // CHECK:   [[TMP25:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 725 // CHECK:   [[SUB12:%.*]] = sub <2 x i64> [[TMP25]], [[TMP24]]
 726 // CHECK:   store volatile <2 x i64> [[SUB12]], ptr @sl, align 8
 727 // CHECK:   [[TMP26:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
 728 // CHECK:   [[TMP27:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 729 // CHECK:   [[SUB13:%.*]] = sub <2 x i64> [[TMP27]], [[TMP26]]
 730 // CHECK:   store volatile <2 x i64> [[SUB13]], ptr @sl, align 8
 731 // CHECK:   [[TMP28:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 732 // CHECK:   [[TMP29:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 733 // CHECK:   [[SUB14:%.*]] = sub <2 x i64> [[TMP29]], [[TMP28]]
 734 // CHECK:   store volatile <2 x i64> [[SUB14]], ptr @ul, align 8
 735 // CHECK:   [[TMP30:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
 736 // CHECK:   [[TMP31:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 737 // CHECK:   [[SUB15:%.*]] = sub <2 x i64> [[TMP31]], [[TMP30]]
 738 // CHECK:   store volatile <2 x i64> [[SUB15]], ptr @ul, align 8
 739 // CHECK:   [[TMP32:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 740 // CHECK:   [[TMP33:%.*]] = load volatile <2 x double>, ptr @fd, align 8
 741 // CHECK:   [[SUB16:%.*]] = fsub <2 x double> [[TMP33]], [[TMP32]]
 742 // CHECK:   store volatile <2 x double> [[SUB16]], ptr @fd, align 8
 743 // CHECK:   ret void
 744 void test_sub_assign(void) {
 745
 746   sc -= sc2;
 747   sc -= bc2;
 748   uc -= uc2;
 749   uc -= bc2;
 750
 751   ss -= ss2;
 752   ss -= bs2;
 753   us -= us2;
 754   us -= bs2;
 755
 756   si -= si2;
 757   si -= bi2;
 758   ui -= ui2;
 759   ui -= bi2;
 760
 761   sl -= sl2;
 762   sl -= bl2;
 763   ul -= ul2;
 764   ul -= bl2;
 765
 766   fd -= fd2;
 767 }
 768
 769 // CHECK-LABEL: define{{.*}} void @test_mul() #0 {
 770 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 771 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 772 // CHECK:   [[MUL:%.*]] = mul <16 x i8> [[TMP0]], [[TMP1]]
 773 // CHECK:   store volatile <16 x i8> [[MUL]], ptr @sc, align 8
 774 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 775 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 776 // CHECK:   [[MUL1:%.*]] = mul <16 x i8> [[TMP2]], [[TMP3]]
 777 // CHECK:   store volatile <16 x i8> [[MUL1]], ptr @uc, align 8
 778 // CHECK:   [[TMP4:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 779 // CHECK:   [[TMP5:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 780 // CHECK:   [[MUL2:%.*]] = mul <8 x i16> [[TMP4]], [[TMP5]]
 781 // CHECK:   store volatile <8 x i16> [[MUL2]], ptr @ss, align 8
 782 // CHECK:   [[TMP6:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 783 // CHECK:   [[TMP7:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 784 // CHECK:   [[MUL3:%.*]] = mul <8 x i16> [[TMP6]], [[TMP7]]
 785 // CHECK:   store volatile <8 x i16> [[MUL3]], ptr @us, align 8
 786 // CHECK:   [[TMP8:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 787 // CHECK:   [[TMP9:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 788 // CHECK:   [[MUL4:%.*]] = mul <4 x i32> [[TMP8]], [[TMP9]]
 789 // CHECK:   store volatile <4 x i32> [[MUL4]], ptr @si, align 8
 790 // CHECK:   [[TMP10:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 791 // CHECK:   [[TMP11:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 792 // CHECK:   [[MUL5:%.*]] = mul <4 x i32> [[TMP10]], [[TMP11]]
 793 // CHECK:   store volatile <4 x i32> [[MUL5]], ptr @ui, align 8
 794 // CHECK:   [[TMP12:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 795 // CHECK:   [[TMP13:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 796 // CHECK:   [[MUL6:%.*]] = mul <2 x i64> [[TMP12]], [[TMP13]]
 797 // CHECK:   store volatile <2 x i64> [[MUL6]], ptr @sl, align 8
 798 // CHECK:   [[TMP14:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 799 // CHECK:   [[TMP15:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 800 // CHECK:   [[MUL7:%.*]] = mul <2 x i64> [[TMP14]], [[TMP15]]
 801 // CHECK:   store volatile <2 x i64> [[MUL7]], ptr @ul, align 8
 802 // CHECK:   [[TMP16:%.*]] = load volatile <2 x double>, ptr @fd, align 8
 803 // CHECK:   [[TMP17:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 804 // CHECK:   [[MUL8:%.*]] = fmul <2 x double> [[TMP16]], [[TMP17]]
 805 // CHECK:   store volatile <2 x double> [[MUL8]], ptr @fd, align 8
 806 // CHECK:   ret void
 807 void test_mul(void) {
 808
 809   sc = sc * sc2;
 810   uc = uc * uc2;
 811
 812   ss = ss * ss2;
 813   us = us * us2;
 814
 815   si = si * si2;
 816   ui = ui * ui2;
 817
 818   sl = sl * sl2;
 819   ul = ul * ul2;
 820
 821   fd = fd * fd2;
 822 }
 823
 824 // CHECK-LABEL: define{{.*}} void @test_mul_assign() #0 {
 825 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 826 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 827 // CHECK:   [[MUL:%.*]] = mul <16 x i8> [[TMP1]], [[TMP0]]
 828 // CHECK:   store volatile <16 x i8> [[MUL]], ptr @sc, align 8
 829 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 830 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 831 // CHECK:   [[MUL1:%.*]] = mul <16 x i8> [[TMP3]], [[TMP2]]
 832 // CHECK:   store volatile <16 x i8> [[MUL1]], ptr @uc, align 8
 833 // CHECK:   [[TMP4:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 834 // CHECK:   [[TMP5:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 835 // CHECK:   [[MUL2:%.*]] = mul <8 x i16> [[TMP5]], [[TMP4]]
 836 // CHECK:   store volatile <8 x i16> [[MUL2]], ptr @ss, align 8
 837 // CHECK:   [[TMP6:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 838 // CHECK:   [[TMP7:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 839 // CHECK:   [[MUL3:%.*]] = mul <8 x i16> [[TMP7]], [[TMP6]]
 840 // CHECK:   store volatile <8 x i16> [[MUL3]], ptr @us, align 8
 841 // CHECK:   [[TMP8:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 842 // CHECK:   [[TMP9:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 843 // CHECK:   [[MUL4:%.*]] = mul <4 x i32> [[TMP9]], [[TMP8]]
 844 // CHECK:   store volatile <4 x i32> [[MUL4]], ptr @si, align 8
 845 // CHECK:   [[TMP10:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 846 // CHECK:   [[TMP11:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 847 // CHECK:   [[MUL5:%.*]] = mul <4 x i32> [[TMP11]], [[TMP10]]
 848 // CHECK:   store volatile <4 x i32> [[MUL5]], ptr @ui, align 8
 849 // CHECK:   [[TMP12:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 850 // CHECK:   [[TMP13:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 851 // CHECK:   [[MUL6:%.*]] = mul <2 x i64> [[TMP13]], [[TMP12]]
 852 // CHECK:   store volatile <2 x i64> [[MUL6]], ptr @sl, align 8
 853 // CHECK:   [[TMP14:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 854 // CHECK:   [[TMP15:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 855 // CHECK:   [[MUL7:%.*]] = mul <2 x i64> [[TMP15]], [[TMP14]]
 856 // CHECK:   store volatile <2 x i64> [[MUL7]], ptr @ul, align 8
 857 // CHECK:   [[TMP16:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 858 // CHECK:   [[TMP17:%.*]] = load volatile <2 x double>, ptr @fd, align 8
 859 // CHECK:   [[MUL8:%.*]] = fmul <2 x double> [[TMP17]], [[TMP16]]
 860 // CHECK:   store volatile <2 x double> [[MUL8]], ptr @fd, align 8
 861 // CHECK:   ret void
 862 void test_mul_assign(void) {
 863
 864   sc *= sc2;
 865   uc *= uc2;
 866
 867   ss *= ss2;
 868   us *= us2;
 869
 870   si *= si2;
 871   ui *= ui2;
 872
 873   sl *= sl2;
 874   ul *= ul2;
 875
 876   fd *= fd2;
 877 }
 878
 879 // CHECK-LABEL: define{{.*}} void @test_div() #0 {
 880 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 881 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 882 // CHECK:   [[DIV:%.*]] = sdiv <16 x i8> [[TMP0]], [[TMP1]]
 883 // CHECK:   store volatile <16 x i8> [[DIV]], ptr @sc, align 8
 884 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 885 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 886 // CHECK:   [[DIV1:%.*]] = udiv <16 x i8> [[TMP2]], [[TMP3]]
 887 // CHECK:   store volatile <16 x i8> [[DIV1]], ptr @uc, align 8
 888 // CHECK:   [[TMP4:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 889 // CHECK:   [[TMP5:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 890 // CHECK:   [[DIV2:%.*]] = sdiv <8 x i16> [[TMP4]], [[TMP5]]
 891 // CHECK:   store volatile <8 x i16> [[DIV2]], ptr @ss, align 8
 892 // CHECK:   [[TMP6:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 893 // CHECK:   [[TMP7:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 894 // CHECK:   [[DIV3:%.*]] = udiv <8 x i16> [[TMP6]], [[TMP7]]
 895 // CHECK:   store volatile <8 x i16> [[DIV3]], ptr @us, align 8
 896 // CHECK:   [[TMP8:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 897 // CHECK:   [[TMP9:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 898 // CHECK:   [[DIV4:%.*]] = sdiv <4 x i32> [[TMP8]], [[TMP9]]
 899 // CHECK:   store volatile <4 x i32> [[DIV4]], ptr @si, align 8
 900 // CHECK:   [[TMP10:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 901 // CHECK:   [[TMP11:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 902 // CHECK:   [[DIV5:%.*]] = udiv <4 x i32> [[TMP10]], [[TMP11]]
 903 // CHECK:   store volatile <4 x i32> [[DIV5]], ptr @ui, align 8
 904 // CHECK:   [[TMP12:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 905 // CHECK:   [[TMP13:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 906 // CHECK:   [[DIV6:%.*]] = sdiv <2 x i64> [[TMP12]], [[TMP13]]
 907 // CHECK:   store volatile <2 x i64> [[DIV6]], ptr @sl, align 8
 908 // CHECK:   [[TMP14:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 909 // CHECK:   [[TMP15:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 910 // CHECK:   [[DIV7:%.*]] = udiv <2 x i64> [[TMP14]], [[TMP15]]
 911 // CHECK:   store volatile <2 x i64> [[DIV7]], ptr @ul, align 8
 912 // CHECK:   [[TMP16:%.*]] = load volatile <2 x double>, ptr @fd, align 8
 913 // CHECK:   [[TMP17:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 914 // CHECK:   [[DIV8:%.*]] = fdiv <2 x double> [[TMP16]], [[TMP17]]
 915 // CHECK:   store volatile <2 x double> [[DIV8]], ptr @fd, align 8
 916 // CHECK:   ret void
 917 void test_div(void) {
 918
 919   sc = sc / sc2;
 920   uc = uc / uc2;
 921
 922   ss = ss / ss2;
 923   us = us / us2;
 924
 925   si = si / si2;
 926   ui = ui / ui2;
 927
 928   sl = sl / sl2;
 929   ul = ul / ul2;
 930
 931   fd = fd / fd2;
 932 }
 933
 934 // CHECK-LABEL: define{{.*}} void @test_div_assign() #0 {
 935 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 936 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 937 // CHECK:   [[DIV:%.*]] = sdiv <16 x i8> [[TMP1]], [[TMP0]]
 938 // CHECK:   store volatile <16 x i8> [[DIV]], ptr @sc, align 8
 939 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 940 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 941 // CHECK:   [[DIV1:%.*]] = udiv <16 x i8> [[TMP3]], [[TMP2]]
 942 // CHECK:   store volatile <16 x i8> [[DIV1]], ptr @uc, align 8
 943 // CHECK:   [[TMP4:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
 944 // CHECK:   [[TMP5:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 945 // CHECK:   [[DIV2:%.*]] = sdiv <8 x i16> [[TMP5]], [[TMP4]]
 946 // CHECK:   store volatile <8 x i16> [[DIV2]], ptr @ss, align 8
 947 // CHECK:   [[TMP6:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
 948 // CHECK:   [[TMP7:%.*]] = load volatile <8 x i16>, ptr @us, align 8
 949 // CHECK:   [[DIV3:%.*]] = udiv <8 x i16> [[TMP7]], [[TMP6]]
 950 // CHECK:   store volatile <8 x i16> [[DIV3]], ptr @us, align 8
 951 // CHECK:   [[TMP8:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
 952 // CHECK:   [[TMP9:%.*]] = load volatile <4 x i32>, ptr @si, align 8
 953 // CHECK:   [[DIV4:%.*]] = sdiv <4 x i32> [[TMP9]], [[TMP8]]
 954 // CHECK:   store volatile <4 x i32> [[DIV4]], ptr @si, align 8
 955 // CHECK:   [[TMP10:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
 956 // CHECK:   [[TMP11:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
 957 // CHECK:   [[DIV5:%.*]] = udiv <4 x i32> [[TMP11]], [[TMP10]]
 958 // CHECK:   store volatile <4 x i32> [[DIV5]], ptr @ui, align 8
 959 // CHECK:   [[TMP12:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
 960 // CHECK:   [[TMP13:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
 961 // CHECK:   [[DIV6:%.*]] = sdiv <2 x i64> [[TMP13]], [[TMP12]]
 962 // CHECK:   store volatile <2 x i64> [[DIV6]], ptr @sl, align 8
 963 // CHECK:   [[TMP14:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
 964 // CHECK:   [[TMP15:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
 965 // CHECK:   [[DIV7:%.*]] = udiv <2 x i64> [[TMP15]], [[TMP14]]
 966 // CHECK:   store volatile <2 x i64> [[DIV7]], ptr @ul, align 8
 967 // CHECK:   [[TMP16:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
 968 // CHECK:   [[TMP17:%.*]] = load volatile <2 x double>, ptr @fd, align 8
 969 // CHECK:   [[DIV8:%.*]] = fdiv <2 x double> [[TMP17]], [[TMP16]]
 970 // CHECK:   store volatile <2 x double> [[DIV8]], ptr @fd, align 8
 971 // CHECK:   ret void
 972 void test_div_assign(void) {
 973
 974   sc /= sc2;
 975   uc /= uc2;
 976
 977   ss /= ss2;
 978   us /= us2;
 979
 980   si /= si2;
 981   ui /= ui2;
 982
 983   sl /= sl2;
 984   ul /= ul2;
 985
 986   fd /= fd2;
 987 }
 988
 989 // CHECK-LABEL: define{{.*}} void @test_rem() #0 {
 990 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
 991 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
 992 // CHECK:   [[REM:%.*]] = srem <16 x i8> [[TMP0]], [[TMP1]]
 993 // CHECK:   store volatile <16 x i8> [[REM]], ptr @sc, align 8
 994 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
 995 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
 996 // CHECK:   [[REM1:%.*]] = urem <16 x i8> [[TMP2]], [[TMP3]]
 997 // CHECK:   store volatile <16 x i8> [[REM1]], ptr @uc, align 8
 998 // CHECK:   [[TMP4:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
 999 // CHECK:   [[TMP5:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1000 // CHECK:   [[REM2:%.*]] = srem <8 x i16> [[TMP4]], [[TMP5]]
1001 // CHECK:   store volatile <8 x i16> [[REM2]], ptr @ss, align 8
1002 // CHECK:   [[TMP6:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1003 // CHECK:   [[TMP7:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1004 // CHECK:   [[REM3:%.*]] = urem <8 x i16> [[TMP6]], [[TMP7]]
1005 // CHECK:   store volatile <8 x i16> [[REM3]], ptr @us, align 8
1006 // CHECK:   [[TMP8:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1007 // CHECK:   [[TMP9:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1008 // CHECK:   [[REM4:%.*]] = srem <4 x i32> [[TMP8]], [[TMP9]]
1009 // CHECK:   store volatile <4 x i32> [[REM4]], ptr @si, align 8
1010 // CHECK:   [[TMP10:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1011 // CHECK:   [[TMP11:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1012 // CHECK:   [[REM5:%.*]] = urem <4 x i32> [[TMP10]], [[TMP11]]
1013 // CHECK:   store volatile <4 x i32> [[REM5]], ptr @ui, align 8
1014 // CHECK:   [[TMP12:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1015 // CHECK:   [[TMP13:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1016 // CHECK:   [[REM6:%.*]] = srem <2 x i64> [[TMP12]], [[TMP13]]
1017 // CHECK:   store volatile <2 x i64> [[REM6]], ptr @sl, align 8
1018 // CHECK:   [[TMP14:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1019 // CHECK:   [[TMP15:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1020 // CHECK:   [[REM7:%.*]] = urem <2 x i64> [[TMP14]], [[TMP15]]
1021 // CHECK:   store volatile <2 x i64> [[REM7]], ptr @ul, align 8
1022 // CHECK:   ret void
1023 void test_rem(void) {
1024
1025   sc = sc % sc2;
1026   uc = uc % uc2;
1027
1028   ss = ss % ss2;
1029   us = us % us2;
1030
1031   si = si % si2;
1032   ui = ui % ui2;
1033
1034   sl = sl % sl2;
1035   ul = ul % ul2;
1036 }
1037
1038 // CHECK-LABEL: define{{.*}} void @test_rem_assign() #0 {
1039 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1040 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1041 // CHECK:   [[REM:%.*]] = srem <16 x i8> [[TMP1]], [[TMP0]]
1042 // CHECK:   store volatile <16 x i8> [[REM]], ptr @sc, align 8
1043 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1044 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1045 // CHECK:   [[REM1:%.*]] = urem <16 x i8> [[TMP3]], [[TMP2]]
1046 // CHECK:   store volatile <16 x i8> [[REM1]], ptr @uc, align 8
1047 // CHECK:   [[TMP4:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1048 // CHECK:   [[TMP5:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1049 // CHECK:   [[REM2:%.*]] = srem <8 x i16> [[TMP5]], [[TMP4]]
1050 // CHECK:   store volatile <8 x i16> [[REM2]], ptr @ss, align 8
1051 // CHECK:   [[TMP6:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1052 // CHECK:   [[TMP7:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1053 // CHECK:   [[REM3:%.*]] = urem <8 x i16> [[TMP7]], [[TMP6]]
1054 // CHECK:   store volatile <8 x i16> [[REM3]], ptr @us, align 8
1055 // CHECK:   [[TMP8:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1056 // CHECK:   [[TMP9:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1057 // CHECK:   [[REM4:%.*]] = srem <4 x i32> [[TMP9]], [[TMP8]]
1058 // CHECK:   store volatile <4 x i32> [[REM4]], ptr @si, align 8
1059 // CHECK:   [[TMP10:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1060 // CHECK:   [[TMP11:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1061 // CHECK:   [[REM5:%.*]] = urem <4 x i32> [[TMP11]], [[TMP10]]
1062 // CHECK:   store volatile <4 x i32> [[REM5]], ptr @ui, align 8
1063 // CHECK:   [[TMP12:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1064 // CHECK:   [[TMP13:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1065 // CHECK:   [[REM6:%.*]] = srem <2 x i64> [[TMP13]], [[TMP12]]
1066 // CHECK:   store volatile <2 x i64> [[REM6]], ptr @sl, align 8
1067 // CHECK:   [[TMP14:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1068 // CHECK:   [[TMP15:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1069 // CHECK:   [[REM7:%.*]] = urem <2 x i64> [[TMP15]], [[TMP14]]
1070 // CHECK:   store volatile <2 x i64> [[REM7]], ptr @ul, align 8
1071 // CHECK:   ret void
1072 void test_rem_assign(void) {
1073
1074   sc %= sc2;
1075   uc %= uc2;
1076
1077   ss %= ss2;
1078   us %= us2;
1079
1080   si %= si2;
1081   ui %= ui2;
1082
1083   sl %= sl2;
1084   ul %= ul2;
1085 }
1086
1087 // CHECK-LABEL: define{{.*}} void @test_not() #0 {
1088 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1089 // CHECK:   [[NEG:%.*]] = xor <16 x i8> [[TMP0]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
1090 // CHECK:   store volatile <16 x i8> [[NEG]], ptr @sc, align 8
1091 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1092 // CHECK:   [[NEG1:%.*]] = xor <16 x i8> [[TMP1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
1093 // CHECK:   store volatile <16 x i8> [[NEG1]], ptr @uc, align 8
1094 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1095 // CHECK:   [[NEG2:%.*]] = xor <16 x i8> [[TMP2]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
1096 // CHECK:   store volatile <16 x i8> [[NEG2]], ptr @bc, align 8
1097 // CHECK:   [[TMP3:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1098 // CHECK:   [[NEG3:%.*]] = xor <8 x i16> [[TMP3]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
1099 // CHECK:   store volatile <8 x i16> [[NEG3]], ptr @ss, align 8
1100 // CHECK:   [[TMP4:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1101 // CHECK:   [[NEG4:%.*]] = xor <8 x i16> [[TMP4]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
1102 // CHECK:   store volatile <8 x i16> [[NEG4]], ptr @us, align 8
1103 // CHECK:   [[TMP5:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1104 // CHECK:   [[NEG5:%.*]] = xor <8 x i16> [[TMP5]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
1105 // CHECK:   store volatile <8 x i16> [[NEG5]], ptr @bs, align 8
1106 // CHECK:   [[TMP6:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1107 // CHECK:   [[NEG6:%.*]] = xor <4 x i32> [[TMP6]], <i32 -1, i32 -1, i32 -1, i32 -1>
1108 // CHECK:   store volatile <4 x i32> [[NEG6]], ptr @si, align 8
1109 // CHECK:   [[TMP7:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1110 // CHECK:   [[NEG7:%.*]] = xor <4 x i32> [[TMP7]], <i32 -1, i32 -1, i32 -1, i32 -1>
1111 // CHECK:   store volatile <4 x i32> [[NEG7]], ptr @ui, align 8
1112 // CHECK:   [[TMP8:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1113 // CHECK:   [[NEG8:%.*]] = xor <4 x i32> [[TMP8]], <i32 -1, i32 -1, i32 -1, i32 -1>
1114 // CHECK:   store volatile <4 x i32> [[NEG8]], ptr @bi, align 8
1115 // CHECK:   [[TMP9:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1116 // CHECK:   [[NEG9:%.*]] = xor <2 x i64> [[TMP9]], <i64 -1, i64 -1>
1117 // CHECK:   store volatile <2 x i64> [[NEG9]], ptr @sl, align 8
1118 // CHECK:   [[TMP10:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1119 // CHECK:   [[NEG10:%.*]] = xor <2 x i64> [[TMP10]], <i64 -1, i64 -1>
1120 // CHECK:   store volatile <2 x i64> [[NEG10]], ptr @ul, align 8
1121 // CHECK:   [[TMP11:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1122 // CHECK:   [[NEG11:%.*]] = xor <2 x i64> [[TMP11]], <i64 -1, i64 -1>
1123 // CHECK:   store volatile <2 x i64> [[NEG11]], ptr @bl, align 8
1124 // CHECK:   ret void
1125 void test_not(void) {
1126
1127   sc = ~sc2;
1128   uc = ~uc2;
1129   bc = ~bc2;
1130
1131   ss = ~ss2;
1132   us = ~us2;
1133   bs = ~bs2;
1134
1135   si = ~si2;
1136   ui = ~ui2;
1137   bi = ~bi2;
1138
1139   sl = ~sl2;
1140   ul = ~ul2;
1141   bl = ~bl2;
1142 }
1143
1144 // CHECK-LABEL: define{{.*}} void @test_and() #0 {
1145 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1146 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1147 // CHECK:   [[AND:%.*]] = and <16 x i8> [[TMP0]], [[TMP1]]
1148 // CHECK:   store volatile <16 x i8> [[AND]], ptr @sc, align 8
1149 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1150 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1151 // CHECK:   [[AND1:%.*]] = and <16 x i8> [[TMP2]], [[TMP3]]
1152 // CHECK:   store volatile <16 x i8> [[AND1]], ptr @sc, align 8
1153 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1154 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1155 // CHECK:   [[AND2:%.*]] = and <16 x i8> [[TMP4]], [[TMP5]]
1156 // CHECK:   store volatile <16 x i8> [[AND2]], ptr @sc, align 8
1157 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1158 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1159 // CHECK:   [[AND3:%.*]] = and <16 x i8> [[TMP6]], [[TMP7]]
1160 // CHECK:   store volatile <16 x i8> [[AND3]], ptr @uc, align 8
1161 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1162 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1163 // CHECK:   [[AND4:%.*]] = and <16 x i8> [[TMP8]], [[TMP9]]
1164 // CHECK:   store volatile <16 x i8> [[AND4]], ptr @uc, align 8
1165 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1166 // CHECK:   [[TMP11:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1167 // CHECK:   [[AND5:%.*]] = and <16 x i8> [[TMP10]], [[TMP11]]
1168 // CHECK:   store volatile <16 x i8> [[AND5]], ptr @uc, align 8
1169 // CHECK:   [[TMP12:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1170 // CHECK:   [[TMP13:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1171 // CHECK:   [[AND6:%.*]] = and <16 x i8> [[TMP12]], [[TMP13]]
1172 // CHECK:   store volatile <16 x i8> [[AND6]], ptr @bc, align 8
1173 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1174 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1175 // CHECK:   [[AND7:%.*]] = and <8 x i16> [[TMP14]], [[TMP15]]
1176 // CHECK:   store volatile <8 x i16> [[AND7]], ptr @ss, align 8
1177 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1178 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1179 // CHECK:   [[AND8:%.*]] = and <8 x i16> [[TMP16]], [[TMP17]]
1180 // CHECK:   store volatile <8 x i16> [[AND8]], ptr @ss, align 8
1181 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1182 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1183 // CHECK:   [[AND9:%.*]] = and <8 x i16> [[TMP18]], [[TMP19]]
1184 // CHECK:   store volatile <8 x i16> [[AND9]], ptr @ss, align 8
1185 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1186 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1187 // CHECK:   [[AND10:%.*]] = and <8 x i16> [[TMP20]], [[TMP21]]
1188 // CHECK:   store volatile <8 x i16> [[AND10]], ptr @us, align 8
1189 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1190 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1191 // CHECK:   [[AND11:%.*]] = and <8 x i16> [[TMP22]], [[TMP23]]
1192 // CHECK:   store volatile <8 x i16> [[AND11]], ptr @us, align 8
1193 // CHECK:   [[TMP24:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1194 // CHECK:   [[TMP25:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1195 // CHECK:   [[AND12:%.*]] = and <8 x i16> [[TMP24]], [[TMP25]]
1196 // CHECK:   store volatile <8 x i16> [[AND12]], ptr @us, align 8
1197 // CHECK:   [[TMP26:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1198 // CHECK:   [[TMP27:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1199 // CHECK:   [[AND13:%.*]] = and <8 x i16> [[TMP26]], [[TMP27]]
1200 // CHECK:   store volatile <8 x i16> [[AND13]], ptr @bs, align 8
1201 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1202 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1203 // CHECK:   [[AND14:%.*]] = and <4 x i32> [[TMP28]], [[TMP29]]
1204 // CHECK:   store volatile <4 x i32> [[AND14]], ptr @si, align 8
1205 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1206 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1207 // CHECK:   [[AND15:%.*]] = and <4 x i32> [[TMP30]], [[TMP31]]
1208 // CHECK:   store volatile <4 x i32> [[AND15]], ptr @si, align 8
1209 // CHECK:   [[TMP32:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1210 // CHECK:   [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1211 // CHECK:   [[AND16:%.*]] = and <4 x i32> [[TMP32]], [[TMP33]]
1212 // CHECK:   store volatile <4 x i32> [[AND16]], ptr @si, align 8
1213 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1214 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1215 // CHECK:   [[AND17:%.*]] = and <4 x i32> [[TMP34]], [[TMP35]]
1216 // CHECK:   store volatile <4 x i32> [[AND17]], ptr @ui, align 8
1217 // CHECK:   [[TMP36:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1218 // CHECK:   [[TMP37:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1219 // CHECK:   [[AND18:%.*]] = and <4 x i32> [[TMP36]], [[TMP37]]
1220 // CHECK:   store volatile <4 x i32> [[AND18]], ptr @ui, align 8
1221 // CHECK:   [[TMP38:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1222 // CHECK:   [[TMP39:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1223 // CHECK:   [[AND19:%.*]] = and <4 x i32> [[TMP38]], [[TMP39]]
1224 // CHECK:   store volatile <4 x i32> [[AND19]], ptr @ui, align 8
1225 // CHECK:   [[TMP40:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1226 // CHECK:   [[TMP41:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1227 // CHECK:   [[AND20:%.*]] = and <4 x i32> [[TMP40]], [[TMP41]]
1228 // CHECK:   store volatile <4 x i32> [[AND20]], ptr @bi, align 8
1229 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1230 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1231 // CHECK:   [[AND21:%.*]] = and <2 x i64> [[TMP42]], [[TMP43]]
1232 // CHECK:   store volatile <2 x i64> [[AND21]], ptr @sl, align 8
1233 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1234 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1235 // CHECK:   [[AND22:%.*]] = and <2 x i64> [[TMP44]], [[TMP45]]
1236 // CHECK:   store volatile <2 x i64> [[AND22]], ptr @sl, align 8
1237 // CHECK:   [[TMP46:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1238 // CHECK:   [[TMP47:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1239 // CHECK:   [[AND23:%.*]] = and <2 x i64> [[TMP46]], [[TMP47]]
1240 // CHECK:   store volatile <2 x i64> [[AND23]], ptr @sl, align 8
1241 // CHECK:   [[TMP48:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1242 // CHECK:   [[TMP49:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1243 // CHECK:   [[AND24:%.*]] = and <2 x i64> [[TMP48]], [[TMP49]]
1244 // CHECK:   store volatile <2 x i64> [[AND24]], ptr @ul, align 8
1245 // CHECK:   [[TMP50:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1246 // CHECK:   [[TMP51:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1247 // CHECK:   [[AND25:%.*]] = and <2 x i64> [[TMP50]], [[TMP51]]
1248 // CHECK:   store volatile <2 x i64> [[AND25]], ptr @ul, align 8
1249 // CHECK:   [[TMP52:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1250 // CHECK:   [[TMP53:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1251 // CHECK:   [[AND26:%.*]] = and <2 x i64> [[TMP52]], [[TMP53]]
1252 // CHECK:   store volatile <2 x i64> [[AND26]], ptr @ul, align 8
1253 // CHECK:   [[TMP54:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1254 // CHECK:   [[TMP55:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1255 // CHECK:   [[AND27:%.*]] = and <2 x i64> [[TMP54]], [[TMP55]]
1256 // CHECK:   store volatile <2 x i64> [[AND27]], ptr @bl, align 8
1257 // CHECK:   ret void
1258 void test_and(void) {
1259
1260   sc = sc & sc2;
1261   sc = sc & bc2;
1262   sc = bc & sc2;
1263   uc = uc & uc2;
1264   uc = uc & bc2;
1265   uc = bc & uc2;
1266   bc = bc & bc2;
1267
1268   ss = ss & ss2;
1269   ss = ss & bs2;
1270   ss = bs & ss2;
1271   us = us & us2;
1272   us = us & bs2;
1273   us = bs & us2;
1274   bs = bs & bs2;
1275
1276   si = si & si2;
1277   si = si & bi2;
1278   si = bi & si2;
1279   ui = ui & ui2;
1280   ui = ui & bi2;
1281   ui = bi & ui2;
1282   bi = bi & bi2;
1283
1284   sl = sl & sl2;
1285   sl = sl & bl2;
1286   sl = bl & sl2;
1287   ul = ul & ul2;
1288   ul = ul & bl2;
1289   ul = bl & ul2;
1290   bl = bl & bl2;
1291 }
1292
1293 // CHECK-LABEL: define{{.*}} void @test_and_assign() #0 {
1294 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1295 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1296 // CHECK:   [[AND:%.*]] = and <16 x i8> [[TMP1]], [[TMP0]]
1297 // CHECK:   store volatile <16 x i8> [[AND]], ptr @sc, align 8
1298 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1299 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1300 // CHECK:   [[AND1:%.*]] = and <16 x i8> [[TMP3]], [[TMP2]]
1301 // CHECK:   store volatile <16 x i8> [[AND1]], ptr @sc, align 8
1302 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1303 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1304 // CHECK:   [[AND2:%.*]] = and <16 x i8> [[TMP5]], [[TMP4]]
1305 // CHECK:   store volatile <16 x i8> [[AND2]], ptr @uc, align 8
1306 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1307 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1308 // CHECK:   [[AND3:%.*]] = and <16 x i8> [[TMP7]], [[TMP6]]
1309 // CHECK:   store volatile <16 x i8> [[AND3]], ptr @uc, align 8
1310 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1311 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1312 // CHECK:   [[AND4:%.*]] = and <16 x i8> [[TMP9]], [[TMP8]]
1313 // CHECK:   store volatile <16 x i8> [[AND4]], ptr @bc, align 8
1314 // CHECK:   [[TMP10:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1315 // CHECK:   [[TMP11:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1316 // CHECK:   [[AND5:%.*]] = and <8 x i16> [[TMP11]], [[TMP10]]
1317 // CHECK:   store volatile <8 x i16> [[AND5]], ptr @ss, align 8
1318 // CHECK:   [[TMP12:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1319 // CHECK:   [[TMP13:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1320 // CHECK:   [[AND6:%.*]] = and <8 x i16> [[TMP13]], [[TMP12]]
1321 // CHECK:   store volatile <8 x i16> [[AND6]], ptr @ss, align 8
1322 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1323 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1324 // CHECK:   [[AND7:%.*]] = and <8 x i16> [[TMP15]], [[TMP14]]
1325 // CHECK:   store volatile <8 x i16> [[AND7]], ptr @us, align 8
1326 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1327 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1328 // CHECK:   [[AND8:%.*]] = and <8 x i16> [[TMP17]], [[TMP16]]
1329 // CHECK:   store volatile <8 x i16> [[AND8]], ptr @us, align 8
1330 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1331 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1332 // CHECK:   [[AND9:%.*]] = and <8 x i16> [[TMP19]], [[TMP18]]
1333 // CHECK:   store volatile <8 x i16> [[AND9]], ptr @bs, align 8
1334 // CHECK:   [[TMP20:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1335 // CHECK:   [[TMP21:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1336 // CHECK:   [[AND10:%.*]] = and <4 x i32> [[TMP21]], [[TMP20]]
1337 // CHECK:   store volatile <4 x i32> [[AND10]], ptr @si, align 8
1338 // CHECK:   [[TMP22:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1339 // CHECK:   [[TMP23:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1340 // CHECK:   [[AND11:%.*]] = and <4 x i32> [[TMP23]], [[TMP22]]
1341 // CHECK:   store volatile <4 x i32> [[AND11]], ptr @si, align 8
1342 // CHECK:   [[TMP24:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1343 // CHECK:   [[TMP25:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1344 // CHECK:   [[AND12:%.*]] = and <4 x i32> [[TMP25]], [[TMP24]]
1345 // CHECK:   store volatile <4 x i32> [[AND12]], ptr @ui, align 8
1346 // CHECK:   [[TMP26:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1347 // CHECK:   [[TMP27:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1348 // CHECK:   [[AND13:%.*]] = and <4 x i32> [[TMP27]], [[TMP26]]
1349 // CHECK:   store volatile <4 x i32> [[AND13]], ptr @ui, align 8
1350 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1351 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1352 // CHECK:   [[AND14:%.*]] = and <4 x i32> [[TMP29]], [[TMP28]]
1353 // CHECK:   store volatile <4 x i32> [[AND14]], ptr @bi, align 8
1354 // CHECK:   [[TMP30:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1355 // CHECK:   [[TMP31:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1356 // CHECK:   [[AND15:%.*]] = and <2 x i64> [[TMP31]], [[TMP30]]
1357 // CHECK:   store volatile <2 x i64> [[AND15]], ptr @sl, align 8
1358 // CHECK:   [[TMP32:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1359 // CHECK:   [[TMP33:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1360 // CHECK:   [[AND16:%.*]] = and <2 x i64> [[TMP33]], [[TMP32]]
1361 // CHECK:   store volatile <2 x i64> [[AND16]], ptr @sl, align 8
1362 // CHECK:   [[TMP34:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1363 // CHECK:   [[TMP35:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1364 // CHECK:   [[AND17:%.*]] = and <2 x i64> [[TMP35]], [[TMP34]]
1365 // CHECK:   store volatile <2 x i64> [[AND17]], ptr @ul, align 8
1366 // CHECK:   [[TMP36:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1367 // CHECK:   [[TMP37:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1368 // CHECK:   [[AND18:%.*]] = and <2 x i64> [[TMP37]], [[TMP36]]
1369 // CHECK:   store volatile <2 x i64> [[AND18]], ptr @ul, align 8
1370 // CHECK:   [[TMP38:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1371 // CHECK:   [[TMP39:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1372 // CHECK:   [[AND19:%.*]] = and <2 x i64> [[TMP39]], [[TMP38]]
1373 // CHECK:   store volatile <2 x i64> [[AND19]], ptr @bl, align 8
1374 // CHECK:   ret void
1375 void test_and_assign(void) {
1376
1377   sc &= sc2;
1378   sc &= bc2;
1379   uc &= uc2;
1380   uc &= bc2;
1381   bc &= bc2;
1382
1383   ss &= ss2;
1384   ss &= bs2;
1385   us &= us2;
1386   us &= bs2;
1387   bs &= bs2;
1388
1389   si &= si2;
1390   si &= bi2;
1391   ui &= ui2;
1392   ui &= bi2;
1393   bi &= bi2;
1394
1395   sl &= sl2;
1396   sl &= bl2;
1397   ul &= ul2;
1398   ul &= bl2;
1399   bl &= bl2;
1400 }
1401
1402 // CHECK-LABEL: define{{.*}} void @test_or() #0 {
1403 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1404 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1405 // CHECK:   [[OR:%.*]] = or <16 x i8> [[TMP0]], [[TMP1]]
1406 // CHECK:   store volatile <16 x i8> [[OR]], ptr @sc, align 8
1407 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1408 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1409 // CHECK:   [[OR1:%.*]] = or <16 x i8> [[TMP2]], [[TMP3]]
1410 // CHECK:   store volatile <16 x i8> [[OR1]], ptr @sc, align 8
1411 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1412 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1413 // CHECK:   [[OR2:%.*]] = or <16 x i8> [[TMP4]], [[TMP5]]
1414 // CHECK:   store volatile <16 x i8> [[OR2]], ptr @sc, align 8
1415 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1416 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1417 // CHECK:   [[OR3:%.*]] = or <16 x i8> [[TMP6]], [[TMP7]]
1418 // CHECK:   store volatile <16 x i8> [[OR3]], ptr @uc, align 8
1419 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1420 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1421 // CHECK:   [[OR4:%.*]] = or <16 x i8> [[TMP8]], [[TMP9]]
1422 // CHECK:   store volatile <16 x i8> [[OR4]], ptr @uc, align 8
1423 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1424 // CHECK:   [[TMP11:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1425 // CHECK:   [[OR5:%.*]] = or <16 x i8> [[TMP10]], [[TMP11]]
1426 // CHECK:   store volatile <16 x i8> [[OR5]], ptr @uc, align 8
1427 // CHECK:   [[TMP12:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1428 // CHECK:   [[TMP13:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1429 // CHECK:   [[OR6:%.*]] = or <16 x i8> [[TMP12]], [[TMP13]]
1430 // CHECK:   store volatile <16 x i8> [[OR6]], ptr @bc, align 8
1431 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1432 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1433 // CHECK:   [[OR7:%.*]] = or <8 x i16> [[TMP14]], [[TMP15]]
1434 // CHECK:   store volatile <8 x i16> [[OR7]], ptr @ss, align 8
1435 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1436 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1437 // CHECK:   [[OR8:%.*]] = or <8 x i16> [[TMP16]], [[TMP17]]
1438 // CHECK:   store volatile <8 x i16> [[OR8]], ptr @ss, align 8
1439 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1440 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1441 // CHECK:   [[OR9:%.*]] = or <8 x i16> [[TMP18]], [[TMP19]]
1442 // CHECK:   store volatile <8 x i16> [[OR9]], ptr @ss, align 8
1443 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1444 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1445 // CHECK:   [[OR10:%.*]] = or <8 x i16> [[TMP20]], [[TMP21]]
1446 // CHECK:   store volatile <8 x i16> [[OR10]], ptr @us, align 8
1447 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1448 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1449 // CHECK:   [[OR11:%.*]] = or <8 x i16> [[TMP22]], [[TMP23]]
1450 // CHECK:   store volatile <8 x i16> [[OR11]], ptr @us, align 8
1451 // CHECK:   [[TMP24:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1452 // CHECK:   [[TMP25:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1453 // CHECK:   [[OR12:%.*]] = or <8 x i16> [[TMP24]], [[TMP25]]
1454 // CHECK:   store volatile <8 x i16> [[OR12]], ptr @us, align 8
1455 // CHECK:   [[TMP26:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1456 // CHECK:   [[TMP27:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1457 // CHECK:   [[OR13:%.*]] = or <8 x i16> [[TMP26]], [[TMP27]]
1458 // CHECK:   store volatile <8 x i16> [[OR13]], ptr @bs, align 8
1459 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1460 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1461 // CHECK:   [[OR14:%.*]] = or <4 x i32> [[TMP28]], [[TMP29]]
1462 // CHECK:   store volatile <4 x i32> [[OR14]], ptr @si, align 8
1463 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1464 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1465 // CHECK:   [[OR15:%.*]] = or <4 x i32> [[TMP30]], [[TMP31]]
1466 // CHECK:   store volatile <4 x i32> [[OR15]], ptr @si, align 8
1467 // CHECK:   [[TMP32:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1468 // CHECK:   [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1469 // CHECK:   [[OR16:%.*]] = or <4 x i32> [[TMP32]], [[TMP33]]
1470 // CHECK:   store volatile <4 x i32> [[OR16]], ptr @si, align 8
1471 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1472 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1473 // CHECK:   [[OR17:%.*]] = or <4 x i32> [[TMP34]], [[TMP35]]
1474 // CHECK:   store volatile <4 x i32> [[OR17]], ptr @ui, align 8
1475 // CHECK:   [[TMP36:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1476 // CHECK:   [[TMP37:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1477 // CHECK:   [[OR18:%.*]] = or <4 x i32> [[TMP36]], [[TMP37]]
1478 // CHECK:   store volatile <4 x i32> [[OR18]], ptr @ui, align 8
1479 // CHECK:   [[TMP38:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1480 // CHECK:   [[TMP39:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1481 // CHECK:   [[OR19:%.*]] = or <4 x i32> [[TMP38]], [[TMP39]]
1482 // CHECK:   store volatile <4 x i32> [[OR19]], ptr @ui, align 8
1483 // CHECK:   [[TMP40:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1484 // CHECK:   [[TMP41:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1485 // CHECK:   [[OR20:%.*]] = or <4 x i32> [[TMP40]], [[TMP41]]
1486 // CHECK:   store volatile <4 x i32> [[OR20]], ptr @bi, align 8
1487 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1488 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1489 // CHECK:   [[OR21:%.*]] = or <2 x i64> [[TMP42]], [[TMP43]]
1490 // CHECK:   store volatile <2 x i64> [[OR21]], ptr @sl, align 8
1491 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1492 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1493 // CHECK:   [[OR22:%.*]] = or <2 x i64> [[TMP44]], [[TMP45]]
1494 // CHECK:   store volatile <2 x i64> [[OR22]], ptr @sl, align 8
1495 // CHECK:   [[TMP46:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1496 // CHECK:   [[TMP47:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1497 // CHECK:   [[OR23:%.*]] = or <2 x i64> [[TMP46]], [[TMP47]]
1498 // CHECK:   store volatile <2 x i64> [[OR23]], ptr @sl, align 8
1499 // CHECK:   [[TMP48:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1500 // CHECK:   [[TMP49:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1501 // CHECK:   [[OR24:%.*]] = or <2 x i64> [[TMP48]], [[TMP49]]
1502 // CHECK:   store volatile <2 x i64> [[OR24]], ptr @ul, align 8
1503 // CHECK:   [[TMP50:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1504 // CHECK:   [[TMP51:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1505 // CHECK:   [[OR25:%.*]] = or <2 x i64> [[TMP50]], [[TMP51]]
1506 // CHECK:   store volatile <2 x i64> [[OR25]], ptr @ul, align 8
1507 // CHECK:   [[TMP52:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1508 // CHECK:   [[TMP53:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1509 // CHECK:   [[OR26:%.*]] = or <2 x i64> [[TMP52]], [[TMP53]]
1510 // CHECK:   store volatile <2 x i64> [[OR26]], ptr @ul, align 8
1511 // CHECK:   [[TMP54:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1512 // CHECK:   [[TMP55:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1513 // CHECK:   [[OR27:%.*]] = or <2 x i64> [[TMP54]], [[TMP55]]
1514 // CHECK:   store volatile <2 x i64> [[OR27]], ptr @bl, align 8
1515 // CHECK:   ret void
1516 void test_or(void) {
1517
1518   sc = sc | sc2;
1519   sc = sc | bc2;
1520   sc = bc | sc2;
1521   uc = uc | uc2;
1522   uc = uc | bc2;
1523   uc = bc | uc2;
1524   bc = bc | bc2;
1525
1526   ss = ss | ss2;
1527   ss = ss | bs2;
1528   ss = bs | ss2;
1529   us = us | us2;
1530   us = us | bs2;
1531   us = bs | us2;
1532   bs = bs | bs2;
1533
1534   si = si | si2;
1535   si = si | bi2;
1536   si = bi | si2;
1537   ui = ui | ui2;
1538   ui = ui | bi2;
1539   ui = bi | ui2;
1540   bi = bi | bi2;
1541
1542   sl = sl | sl2;
1543   sl = sl | bl2;
1544   sl = bl | sl2;
1545   ul = ul | ul2;
1546   ul = ul | bl2;
1547   ul = bl | ul2;
1548   bl = bl | bl2;
1549 }
1550
1551 // CHECK-LABEL: define{{.*}} void @test_or_assign() #0 {
1552 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1553 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1554 // CHECK:   [[OR:%.*]] = or <16 x i8> [[TMP1]], [[TMP0]]
1555 // CHECK:   store volatile <16 x i8> [[OR]], ptr @sc, align 8
1556 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1557 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1558 // CHECK:   [[OR1:%.*]] = or <16 x i8> [[TMP3]], [[TMP2]]
1559 // CHECK:   store volatile <16 x i8> [[OR1]], ptr @sc, align 8
1560 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1561 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1562 // CHECK:   [[OR2:%.*]] = or <16 x i8> [[TMP5]], [[TMP4]]
1563 // CHECK:   store volatile <16 x i8> [[OR2]], ptr @uc, align 8
1564 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1565 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1566 // CHECK:   [[OR3:%.*]] = or <16 x i8> [[TMP7]], [[TMP6]]
1567 // CHECK:   store volatile <16 x i8> [[OR3]], ptr @uc, align 8
1568 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1569 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1570 // CHECK:   [[OR4:%.*]] = or <16 x i8> [[TMP9]], [[TMP8]]
1571 // CHECK:   store volatile <16 x i8> [[OR4]], ptr @bc, align 8
1572 // CHECK:   [[TMP10:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1573 // CHECK:   [[TMP11:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1574 // CHECK:   [[OR5:%.*]] = or <8 x i16> [[TMP11]], [[TMP10]]
1575 // CHECK:   store volatile <8 x i16> [[OR5]], ptr @ss, align 8
1576 // CHECK:   [[TMP12:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1577 // CHECK:   [[TMP13:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1578 // CHECK:   [[OR6:%.*]] = or <8 x i16> [[TMP13]], [[TMP12]]
1579 // CHECK:   store volatile <8 x i16> [[OR6]], ptr @ss, align 8
1580 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1581 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1582 // CHECK:   [[OR7:%.*]] = or <8 x i16> [[TMP15]], [[TMP14]]
1583 // CHECK:   store volatile <8 x i16> [[OR7]], ptr @us, align 8
1584 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1585 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1586 // CHECK:   [[OR8:%.*]] = or <8 x i16> [[TMP17]], [[TMP16]]
1587 // CHECK:   store volatile <8 x i16> [[OR8]], ptr @us, align 8
1588 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1589 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1590 // CHECK:   [[OR9:%.*]] = or <8 x i16> [[TMP19]], [[TMP18]]
1591 // CHECK:   store volatile <8 x i16> [[OR9]], ptr @bs, align 8
1592 // CHECK:   [[TMP20:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1593 // CHECK:   [[TMP21:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1594 // CHECK:   [[OR10:%.*]] = or <4 x i32> [[TMP21]], [[TMP20]]
1595 // CHECK:   store volatile <4 x i32> [[OR10]], ptr @si, align 8
1596 // CHECK:   [[TMP22:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1597 // CHECK:   [[TMP23:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1598 // CHECK:   [[OR11:%.*]] = or <4 x i32> [[TMP23]], [[TMP22]]
1599 // CHECK:   store volatile <4 x i32> [[OR11]], ptr @si, align 8
1600 // CHECK:   [[TMP24:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1601 // CHECK:   [[TMP25:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1602 // CHECK:   [[OR12:%.*]] = or <4 x i32> [[TMP25]], [[TMP24]]
1603 // CHECK:   store volatile <4 x i32> [[OR12]], ptr @ui, align 8
1604 // CHECK:   [[TMP26:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1605 // CHECK:   [[TMP27:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1606 // CHECK:   [[OR13:%.*]] = or <4 x i32> [[TMP27]], [[TMP26]]
1607 // CHECK:   store volatile <4 x i32> [[OR13]], ptr @ui, align 8
1608 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1609 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1610 // CHECK:   [[OR14:%.*]] = or <4 x i32> [[TMP29]], [[TMP28]]
1611 // CHECK:   store volatile <4 x i32> [[OR14]], ptr @bi, align 8
1612 // CHECK:   [[TMP30:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1613 // CHECK:   [[TMP31:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1614 // CHECK:   [[OR15:%.*]] = or <2 x i64> [[TMP31]], [[TMP30]]
1615 // CHECK:   store volatile <2 x i64> [[OR15]], ptr @sl, align 8
1616 // CHECK:   [[TMP32:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1617 // CHECK:   [[TMP33:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1618 // CHECK:   [[OR16:%.*]] = or <2 x i64> [[TMP33]], [[TMP32]]
1619 // CHECK:   store volatile <2 x i64> [[OR16]], ptr @sl, align 8
1620 // CHECK:   [[TMP34:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1621 // CHECK:   [[TMP35:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1622 // CHECK:   [[OR17:%.*]] = or <2 x i64> [[TMP35]], [[TMP34]]
1623 // CHECK:   store volatile <2 x i64> [[OR17]], ptr @ul, align 8
1624 // CHECK:   [[TMP36:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1625 // CHECK:   [[TMP37:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1626 // CHECK:   [[OR18:%.*]] = or <2 x i64> [[TMP37]], [[TMP36]]
1627 // CHECK:   store volatile <2 x i64> [[OR18]], ptr @ul, align 8
1628 // CHECK:   [[TMP38:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1629 // CHECK:   [[TMP39:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1630 // CHECK:   [[OR19:%.*]] = or <2 x i64> [[TMP39]], [[TMP38]]
1631 // CHECK:   store volatile <2 x i64> [[OR19]], ptr @bl, align 8
1632 // CHECK:   ret void
1633 void test_or_assign(void) {
1634
1635   sc |= sc2;
1636   sc |= bc2;
1637   uc |= uc2;
1638   uc |= bc2;
1639   bc |= bc2;
1640
1641   ss |= ss2;
1642   ss |= bs2;
1643   us |= us2;
1644   us |= bs2;
1645   bs |= bs2;
1646
1647   si |= si2;
1648   si |= bi2;
1649   ui |= ui2;
1650   ui |= bi2;
1651   bi |= bi2;
1652
1653   sl |= sl2;
1654   sl |= bl2;
1655   ul |= ul2;
1656   ul |= bl2;
1657   bl |= bl2;
1658 }
1659
1660 // CHECK-LABEL: define{{.*}} void @test_xor() #0 {
1661 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1662 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1663 // CHECK:   [[XOR:%.*]] = xor <16 x i8> [[TMP0]], [[TMP1]]
1664 // CHECK:   store volatile <16 x i8> [[XOR]], ptr @sc, align 8
1665 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1666 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1667 // CHECK:   [[XOR1:%.*]] = xor <16 x i8> [[TMP2]], [[TMP3]]
1668 // CHECK:   store volatile <16 x i8> [[XOR1]], ptr @sc, align 8
1669 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1670 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1671 // CHECK:   [[XOR2:%.*]] = xor <16 x i8> [[TMP4]], [[TMP5]]
1672 // CHECK:   store volatile <16 x i8> [[XOR2]], ptr @sc, align 8
1673 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1674 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1675 // CHECK:   [[XOR3:%.*]] = xor <16 x i8> [[TMP6]], [[TMP7]]
1676 // CHECK:   store volatile <16 x i8> [[XOR3]], ptr @uc, align 8
1677 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1678 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1679 // CHECK:   [[XOR4:%.*]] = xor <16 x i8> [[TMP8]], [[TMP9]]
1680 // CHECK:   store volatile <16 x i8> [[XOR4]], ptr @uc, align 8
1681 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1682 // CHECK:   [[TMP11:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1683 // CHECK:   [[XOR5:%.*]] = xor <16 x i8> [[TMP10]], [[TMP11]]
1684 // CHECK:   store volatile <16 x i8> [[XOR5]], ptr @uc, align 8
1685 // CHECK:   [[TMP12:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1686 // CHECK:   [[TMP13:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1687 // CHECK:   [[XOR6:%.*]] = xor <16 x i8> [[TMP12]], [[TMP13]]
1688 // CHECK:   store volatile <16 x i8> [[XOR6]], ptr @bc, align 8
1689 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1690 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1691 // CHECK:   [[XOR7:%.*]] = xor <8 x i16> [[TMP14]], [[TMP15]]
1692 // CHECK:   store volatile <8 x i16> [[XOR7]], ptr @ss, align 8
1693 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1694 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1695 // CHECK:   [[XOR8:%.*]] = xor <8 x i16> [[TMP16]], [[TMP17]]
1696 // CHECK:   store volatile <8 x i16> [[XOR8]], ptr @ss, align 8
1697 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1698 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1699 // CHECK:   [[XOR9:%.*]] = xor <8 x i16> [[TMP18]], [[TMP19]]
1700 // CHECK:   store volatile <8 x i16> [[XOR9]], ptr @ss, align 8
1701 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1702 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1703 // CHECK:   [[XOR10:%.*]] = xor <8 x i16> [[TMP20]], [[TMP21]]
1704 // CHECK:   store volatile <8 x i16> [[XOR10]], ptr @us, align 8
1705 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1706 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1707 // CHECK:   [[XOR11:%.*]] = xor <8 x i16> [[TMP22]], [[TMP23]]
1708 // CHECK:   store volatile <8 x i16> [[XOR11]], ptr @us, align 8
1709 // CHECK:   [[TMP24:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1710 // CHECK:   [[TMP25:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1711 // CHECK:   [[XOR12:%.*]] = xor <8 x i16> [[TMP24]], [[TMP25]]
1712 // CHECK:   store volatile <8 x i16> [[XOR12]], ptr @us, align 8
1713 // CHECK:   [[TMP26:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1714 // CHECK:   [[TMP27:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1715 // CHECK:   [[XOR13:%.*]] = xor <8 x i16> [[TMP26]], [[TMP27]]
1716 // CHECK:   store volatile <8 x i16> [[XOR13]], ptr @bs, align 8
1717 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1718 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1719 // CHECK:   [[XOR14:%.*]] = xor <4 x i32> [[TMP28]], [[TMP29]]
1720 // CHECK:   store volatile <4 x i32> [[XOR14]], ptr @si, align 8
1721 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1722 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1723 // CHECK:   [[XOR15:%.*]] = xor <4 x i32> [[TMP30]], [[TMP31]]
1724 // CHECK:   store volatile <4 x i32> [[XOR15]], ptr @si, align 8
1725 // CHECK:   [[TMP32:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1726 // CHECK:   [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1727 // CHECK:   [[XOR16:%.*]] = xor <4 x i32> [[TMP32]], [[TMP33]]
1728 // CHECK:   store volatile <4 x i32> [[XOR16]], ptr @si, align 8
1729 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1730 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1731 // CHECK:   [[XOR17:%.*]] = xor <4 x i32> [[TMP34]], [[TMP35]]
1732 // CHECK:   store volatile <4 x i32> [[XOR17]], ptr @ui, align 8
1733 // CHECK:   [[TMP36:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1734 // CHECK:   [[TMP37:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1735 // CHECK:   [[XOR18:%.*]] = xor <4 x i32> [[TMP36]], [[TMP37]]
1736 // CHECK:   store volatile <4 x i32> [[XOR18]], ptr @ui, align 8
1737 // CHECK:   [[TMP38:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1738 // CHECK:   [[TMP39:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1739 // CHECK:   [[XOR19:%.*]] = xor <4 x i32> [[TMP38]], [[TMP39]]
1740 // CHECK:   store volatile <4 x i32> [[XOR19]], ptr @ui, align 8
1741 // CHECK:   [[TMP40:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1742 // CHECK:   [[TMP41:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1743 // CHECK:   [[XOR20:%.*]] = xor <4 x i32> [[TMP40]], [[TMP41]]
1744 // CHECK:   store volatile <4 x i32> [[XOR20]], ptr @bi, align 8
1745 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1746 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1747 // CHECK:   [[XOR21:%.*]] = xor <2 x i64> [[TMP42]], [[TMP43]]
1748 // CHECK:   store volatile <2 x i64> [[XOR21]], ptr @sl, align 8
1749 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1750 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1751 // CHECK:   [[XOR22:%.*]] = xor <2 x i64> [[TMP44]], [[TMP45]]
1752 // CHECK:   store volatile <2 x i64> [[XOR22]], ptr @sl, align 8
1753 // CHECK:   [[TMP46:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1754 // CHECK:   [[TMP47:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1755 // CHECK:   [[XOR23:%.*]] = xor <2 x i64> [[TMP46]], [[TMP47]]
1756 // CHECK:   store volatile <2 x i64> [[XOR23]], ptr @sl, align 8
1757 // CHECK:   [[TMP48:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1758 // CHECK:   [[TMP49:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1759 // CHECK:   [[XOR24:%.*]] = xor <2 x i64> [[TMP48]], [[TMP49]]
1760 // CHECK:   store volatile <2 x i64> [[XOR24]], ptr @ul, align 8
1761 // CHECK:   [[TMP50:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1762 // CHECK:   [[TMP51:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1763 // CHECK:   [[XOR25:%.*]] = xor <2 x i64> [[TMP50]], [[TMP51]]
1764 // CHECK:   store volatile <2 x i64> [[XOR25]], ptr @ul, align 8
1765 // CHECK:   [[TMP52:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1766 // CHECK:   [[TMP53:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1767 // CHECK:   [[XOR26:%.*]] = xor <2 x i64> [[TMP52]], [[TMP53]]
1768 // CHECK:   store volatile <2 x i64> [[XOR26]], ptr @ul, align 8
1769 // CHECK:   [[TMP54:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1770 // CHECK:   [[TMP55:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1771 // CHECK:   [[XOR27:%.*]] = xor <2 x i64> [[TMP54]], [[TMP55]]
1772 // CHECK:   store volatile <2 x i64> [[XOR27]], ptr @bl, align 8
1773 // CHECK:   ret void
1774 void test_xor(void) {
1775
1776   sc = sc ^ sc2;
1777   sc = sc ^ bc2;
1778   sc = bc ^ sc2;
1779   uc = uc ^ uc2;
1780   uc = uc ^ bc2;
1781   uc = bc ^ uc2;
1782   bc = bc ^ bc2;
1783
1784   ss = ss ^ ss2;
1785   ss = ss ^ bs2;
1786   ss = bs ^ ss2;
1787   us = us ^ us2;
1788   us = us ^ bs2;
1789   us = bs ^ us2;
1790   bs = bs ^ bs2;
1791
1792   si = si ^ si2;
1793   si = si ^ bi2;
1794   si = bi ^ si2;
1795   ui = ui ^ ui2;
1796   ui = ui ^ bi2;
1797   ui = bi ^ ui2;
1798   bi = bi ^ bi2;
1799
1800   sl = sl ^ sl2;
1801   sl = sl ^ bl2;
1802   sl = bl ^ sl2;
1803   ul = ul ^ ul2;
1804   ul = ul ^ bl2;
1805   ul = bl ^ ul2;
1806   bl = bl ^ bl2;
1807 }
1808
1809 // CHECK-LABEL: define{{.*}} void @test_xor_assign() #0 {
1810 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1811 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1812 // CHECK:   [[XOR:%.*]] = xor <16 x i8> [[TMP1]], [[TMP0]]
1813 // CHECK:   store volatile <16 x i8> [[XOR]], ptr @sc, align 8
1814 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1815 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1816 // CHECK:   [[XOR1:%.*]] = xor <16 x i8> [[TMP3]], [[TMP2]]
1817 // CHECK:   store volatile <16 x i8> [[XOR1]], ptr @sc, align 8
1818 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1819 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1820 // CHECK:   [[XOR2:%.*]] = xor <16 x i8> [[TMP5]], [[TMP4]]
1821 // CHECK:   store volatile <16 x i8> [[XOR2]], ptr @uc, align 8
1822 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1823 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1824 // CHECK:   [[XOR3:%.*]] = xor <16 x i8> [[TMP7]], [[TMP6]]
1825 // CHECK:   store volatile <16 x i8> [[XOR3]], ptr @uc, align 8
1826 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
1827 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
1828 // CHECK:   [[XOR4:%.*]] = xor <16 x i8> [[TMP9]], [[TMP8]]
1829 // CHECK:   store volatile <16 x i8> [[XOR4]], ptr @bc, align 8
1830 // CHECK:   [[TMP10:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1831 // CHECK:   [[TMP11:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1832 // CHECK:   [[XOR5:%.*]] = xor <8 x i16> [[TMP11]], [[TMP10]]
1833 // CHECK:   store volatile <8 x i16> [[XOR5]], ptr @ss, align 8
1834 // CHECK:   [[TMP12:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1835 // CHECK:   [[TMP13:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1836 // CHECK:   [[XOR6:%.*]] = xor <8 x i16> [[TMP13]], [[TMP12]]
1837 // CHECK:   store volatile <8 x i16> [[XOR6]], ptr @ss, align 8
1838 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1839 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1840 // CHECK:   [[XOR7:%.*]] = xor <8 x i16> [[TMP15]], [[TMP14]]
1841 // CHECK:   store volatile <8 x i16> [[XOR7]], ptr @us, align 8
1842 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1843 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1844 // CHECK:   [[XOR8:%.*]] = xor <8 x i16> [[TMP17]], [[TMP16]]
1845 // CHECK:   store volatile <8 x i16> [[XOR8]], ptr @us, align 8
1846 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
1847 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
1848 // CHECK:   [[XOR9:%.*]] = xor <8 x i16> [[TMP19]], [[TMP18]]
1849 // CHECK:   store volatile <8 x i16> [[XOR9]], ptr @bs, align 8
1850 // CHECK:   [[TMP20:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1851 // CHECK:   [[TMP21:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1852 // CHECK:   [[XOR10:%.*]] = xor <4 x i32> [[TMP21]], [[TMP20]]
1853 // CHECK:   store volatile <4 x i32> [[XOR10]], ptr @si, align 8
1854 // CHECK:   [[TMP22:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1855 // CHECK:   [[TMP23:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1856 // CHECK:   [[XOR11:%.*]] = xor <4 x i32> [[TMP23]], [[TMP22]]
1857 // CHECK:   store volatile <4 x i32> [[XOR11]], ptr @si, align 8
1858 // CHECK:   [[TMP24:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1859 // CHECK:   [[TMP25:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1860 // CHECK:   [[XOR12:%.*]] = xor <4 x i32> [[TMP25]], [[TMP24]]
1861 // CHECK:   store volatile <4 x i32> [[XOR12]], ptr @ui, align 8
1862 // CHECK:   [[TMP26:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1863 // CHECK:   [[TMP27:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
1864 // CHECK:   [[XOR13:%.*]] = xor <4 x i32> [[TMP27]], [[TMP26]]
1865 // CHECK:   store volatile <4 x i32> [[XOR13]], ptr @ui, align 8
1866 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
1867 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
1868 // CHECK:   [[XOR14:%.*]] = xor <4 x i32> [[TMP29]], [[TMP28]]
1869 // CHECK:   store volatile <4 x i32> [[XOR14]], ptr @bi, align 8
1870 // CHECK:   [[TMP30:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
1871 // CHECK:   [[TMP31:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1872 // CHECK:   [[XOR15:%.*]] = xor <2 x i64> [[TMP31]], [[TMP30]]
1873 // CHECK:   store volatile <2 x i64> [[XOR15]], ptr @sl, align 8
1874 // CHECK:   [[TMP32:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1875 // CHECK:   [[TMP33:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
1876 // CHECK:   [[XOR16:%.*]] = xor <2 x i64> [[TMP33]], [[TMP32]]
1877 // CHECK:   store volatile <2 x i64> [[XOR16]], ptr @sl, align 8
1878 // CHECK:   [[TMP34:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
1879 // CHECK:   [[TMP35:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1880 // CHECK:   [[XOR17:%.*]] = xor <2 x i64> [[TMP35]], [[TMP34]]
1881 // CHECK:   store volatile <2 x i64> [[XOR17]], ptr @ul, align 8
1882 // CHECK:   [[TMP36:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1883 // CHECK:   [[TMP37:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
1884 // CHECK:   [[XOR18:%.*]] = xor <2 x i64> [[TMP37]], [[TMP36]]
1885 // CHECK:   store volatile <2 x i64> [[XOR18]], ptr @ul, align 8
1886 // CHECK:   [[TMP38:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
1887 // CHECK:   [[TMP39:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
1888 // CHECK:   [[XOR19:%.*]] = xor <2 x i64> [[TMP39]], [[TMP38]]
1889 // CHECK:   store volatile <2 x i64> [[XOR19]], ptr @bl, align 8
1890 // CHECK:   ret void
1891 void test_xor_assign(void) {
1892
1893   sc ^= sc2;
1894   sc ^= bc2;
1895   uc ^= uc2;
1896   uc ^= bc2;
1897   bc ^= bc2;
1898
1899   ss ^= ss2;
1900   ss ^= bs2;
1901   us ^= us2;
1902   us ^= bs2;
1903   bs ^= bs2;
1904
1905   si ^= si2;
1906   si ^= bi2;
1907   ui ^= ui2;
1908   ui ^= bi2;
1909   bi ^= bi2;
1910
1911   sl ^= sl2;
1912   sl ^= bl2;
1913   ul ^= ul2;
1914   ul ^= bl2;
1915   bl ^= bl2;
1916 }
1917
1918 // CHECK-LABEL: define{{.*}} void @test_sl() #0 {
1919 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1920 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1921 // CHECK:   [[SHL:%.*]] = shl <16 x i8> [[TMP0]], [[TMP1]]
1922 // CHECK:   store volatile <16 x i8> [[SHL]], ptr @sc, align 8
1923 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1924 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1925 // CHECK:   [[SHL1:%.*]] = shl <16 x i8> [[TMP2]], [[TMP3]]
1926 // CHECK:   store volatile <16 x i8> [[SHL1]], ptr @sc, align 8
1927 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1928 // CHECK:   [[TMP5:%.*]] = load volatile i32, ptr @cnt, align 4
1929 // CHECK:   [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[TMP5]], i64 0
1930 // CHECK:   [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLAT:%.*]]insert, <16 x i32> poison, <16 x i32> zeroinitializer
1931 // CHECK:   [[SH_PROM:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT]] to <16 x i8>
1932 // CHECK:   [[SHL2:%.*]] = shl <16 x i8> [[TMP4]], [[SH_PROM]]
1933 // CHECK:   store volatile <16 x i8> [[SHL2]], ptr @sc, align 8
1934 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
1935 // CHECK:   [[SHL3:%.*]] = shl <16 x i8> [[TMP6]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
1936 // CHECK:   store volatile <16 x i8> [[SHL3]], ptr @sc, align 8
1937 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1938 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1939 // CHECK:   [[SHL4:%.*]] = shl <16 x i8> [[TMP7]], [[TMP8]]
1940 // CHECK:   store volatile <16 x i8> [[SHL4]], ptr @uc, align 8
1941 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1942 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
1943 // CHECK:   [[SHL5:%.*]] = shl <16 x i8> [[TMP9]], [[TMP10]]
1944 // CHECK:   store volatile <16 x i8> [[SHL5]], ptr @uc, align 8
1945 // CHECK:   [[TMP11:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1946 // CHECK:   [[TMP12:%.*]] = load volatile i32, ptr @cnt, align 4
1947 // CHECK:   [[SPLAT_SPLATINSERT6:%.*]] = insertelement <16 x i32> poison, i32 [[TMP12]], i64 0
1948 // CHECK:   [[SPLAT_SPLAT7:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLATINSERT6]], <16 x i32> poison, <16 x i32> zeroinitializer
1949 // CHECK:   [[SH_PROM8:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT7]] to <16 x i8>
1950 // CHECK:   [[SHL9:%.*]] = shl <16 x i8> [[TMP11]], [[SH_PROM8]]
1951 // CHECK:   store volatile <16 x i8> [[SHL9]], ptr @uc, align 8
1952 // CHECK:   [[TMP13:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
1953 // CHECK:   [[SHL10:%.*]] = shl <16 x i8> [[TMP13]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
1954 // CHECK:   store volatile <16 x i8> [[SHL10]], ptr @uc, align 8
1955 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1956 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1957 // CHECK:   [[SHL11:%.*]] = shl <8 x i16> [[TMP14]], [[TMP15]]
1958 // CHECK:   store volatile <8 x i16> [[SHL11]], ptr @ss, align 8
1959 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1960 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1961 // CHECK:   [[SHL12:%.*]] = shl <8 x i16> [[TMP16]], [[TMP17]]
1962 // CHECK:   store volatile <8 x i16> [[SHL12]], ptr @ss, align 8
1963 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1964 // CHECK:   [[TMP19:%.*]] = load volatile i32, ptr @cnt, align 4
1965 // CHECK:   [[SPLAT_SPLATINSERT13:%.*]] = insertelement <8 x i32> poison, i32 [[TMP19]], i64 0
1966 // CHECK:   [[SPLAT_SPLAT14:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT13]], <8 x i32> poison, <8 x i32> zeroinitializer
1967 // CHECK:   [[SH_PROM15:%.*]] = trunc <8 x i32> [[SPLAT_SPLAT14]] to <8 x i16>
1968 // CHECK:   [[SHL16:%.*]] = shl <8 x i16> [[TMP18]], [[SH_PROM15]]
1969 // CHECK:   store volatile <8 x i16> [[SHL16]], ptr @ss, align 8
1970 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
1971 // CHECK:   [[SHL17:%.*]] = shl <8 x i16> [[TMP20]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
1972 // CHECK:   store volatile <8 x i16> [[SHL17]], ptr @ss, align 8
1973 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1974 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
1975 // CHECK:   [[SHL18:%.*]] = shl <8 x i16> [[TMP21]], [[TMP22]]
1976 // CHECK:   store volatile <8 x i16> [[SHL18]], ptr @us, align 8
1977 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1978 // CHECK:   [[TMP24:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
1979 // CHECK:   [[SHL19:%.*]] = shl <8 x i16> [[TMP23]], [[TMP24]]
1980 // CHECK:   store volatile <8 x i16> [[SHL19]], ptr @us, align 8
1981 // CHECK:   [[TMP25:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1982 // CHECK:   [[TMP26:%.*]] = load volatile i32, ptr @cnt, align 4
1983 // CHECK:   [[SPLAT_SPLATINSERT20:%.*]] = insertelement <8 x i32> poison, i32 [[TMP26]], i64 0
1984 // CHECK:   [[SPLAT_SPLAT21:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT20]], <8 x i32> poison, <8 x i32> zeroinitializer
1985 // CHECK:   [[SH_PROM22:%.*]] = trunc <8 x i32> [[SPLAT_SPLAT21]] to <8 x i16>
1986 // CHECK:   [[SHL23:%.*]] = shl <8 x i16> [[TMP25]], [[SH_PROM22]]
1987 // CHECK:   store volatile <8 x i16> [[SHL23]], ptr @us, align 8
1988 // CHECK:   [[TMP27:%.*]] = load volatile <8 x i16>, ptr @us, align 8
1989 // CHECK:   [[SHL24:%.*]] = shl <8 x i16> [[TMP27]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
1990 // CHECK:   store volatile <8 x i16> [[SHL24]], ptr @us, align 8
1991 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1992 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1993 // CHECK:   [[SHL25:%.*]] = shl <4 x i32> [[TMP28]], [[TMP29]]
1994 // CHECK:   store volatile <4 x i32> [[SHL25]], ptr @si, align 8
1995 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @si, align 8
1996 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
1997 // CHECK:   [[SHL26:%.*]] = shl <4 x i32> [[TMP30]], [[TMP31]]
1998 // CHECK:   store volatile <4 x i32> [[SHL26]], ptr @si, align 8
1999 // CHECK:   [[TMP32:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2000 // CHECK:   [[TMP33:%.*]] = load volatile i32, ptr @cnt, align 4
2001 // CHECK:   [[SPLAT_SPLATINSERT27:%.*]] = insertelement <4 x i32> poison, i32 [[TMP33]], i64 0
2002 // CHECK:   [[SPLAT_SPLAT28:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT27]], <4 x i32> poison, <4 x i32> zeroinitializer
2003 // CHECK:   [[SHL29:%.*]] = shl <4 x i32> [[TMP32]], [[SPLAT_SPLAT28]]
2004 // CHECK:   store volatile <4 x i32> [[SHL29]], ptr @si, align 8
2005 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2006 // CHECK:   [[SHL30:%.*]] = shl <4 x i32> [[TMP34]], <i32 5, i32 5, i32 5, i32 5>
2007 // CHECK:   store volatile <4 x i32> [[SHL30]], ptr @si, align 8
2008 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2009 // CHECK:   [[TMP36:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2010 // CHECK:   [[SHL31:%.*]] = shl <4 x i32> [[TMP35]], [[TMP36]]
2011 // CHECK:   store volatile <4 x i32> [[SHL31]], ptr @ui, align 8
2012 // CHECK:   [[TMP37:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2013 // CHECK:   [[TMP38:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2014 // CHECK:   [[SHL32:%.*]] = shl <4 x i32> [[TMP37]], [[TMP38]]
2015 // CHECK:   store volatile <4 x i32> [[SHL32]], ptr @ui, align 8
2016 // CHECK:   [[TMP39:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2017 // CHECK:   [[TMP40:%.*]] = load volatile i32, ptr @cnt, align 4
2018 // CHECK:   [[SPLAT_SPLATINSERT33:%.*]] = insertelement <4 x i32> poison, i32 [[TMP40]], i64 0
2019 // CHECK:   [[SPLAT_SPLAT34:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT33]], <4 x i32> poison, <4 x i32> zeroinitializer
2020 // CHECK:   [[SHL35:%.*]] = shl <4 x i32> [[TMP39]], [[SPLAT_SPLAT34]]
2021 // CHECK:   store volatile <4 x i32> [[SHL35]], ptr @ui, align 8
2022 // CHECK:   [[TMP41:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2023 // CHECK:   [[SHL36:%.*]] = shl <4 x i32> [[TMP41]], <i32 5, i32 5, i32 5, i32 5>
2024 // CHECK:   store volatile <4 x i32> [[SHL36]], ptr @ui, align 8
2025 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2026 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2027 // CHECK:   [[SHL37:%.*]] = shl <2 x i64> [[TMP42]], [[TMP43]]
2028 // CHECK:   store volatile <2 x i64> [[SHL37]], ptr @sl, align 8
2029 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2030 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2031 // CHECK:   [[SHL38:%.*]] = shl <2 x i64> [[TMP44]], [[TMP45]]
2032 // CHECK:   store volatile <2 x i64> [[SHL38]], ptr @sl, align 8
2033 // CHECK:   [[TMP46:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2034 // CHECK:   [[TMP47:%.*]] = load volatile i32, ptr @cnt, align 4
2035 // CHECK:   [[SPLAT_SPLATINSERT39:%.*]] = insertelement <2 x i32> poison, i32 [[TMP47]], i64 0
2036 // CHECK:   [[SPLAT_SPLAT40:%.*]] = shufflevector <2 x i32> [[SPLAT_SPLATINSERT39]], <2 x i32> poison, <2 x i32> zeroinitializer
2037 // CHECK:   [[SH_PROM41:%.*]] = zext <2 x i32> [[SPLAT_SPLAT40]] to <2 x i64>
2038 // CHECK:   [[SHL42:%.*]] = shl <2 x i64> [[TMP46]], [[SH_PROM41]]
2039 // CHECK:   store volatile <2 x i64> [[SHL42]], ptr @sl, align 8
2040 // CHECK:   [[TMP48:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2041 // CHECK:   [[SHL43:%.*]] = shl <2 x i64> [[TMP48]], <i64 5, i64 5>
2042 // CHECK:   store volatile <2 x i64> [[SHL43]], ptr @sl, align 8
2043 // CHECK:   [[TMP49:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2044 // CHECK:   [[TMP50:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2045 // CHECK:   [[SHL44:%.*]] = shl <2 x i64> [[TMP49]], [[TMP50]]
2046 // CHECK:   store volatile <2 x i64> [[SHL44]], ptr @ul, align 8
2047 // CHECK:   [[TMP51:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2048 // CHECK:   [[TMP52:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2049 // CHECK:   [[SHL45:%.*]] = shl <2 x i64> [[TMP51]], [[TMP52]]
2050 // CHECK:   store volatile <2 x i64> [[SHL45]], ptr @ul, align 8
2051 // CHECK:   [[TMP53:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2052 // CHECK:   [[TMP54:%.*]] = load volatile i32, ptr @cnt, align 4
2053 // CHECK:   [[SPLAT_SPLATINSERT46:%.*]] = insertelement <2 x i32> poison, i32 [[TMP54]], i64 0
2054 // CHECK:   [[SPLAT_SPLAT47:%.*]] = shufflevector <2 x i32> [[SPLAT_SPLATINSERT46]], <2 x i32> poison, <2 x i32> zeroinitializer
2055 // CHECK:   [[SH_PROM48:%.*]] = zext <2 x i32> [[SPLAT_SPLAT47]] to <2 x i64>
2056 // CHECK:   [[SHL49:%.*]] = shl <2 x i64> [[TMP53]], [[SH_PROM48]]
2057 // CHECK:   store volatile <2 x i64> [[SHL49]], ptr @ul, align 8
2058 // CHECK:   [[TMP55:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2059 // CHECK:   [[SHL50:%.*]] = shl <2 x i64> [[TMP55]], <i64 5, i64 5>
2060 // CHECK:   store volatile <2 x i64> [[SHL50]], ptr @ul, align 8
2061 // CHECK:   ret void
2062 void test_sl(void) {
2063
2064   sc = sc << sc2;
2065   sc = sc << uc2;
2066   sc = sc << cnt;
2067   sc = sc << 5;
2068   uc = uc << sc2;
2069   uc = uc << uc2;
2070   uc = uc << cnt;
2071   uc = uc << 5;
2072
2073   ss = ss << ss2;
2074   ss = ss << us2;
2075   ss = ss << cnt;
2076   ss = ss << 5;
2077   us = us << ss2;
2078   us = us << us2;
2079   us = us << cnt;
2080   us = us << 5;
2081
2082   si = si << si2;
2083   si = si << ui2;
2084   si = si << cnt;
2085   si = si << 5;
2086   ui = ui << si2;
2087   ui = ui << ui2;
2088   ui = ui << cnt;
2089   ui = ui << 5;
2090
2091   sl = sl << sl2;
2092   sl = sl << ul2;
2093   sl = sl << cnt;
2094   sl = sl << 5;
2095   ul = ul << sl2;
2096   ul = ul << ul2;
2097   ul = ul << cnt;
2098   ul = ul << 5;
2099 }
2100
2101 // CHECK-LABEL: define{{.*}} void @test_sl_assign() #0 {
2102 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2103 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2104 // CHECK:   [[SHL:%.*]] = shl <16 x i8> [[TMP1]], [[TMP0]]
2105 // CHECK:   store volatile <16 x i8> [[SHL]], ptr @sc, align 8
2106 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
2107 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2108 // CHECK:   [[SHL1:%.*]] = shl <16 x i8> [[TMP3]], [[TMP2]]
2109 // CHECK:   store volatile <16 x i8> [[SHL1]], ptr @sc, align 8
2110 // CHECK:   [[TMP4:%.*]] = load volatile i32, ptr @cnt, align 4
2111 // CHECK:   [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[TMP4]], i64 0
2112 // CHECK:   [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLAT:%.*]]insert, <16 x i32> poison, <16 x i32> zeroinitializer
2113 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2114 // CHECK:   [[SH_PROM:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT]] to <16 x i8>
2115 // CHECK:   [[SHL2:%.*]] = shl <16 x i8> [[TMP5]], [[SH_PROM]]
2116 // CHECK:   store volatile <16 x i8> [[SHL2]], ptr @sc, align 8
2117 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2118 // CHECK:   [[SHL3:%.*]] = shl <16 x i8> [[TMP6]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
2119 // CHECK:   store volatile <16 x i8> [[SHL3]], ptr @sc, align 8
2120 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2121 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2122 // CHECK:   [[SHL4:%.*]] = shl <16 x i8> [[TMP8]], [[TMP7]]
2123 // CHECK:   store volatile <16 x i8> [[SHL4]], ptr @uc, align 8
2124 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
2125 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2126 // CHECK:   [[SHL5:%.*]] = shl <16 x i8> [[TMP10]], [[TMP9]]
2127 // CHECK:   store volatile <16 x i8> [[SHL5]], ptr @uc, align 8
2128 // CHECK:   [[TMP11:%.*]] = load volatile i32, ptr @cnt, align 4
2129 // CHECK:   [[SPLAT_SPLATINSERT6:%.*]] = insertelement <16 x i32> poison, i32 [[TMP11]], i64 0
2130 // CHECK:   [[SPLAT_SPLAT7:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLATINSERT6]], <16 x i32> poison, <16 x i32> zeroinitializer
2131 // CHECK:   [[TMP12:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2132 // CHECK:   [[SH_PROM8:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT7]] to <16 x i8>
2133 // CHECK:   [[SHL9:%.*]] = shl <16 x i8> [[TMP12]], [[SH_PROM8]]
2134 // CHECK:   store volatile <16 x i8> [[SHL9]], ptr @uc, align 8
2135 // CHECK:   [[TMP13:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2136 // CHECK:   [[SHL10:%.*]] = shl <16 x i8> [[TMP13]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
2137 // CHECK:   store volatile <16 x i8> [[SHL10]], ptr @uc, align 8
2138 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
2139 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2140 // CHECK:   [[SHL11:%.*]] = shl <8 x i16> [[TMP15]], [[TMP14]]
2141 // CHECK:   store volatile <8 x i16> [[SHL11]], ptr @ss, align 8
2142 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
2143 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2144 // CHECK:   [[SHL12:%.*]] = shl <8 x i16> [[TMP17]], [[TMP16]]
2145 // CHECK:   store volatile <8 x i16> [[SHL12]], ptr @ss, align 8
2146 // CHECK:   [[TMP18:%.*]] = load volatile i32, ptr @cnt, align 4
2147 // CHECK:   [[SPLAT_SPLATINSERT13:%.*]] = insertelement <8 x i32> poison, i32 [[TMP18]], i64 0
2148 // CHECK:   [[SPLAT_SPLAT14:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT13]], <8 x i32> poison, <8 x i32> zeroinitializer
2149 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2150 // CHECK:   [[SH_PROM15:%.*]] = trunc <8 x i32> [[SPLAT_SPLAT14]] to <8 x i16>
2151 // CHECK:   [[SHL16:%.*]] = shl <8 x i16> [[TMP19]], [[SH_PROM15]]
2152 // CHECK:   store volatile <8 x i16> [[SHL16]], ptr @ss, align 8
2153 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2154 // CHECK:   [[SHL17:%.*]] = shl <8 x i16> [[TMP20]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
2155 // CHECK:   store volatile <8 x i16> [[SHL17]], ptr @ss, align 8
2156 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
2157 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2158 // CHECK:   [[SHL18:%.*]] = shl <8 x i16> [[TMP22]], [[TMP21]]
2159 // CHECK:   store volatile <8 x i16> [[SHL18]], ptr @us, align 8
2160 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
2161 // CHECK:   [[TMP24:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2162 // CHECK:   [[SHL19:%.*]] = shl <8 x i16> [[TMP24]], [[TMP23]]
2163 // CHECK:   store volatile <8 x i16> [[SHL19]], ptr @us, align 8
2164 // CHECK:   [[TMP25:%.*]] = load volatile i32, ptr @cnt, align 4
2165 // CHECK:   [[SPLAT_SPLATINSERT20:%.*]] = insertelement <8 x i32> poison, i32 [[TMP25]], i64 0
2166 // CHECK:   [[SPLAT_SPLAT21:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT20]], <8 x i32> poison, <8 x i32> zeroinitializer
2167 // CHECK:   [[TMP26:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2168 // CHECK:   [[SH_PROM22:%.*]] = trunc <8 x i32> [[SPLAT_SPLAT21]] to <8 x i16>
2169 // CHECK:   [[SHL23:%.*]] = shl <8 x i16> [[TMP26]], [[SH_PROM22]]
2170 // CHECK:   store volatile <8 x i16> [[SHL23]], ptr @us, align 8
2171 // CHECK:   [[TMP27:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2172 // CHECK:   [[SHL24:%.*]] = shl <8 x i16> [[TMP27]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
2173 // CHECK:   store volatile <8 x i16> [[SHL24]], ptr @us, align 8
2174 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2175 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2176 // CHECK:   [[SHL25:%.*]] = shl <4 x i32> [[TMP29]], [[TMP28]]
2177 // CHECK:   store volatile <4 x i32> [[SHL25]], ptr @si, align 8
2178 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2179 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2180 // CHECK:   [[SHL26:%.*]] = shl <4 x i32> [[TMP31]], [[TMP30]]
2181 // CHECK:   store volatile <4 x i32> [[SHL26]], ptr @si, align 8
2182 // CHECK:   [[TMP32:%.*]] = load volatile i32, ptr @cnt, align 4
2183 // CHECK:   [[SPLAT_SPLATINSERT27:%.*]] = insertelement <4 x i32> poison, i32 [[TMP32]], i64 0
2184 // CHECK:   [[SPLAT_SPLAT28:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT27]], <4 x i32> poison, <4 x i32> zeroinitializer
2185 // CHECK:   [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2186 // CHECK:   [[SHL29:%.*]] = shl <4 x i32> [[TMP33]], [[SPLAT_SPLAT28]]
2187 // CHECK:   store volatile <4 x i32> [[SHL29]], ptr @si, align 8
2188 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2189 // CHECK:   [[SHL30:%.*]] = shl <4 x i32> [[TMP34]], <i32 5, i32 5, i32 5, i32 5>
2190 // CHECK:   store volatile <4 x i32> [[SHL30]], ptr @si, align 8
2191 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2192 // CHECK:   [[TMP36:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2193 // CHECK:   [[SHL31:%.*]] = shl <4 x i32> [[TMP36]], [[TMP35]]
2194 // CHECK:   store volatile <4 x i32> [[SHL31]], ptr @ui, align 8
2195 // CHECK:   [[TMP37:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2196 // CHECK:   [[TMP38:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2197 // CHECK:   [[SHL32:%.*]] = shl <4 x i32> [[TMP38]], [[TMP37]]
2198 // CHECK:   store volatile <4 x i32> [[SHL32]], ptr @ui, align 8
2199 // CHECK:   [[TMP39:%.*]] = load volatile i32, ptr @cnt, align 4
2200 // CHECK:   [[SPLAT_SPLATINSERT33:%.*]] = insertelement <4 x i32> poison, i32 [[TMP39]], i64 0
2201 // CHECK:   [[SPLAT_SPLAT34:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT33]], <4 x i32> poison, <4 x i32> zeroinitializer
2202 // CHECK:   [[TMP40:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2203 // CHECK:   [[SHL35:%.*]] = shl <4 x i32> [[TMP40]], [[SPLAT_SPLAT34]]
2204 // CHECK:   store volatile <4 x i32> [[SHL35]], ptr @ui, align 8
2205 // CHECK:   [[TMP41:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2206 // CHECK:   [[SHL36:%.*]] = shl <4 x i32> [[TMP41]], <i32 5, i32 5, i32 5, i32 5>
2207 // CHECK:   store volatile <4 x i32> [[SHL36]], ptr @ui, align 8
2208 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2209 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2210 // CHECK:   [[SHL37:%.*]] = shl <2 x i64> [[TMP43]], [[TMP42]]
2211 // CHECK:   store volatile <2 x i64> [[SHL37]], ptr @sl, align 8
2212 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2213 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2214 // CHECK:   [[SHL38:%.*]] = shl <2 x i64> [[TMP45]], [[TMP44]]
2215 // CHECK:   store volatile <2 x i64> [[SHL38]], ptr @sl, align 8
2216 // CHECK:   [[TMP46:%.*]] = load volatile i32, ptr @cnt, align 4
2217 // CHECK:   [[SPLAT_SPLATINSERT39:%.*]] = insertelement <2 x i32> poison, i32 [[TMP46]], i64 0
2218 // CHECK:   [[SPLAT_SPLAT40:%.*]] = shufflevector <2 x i32> [[SPLAT_SPLATINSERT39]], <2 x i32> poison, <2 x i32> zeroinitializer
2219 // CHECK:   [[TMP47:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2220 // CHECK:   [[SH_PROM41:%.*]] = zext <2 x i32> [[SPLAT_SPLAT40]] to <2 x i64>
2221 // CHECK:   [[SHL42:%.*]] = shl <2 x i64> [[TMP47]], [[SH_PROM41]]
2222 // CHECK:   store volatile <2 x i64> [[SHL42]], ptr @sl, align 8
2223 // CHECK:   [[TMP48:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2224 // CHECK:   [[SHL43:%.*]] = shl <2 x i64> [[TMP48]], <i64 5, i64 5>
2225 // CHECK:   store volatile <2 x i64> [[SHL43]], ptr @sl, align 8
2226 // CHECK:   [[TMP49:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2227 // CHECK:   [[TMP50:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2228 // CHECK:   [[SHL44:%.*]] = shl <2 x i64> [[TMP50]], [[TMP49]]
2229 // CHECK:   store volatile <2 x i64> [[SHL44]], ptr @ul, align 8
2230 // CHECK:   [[TMP51:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2231 // CHECK:   [[TMP52:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2232 // CHECK:   [[SHL45:%.*]] = shl <2 x i64> [[TMP52]], [[TMP51]]
2233 // CHECK:   store volatile <2 x i64> [[SHL45]], ptr @ul, align 8
2234 // CHECK:   [[TMP53:%.*]] = load volatile i32, ptr @cnt, align 4
2235 // CHECK:   [[SPLAT_SPLATINSERT46:%.*]] = insertelement <2 x i32> poison, i32 [[TMP53]], i64 0
2236 // CHECK:   [[SPLAT_SPLAT47:%.*]] = shufflevector <2 x i32> [[SPLAT_SPLATINSERT46]], <2 x i32> poison, <2 x i32> zeroinitializer
2237 // CHECK:   [[TMP54:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2238 // CHECK:   [[SH_PROM48:%.*]] = zext <2 x i32> [[SPLAT_SPLAT47]] to <2 x i64>
2239 // CHECK:   [[SHL49:%.*]] = shl <2 x i64> [[TMP54]], [[SH_PROM48]]
2240 // CHECK:   store volatile <2 x i64> [[SHL49]], ptr @ul, align 8
2241 // CHECK:   [[TMP55:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2242 // CHECK:   [[SHL50:%.*]] = shl <2 x i64> [[TMP55]], <i64 5, i64 5>
2243 // CHECK:   store volatile <2 x i64> [[SHL50]], ptr @ul, align 8
2244 // CHECK:   ret void
2245 void test_sl_assign(void) {
2246
2247   sc <<= sc2;
2248   sc <<= uc2;
2249   sc <<= cnt;
2250   sc <<= 5;
2251   uc <<= sc2;
2252   uc <<= uc2;
2253   uc <<= cnt;
2254   uc <<= 5;
2255
2256   ss <<= ss2;
2257   ss <<= us2;
2258   ss <<= cnt;
2259   ss <<= 5;
2260   us <<= ss2;
2261   us <<= us2;
2262   us <<= cnt;
2263   us <<= 5;
2264
2265   si <<= si2;
2266   si <<= ui2;
2267   si <<= cnt;
2268   si <<= 5;
2269   ui <<= si2;
2270   ui <<= ui2;
2271   ui <<= cnt;
2272   ui <<= 5;
2273
2274   sl <<= sl2;
2275   sl <<= ul2;
2276   sl <<= cnt;
2277   sl <<= 5;
2278   ul <<= sl2;
2279   ul <<= ul2;
2280   ul <<= cnt;
2281   ul <<= 5;
2282 }
2283
2284 // CHECK-LABEL: define{{.*}} void @test_sr() #0 {
2285 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2286 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2287 // CHECK:   [[SHR:%.*]] = ashr <16 x i8> [[TMP0]], [[TMP1]]
2288 // CHECK:   store volatile <16 x i8> [[SHR]], ptr @sc, align 8
2289 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2290 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
2291 // CHECK:   [[SHR1:%.*]] = ashr <16 x i8> [[TMP2]], [[TMP3]]
2292 // CHECK:   store volatile <16 x i8> [[SHR1]], ptr @sc, align 8
2293 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2294 // CHECK:   [[TMP5:%.*]] = load volatile i32, ptr @cnt, align 4
2295 // CHECK:   [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[TMP5]], i64 0
2296 // CHECK:   [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLAT:%.*]]insert, <16 x i32> poison, <16 x i32> zeroinitializer
2297 // CHECK:   [[SH_PROM:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT]] to <16 x i8>
2298 // CHECK:   [[SHR2:%.*]] = ashr <16 x i8> [[TMP4]], [[SH_PROM]]
2299 // CHECK:   store volatile <16 x i8> [[SHR2]], ptr @sc, align 8
2300 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2301 // CHECK:   [[SHR3:%.*]] = ashr <16 x i8> [[TMP6]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
2302 // CHECK:   store volatile <16 x i8> [[SHR3]], ptr @sc, align 8
2303 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2304 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2305 // CHECK:   [[SHR4:%.*]] = lshr <16 x i8> [[TMP7]], [[TMP8]]
2306 // CHECK:   store volatile <16 x i8> [[SHR4]], ptr @uc, align 8
2307 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2308 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
2309 // CHECK:   [[SHR5:%.*]] = lshr <16 x i8> [[TMP9]], [[TMP10]]
2310 // CHECK:   store volatile <16 x i8> [[SHR5]], ptr @uc, align 8
2311 // CHECK:   [[TMP11:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2312 // CHECK:   [[TMP12:%.*]] = load volatile i32, ptr @cnt, align 4
2313 // CHECK:   [[SPLAT_SPLATINSERT6:%.*]] = insertelement <16 x i32> poison, i32 [[TMP12]], i64 0
2314 // CHECK:   [[SPLAT_SPLAT7:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLATINSERT6]], <16 x i32> poison, <16 x i32> zeroinitializer
2315 // CHECK:   [[SH_PROM8:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT7]] to <16 x i8>
2316 // CHECK:   [[SHR9:%.*]] = lshr <16 x i8> [[TMP11]], [[SH_PROM8]]
2317 // CHECK:   store volatile <16 x i8> [[SHR9]], ptr @uc, align 8
2318 // CHECK:   [[TMP13:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2319 // CHECK:   [[SHR10:%.*]] = lshr <16 x i8> [[TMP13]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
2320 // CHECK:   store volatile <16 x i8> [[SHR10]], ptr @uc, align 8
2321 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2322 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
2323 // CHECK:   [[SHR11:%.*]] = ashr <8 x i16> [[TMP14]], [[TMP15]]
2324 // CHECK:   store volatile <8 x i16> [[SHR11]], ptr @ss, align 8
2325 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2326 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
2327 // CHECK:   [[SHR12:%.*]] = ashr <8 x i16> [[TMP16]], [[TMP17]]
2328 // CHECK:   store volatile <8 x i16> [[SHR12]], ptr @ss, align 8
2329 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2330 // CHECK:   [[TMP19:%.*]] = load volatile i32, ptr @cnt, align 4
2331 // CHECK:   [[SPLAT_SPLATINSERT13:%.*]] = insertelement <8 x i32> poison, i32 [[TMP19]], i64 0
2332 // CHECK:   [[SPLAT_SPLAT14:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT13]], <8 x i32> poison, <8 x i32> zeroinitializer
2333 // CHECK:   [[SH_PROM15:%.*]] = trunc <8 x i32> [[SPLAT_SPLAT14]] to <8 x i16>
2334 // CHECK:   [[SHR16:%.*]] = ashr <8 x i16> [[TMP18]], [[SH_PROM15]]
2335 // CHECK:   store volatile <8 x i16> [[SHR16]], ptr @ss, align 8
2336 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2337 // CHECK:   [[SHR17:%.*]] = ashr <8 x i16> [[TMP20]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
2338 // CHECK:   store volatile <8 x i16> [[SHR17]], ptr @ss, align 8
2339 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2340 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
2341 // CHECK:   [[SHR18:%.*]] = lshr <8 x i16> [[TMP21]], [[TMP22]]
2342 // CHECK:   store volatile <8 x i16> [[SHR18]], ptr @us, align 8
2343 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2344 // CHECK:   [[TMP24:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
2345 // CHECK:   [[SHR19:%.*]] = lshr <8 x i16> [[TMP23]], [[TMP24]]
2346 // CHECK:   store volatile <8 x i16> [[SHR19]], ptr @us, align 8
2347 // CHECK:   [[TMP25:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2348 // CHECK:   [[TMP26:%.*]] = load volatile i32, ptr @cnt, align 4
2349 // CHECK:   [[SPLAT_SPLATINSERT20:%.*]] = insertelement <8 x i32> poison, i32 [[TMP26]], i64 0
2350 // CHECK:   [[SPLAT_SPLAT21:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT20]], <8 x i32> poison, <8 x i32> zeroinitializer
2351 // CHECK:   [[SH_PROM22:%.*]] = trunc <8 x i32> [[SPLAT_SPLAT21]] to <8 x i16>
2352 // CHECK:   [[SHR23:%.*]] = lshr <8 x i16> [[TMP25]], [[SH_PROM22]]
2353 // CHECK:   store volatile <8 x i16> [[SHR23]], ptr @us, align 8
2354 // CHECK:   [[TMP27:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2355 // CHECK:   [[SHR24:%.*]] = lshr <8 x i16> [[TMP27]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
2356 // CHECK:   store volatile <8 x i16> [[SHR24]], ptr @us, align 8
2357 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2358 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2359 // CHECK:   [[SHR25:%.*]] = ashr <4 x i32> [[TMP28]], [[TMP29]]
2360 // CHECK:   store volatile <4 x i32> [[SHR25]], ptr @si, align 8
2361 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2362 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2363 // CHECK:   [[SHR26:%.*]] = ashr <4 x i32> [[TMP30]], [[TMP31]]
2364 // CHECK:   store volatile <4 x i32> [[SHR26]], ptr @si, align 8
2365 // CHECK:   [[TMP32:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2366 // CHECK:   [[TMP33:%.*]] = load volatile i32, ptr @cnt, align 4
2367 // CHECK:   [[SPLAT_SPLATINSERT27:%.*]] = insertelement <4 x i32> poison, i32 [[TMP33]], i64 0
2368 // CHECK:   [[SPLAT_SPLAT28:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT27]], <4 x i32> poison, <4 x i32> zeroinitializer
2369 // CHECK:   [[SHR29:%.*]] = ashr <4 x i32> [[TMP32]], [[SPLAT_SPLAT28]]
2370 // CHECK:   store volatile <4 x i32> [[SHR29]], ptr @si, align 8
2371 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2372 // CHECK:   [[SHR30:%.*]] = ashr <4 x i32> [[TMP34]], <i32 5, i32 5, i32 5, i32 5>
2373 // CHECK:   store volatile <4 x i32> [[SHR30]], ptr @si, align 8
2374 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2375 // CHECK:   [[TMP36:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2376 // CHECK:   [[SHR31:%.*]] = lshr <4 x i32> [[TMP35]], [[TMP36]]
2377 // CHECK:   store volatile <4 x i32> [[SHR31]], ptr @ui, align 8
2378 // CHECK:   [[TMP37:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2379 // CHECK:   [[TMP38:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2380 // CHECK:   [[SHR32:%.*]] = lshr <4 x i32> [[TMP37]], [[TMP38]]
2381 // CHECK:   store volatile <4 x i32> [[SHR32]], ptr @ui, align 8
2382 // CHECK:   [[TMP39:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2383 // CHECK:   [[TMP40:%.*]] = load volatile i32, ptr @cnt, align 4
2384 // CHECK:   [[SPLAT_SPLATINSERT33:%.*]] = insertelement <4 x i32> poison, i32 [[TMP40]], i64 0
2385 // CHECK:   [[SPLAT_SPLAT34:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT33]], <4 x i32> poison, <4 x i32> zeroinitializer
2386 // CHECK:   [[SHR35:%.*]] = lshr <4 x i32> [[TMP39]], [[SPLAT_SPLAT34]]
2387 // CHECK:   store volatile <4 x i32> [[SHR35]], ptr @ui, align 8
2388 // CHECK:   [[TMP41:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2389 // CHECK:   [[SHR36:%.*]] = lshr <4 x i32> [[TMP41]], <i32 5, i32 5, i32 5, i32 5>
2390 // CHECK:   store volatile <4 x i32> [[SHR36]], ptr @ui, align 8
2391 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2392 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2393 // CHECK:   [[SHR37:%.*]] = ashr <2 x i64> [[TMP42]], [[TMP43]]
2394 // CHECK:   store volatile <2 x i64> [[SHR37]], ptr @sl, align 8
2395 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2396 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2397 // CHECK:   [[SHR38:%.*]] = ashr <2 x i64> [[TMP44]], [[TMP45]]
2398 // CHECK:   store volatile <2 x i64> [[SHR38]], ptr @sl, align 8
2399 // CHECK:   [[TMP46:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2400 // CHECK:   [[TMP47:%.*]] = load volatile i32, ptr @cnt, align 4
2401 // CHECK:   [[SPLAT_SPLATINSERT39:%.*]] = insertelement <2 x i32> poison, i32 [[TMP47]], i64 0
2402 // CHECK:   [[SPLAT_SPLAT40:%.*]] = shufflevector <2 x i32> [[SPLAT_SPLATINSERT39]], <2 x i32> poison, <2 x i32> zeroinitializer
2403 // CHECK:   [[SH_PROM41:%.*]] = zext <2 x i32> [[SPLAT_SPLAT40]] to <2 x i64>
2404 // CHECK:   [[SHR42:%.*]] = ashr <2 x i64> [[TMP46]], [[SH_PROM41]]
2405 // CHECK:   store volatile <2 x i64> [[SHR42]], ptr @sl, align 8
2406 // CHECK:   [[TMP48:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2407 // CHECK:   [[SHR43:%.*]] = ashr <2 x i64> [[TMP48]], <i64 5, i64 5>
2408 // CHECK:   store volatile <2 x i64> [[SHR43]], ptr @sl, align 8
2409 // CHECK:   [[TMP49:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2410 // CHECK:   [[TMP50:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2411 // CHECK:   [[SHR44:%.*]] = lshr <2 x i64> [[TMP49]], [[TMP50]]
2412 // CHECK:   store volatile <2 x i64> [[SHR44]], ptr @ul, align 8
2413 // CHECK:   [[TMP51:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2414 // CHECK:   [[TMP52:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2415 // CHECK:   [[SHR45:%.*]] = lshr <2 x i64> [[TMP51]], [[TMP52]]
2416 // CHECK:   store volatile <2 x i64> [[SHR45]], ptr @ul, align 8
2417 // CHECK:   [[TMP53:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2418 // CHECK:   [[TMP54:%.*]] = load volatile i32, ptr @cnt, align 4
2419 // CHECK:   [[SPLAT_SPLATINSERT46:%.*]] = insertelement <2 x i32> poison, i32 [[TMP54]], i64 0
2420 // CHECK:   [[SPLAT_SPLAT47:%.*]] = shufflevector <2 x i32> [[SPLAT_SPLATINSERT46]], <2 x i32> poison, <2 x i32> zeroinitializer
2421 // CHECK:   [[SH_PROM48:%.*]] = zext <2 x i32> [[SPLAT_SPLAT47]] to <2 x i64>
2422 // CHECK:   [[SHR49:%.*]] = lshr <2 x i64> [[TMP53]], [[SH_PROM48]]
2423 // CHECK:   store volatile <2 x i64> [[SHR49]], ptr @ul, align 8
2424 // CHECK:   [[TMP55:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2425 // CHECK:   [[SHR50:%.*]] = lshr <2 x i64> [[TMP55]], <i64 5, i64 5>
2426 // CHECK:   store volatile <2 x i64> [[SHR50]], ptr @ul, align 8
2427 // CHECK:   ret void
2428 void test_sr(void) {
2429
2430   sc = sc >> sc2;
2431   sc = sc >> uc2;
2432   sc = sc >> cnt;
2433   sc = sc >> 5;
2434   uc = uc >> sc2;
2435   uc = uc >> uc2;
2436   uc = uc >> cnt;
2437   uc = uc >> 5;
2438
2439   ss = ss >> ss2;
2440   ss = ss >> us2;
2441   ss = ss >> cnt;
2442   ss = ss >> 5;
2443   us = us >> ss2;
2444   us = us >> us2;
2445   us = us >> cnt;
2446   us = us >> 5;
2447
2448   si = si >> si2;
2449   si = si >> ui2;
2450   si = si >> cnt;
2451   si = si >> 5;
2452   ui = ui >> si2;
2453   ui = ui >> ui2;
2454   ui = ui >> cnt;
2455   ui = ui >> 5;
2456
2457   sl = sl >> sl2;
2458   sl = sl >> ul2;
2459   sl = sl >> cnt;
2460   sl = sl >> 5;
2461   ul = ul >> sl2;
2462   ul = ul >> ul2;
2463   ul = ul >> cnt;
2464   ul = ul >> 5;
2465 }
2466
2467 // CHECK-LABEL: define{{.*}} void @test_sr_assign() #0 {
2468 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2469 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2470 // CHECK:   [[SHR:%.*]] = ashr <16 x i8> [[TMP1]], [[TMP0]]
2471 // CHECK:   store volatile <16 x i8> [[SHR]], ptr @sc, align 8
2472 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
2473 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2474 // CHECK:   [[SHR1:%.*]] = ashr <16 x i8> [[TMP3]], [[TMP2]]
2475 // CHECK:   store volatile <16 x i8> [[SHR1]], ptr @sc, align 8
2476 // CHECK:   [[TMP4:%.*]] = load volatile i32, ptr @cnt, align 4
2477 // CHECK:   [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[TMP4]], i64 0
2478 // CHECK:   [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLAT:%.*]]insert, <16 x i32> poison, <16 x i32> zeroinitializer
2479 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2480 // CHECK:   [[SH_PROM:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT]] to <16 x i8>
2481 // CHECK:   [[SHR2:%.*]] = ashr <16 x i8> [[TMP5]], [[SH_PROM]]
2482 // CHECK:   store volatile <16 x i8> [[SHR2]], ptr @sc, align 8
2483 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2484 // CHECK:   [[SHR3:%.*]] = ashr <16 x i8> [[TMP6]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
2485 // CHECK:   store volatile <16 x i8> [[SHR3]], ptr @sc, align 8
2486 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2487 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2488 // CHECK:   [[SHR4:%.*]] = lshr <16 x i8> [[TMP8]], [[TMP7]]
2489 // CHECK:   store volatile <16 x i8> [[SHR4]], ptr @uc, align 8
2490 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
2491 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2492 // CHECK:   [[SHR5:%.*]] = lshr <16 x i8> [[TMP10]], [[TMP9]]
2493 // CHECK:   store volatile <16 x i8> [[SHR5]], ptr @uc, align 8
2494 // CHECK:   [[TMP11:%.*]] = load volatile i32, ptr @cnt, align 4
2495 // CHECK:   [[SPLAT_SPLATINSERT6:%.*]] = insertelement <16 x i32> poison, i32 [[TMP11]], i64 0
2496 // CHECK:   [[SPLAT_SPLAT7:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLATINSERT6]], <16 x i32> poison, <16 x i32> zeroinitializer
2497 // CHECK:   [[TMP12:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2498 // CHECK:   [[SH_PROM8:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT7]] to <16 x i8>
2499 // CHECK:   [[SHR9:%.*]] = lshr <16 x i8> [[TMP12]], [[SH_PROM8]]
2500 // CHECK:   store volatile <16 x i8> [[SHR9]], ptr @uc, align 8
2501 // CHECK:   [[TMP13:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2502 // CHECK:   [[SHR10:%.*]] = lshr <16 x i8> [[TMP13]], <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
2503 // CHECK:   store volatile <16 x i8> [[SHR10]], ptr @uc, align 8
2504 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
2505 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2506 // CHECK:   [[SHR11:%.*]] = ashr <8 x i16> [[TMP15]], [[TMP14]]
2507 // CHECK:   store volatile <8 x i16> [[SHR11]], ptr @ss, align 8
2508 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
2509 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2510 // CHECK:   [[SHR12:%.*]] = ashr <8 x i16> [[TMP17]], [[TMP16]]
2511 // CHECK:   store volatile <8 x i16> [[SHR12]], ptr @ss, align 8
2512 // CHECK:   [[TMP18:%.*]] = load volatile i32, ptr @cnt, align 4
2513 // CHECK:   [[SPLAT_SPLATINSERT13:%.*]] = insertelement <8 x i32> poison, i32 [[TMP18]], i64 0
2514 // CHECK:   [[SPLAT_SPLAT14:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT13]], <8 x i32> poison, <8 x i32> zeroinitializer
2515 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2516 // CHECK:   [[SH_PROM15:%.*]] = trunc <8 x i32> [[SPLAT_SPLAT14]] to <8 x i16>
2517 // CHECK:   [[SHR16:%.*]] = ashr <8 x i16> [[TMP19]], [[SH_PROM15]]
2518 // CHECK:   store volatile <8 x i16> [[SHR16]], ptr @ss, align 8
2519 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2520 // CHECK:   [[SHR17:%.*]] = ashr <8 x i16> [[TMP20]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
2521 // CHECK:   store volatile <8 x i16> [[SHR17]], ptr @ss, align 8
2522 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
2523 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2524 // CHECK:   [[SHR18:%.*]] = lshr <8 x i16> [[TMP22]], [[TMP21]]
2525 // CHECK:   store volatile <8 x i16> [[SHR18]], ptr @us, align 8
2526 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
2527 // CHECK:   [[TMP24:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2528 // CHECK:   [[SHR19:%.*]] = lshr <8 x i16> [[TMP24]], [[TMP23]]
2529 // CHECK:   store volatile <8 x i16> [[SHR19]], ptr @us, align 8
2530 // CHECK:   [[TMP25:%.*]] = load volatile i32, ptr @cnt, align 4
2531 // CHECK:   [[SPLAT_SPLATINSERT20:%.*]] = insertelement <8 x i32> poison, i32 [[TMP25]], i64 0
2532 // CHECK:   [[SPLAT_SPLAT21:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT20]], <8 x i32> poison, <8 x i32> zeroinitializer
2533 // CHECK:   [[TMP26:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2534 // CHECK:   [[SH_PROM22:%.*]] = trunc <8 x i32> [[SPLAT_SPLAT21]] to <8 x i16>
2535 // CHECK:   [[SHR23:%.*]] = lshr <8 x i16> [[TMP26]], [[SH_PROM22]]
2536 // CHECK:   store volatile <8 x i16> [[SHR23]], ptr @us, align 8
2537 // CHECK:   [[TMP27:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2538 // CHECK:   [[SHR24:%.*]] = lshr <8 x i16> [[TMP27]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
2539 // CHECK:   store volatile <8 x i16> [[SHR24]], ptr @us, align 8
2540 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2541 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2542 // CHECK:   [[SHR25:%.*]] = ashr <4 x i32> [[TMP29]], [[TMP28]]
2543 // CHECK:   store volatile <4 x i32> [[SHR25]], ptr @si, align 8
2544 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2545 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2546 // CHECK:   [[SHR26:%.*]] = ashr <4 x i32> [[TMP31]], [[TMP30]]
2547 // CHECK:   store volatile <4 x i32> [[SHR26]], ptr @si, align 8
2548 // CHECK:   [[TMP32:%.*]] = load volatile i32, ptr @cnt, align 4
2549 // CHECK:   [[SPLAT_SPLATINSERT27:%.*]] = insertelement <4 x i32> poison, i32 [[TMP32]], i64 0
2550 // CHECK:   [[SPLAT_SPLAT28:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT27]], <4 x i32> poison, <4 x i32> zeroinitializer
2551 // CHECK:   [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2552 // CHECK:   [[SHR29:%.*]] = ashr <4 x i32> [[TMP33]], [[SPLAT_SPLAT28]]
2553 // CHECK:   store volatile <4 x i32> [[SHR29]], ptr @si, align 8
2554 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2555 // CHECK:   [[SHR30:%.*]] = ashr <4 x i32> [[TMP34]], <i32 5, i32 5, i32 5, i32 5>
2556 // CHECK:   store volatile <4 x i32> [[SHR30]], ptr @si, align 8
2557 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2558 // CHECK:   [[TMP36:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2559 // CHECK:   [[SHR31:%.*]] = lshr <4 x i32> [[TMP36]], [[TMP35]]
2560 // CHECK:   store volatile <4 x i32> [[SHR31]], ptr @ui, align 8
2561 // CHECK:   [[TMP37:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2562 // CHECK:   [[TMP38:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2563 // CHECK:   [[SHR32:%.*]] = lshr <4 x i32> [[TMP38]], [[TMP37]]
2564 // CHECK:   store volatile <4 x i32> [[SHR32]], ptr @ui, align 8
2565 // CHECK:   [[TMP39:%.*]] = load volatile i32, ptr @cnt, align 4
2566 // CHECK:   [[SPLAT_SPLATINSERT33:%.*]] = insertelement <4 x i32> poison, i32 [[TMP39]], i64 0
2567 // CHECK:   [[SPLAT_SPLAT34:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT33]], <4 x i32> poison, <4 x i32> zeroinitializer
2568 // CHECK:   [[TMP40:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2569 // CHECK:   [[SHR35:%.*]] = lshr <4 x i32> [[TMP40]], [[SPLAT_SPLAT34]]
2570 // CHECK:   store volatile <4 x i32> [[SHR35]], ptr @ui, align 8
2571 // CHECK:   [[TMP41:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2572 // CHECK:   [[SHR36:%.*]] = lshr <4 x i32> [[TMP41]], <i32 5, i32 5, i32 5, i32 5>
2573 // CHECK:   store volatile <4 x i32> [[SHR36]], ptr @ui, align 8
2574 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2575 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2576 // CHECK:   [[SHR37:%.*]] = ashr <2 x i64> [[TMP43]], [[TMP42]]
2577 // CHECK:   store volatile <2 x i64> [[SHR37]], ptr @sl, align 8
2578 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2579 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2580 // CHECK:   [[SHR38:%.*]] = ashr <2 x i64> [[TMP45]], [[TMP44]]
2581 // CHECK:   store volatile <2 x i64> [[SHR38]], ptr @sl, align 8
2582 // CHECK:   [[TMP46:%.*]] = load volatile i32, ptr @cnt, align 4
2583 // CHECK:   [[SPLAT_SPLATINSERT39:%.*]] = insertelement <2 x i32> poison, i32 [[TMP46]], i64 0
2584 // CHECK:   [[SPLAT_SPLAT40:%.*]] = shufflevector <2 x i32> [[SPLAT_SPLATINSERT39]], <2 x i32> poison, <2 x i32> zeroinitializer
2585 // CHECK:   [[TMP47:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2586 // CHECK:   [[SH_PROM41:%.*]] = zext <2 x i32> [[SPLAT_SPLAT40]] to <2 x i64>
2587 // CHECK:   [[SHR42:%.*]] = ashr <2 x i64> [[TMP47]], [[SH_PROM41]]
2588 // CHECK:   store volatile <2 x i64> [[SHR42]], ptr @sl, align 8
2589 // CHECK:   [[TMP48:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2590 // CHECK:   [[SHR43:%.*]] = ashr <2 x i64> [[TMP48]], <i64 5, i64 5>
2591 // CHECK:   store volatile <2 x i64> [[SHR43]], ptr @sl, align 8
2592 // CHECK:   [[TMP49:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2593 // CHECK:   [[TMP50:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2594 // CHECK:   [[SHR44:%.*]] = lshr <2 x i64> [[TMP50]], [[TMP49]]
2595 // CHECK:   store volatile <2 x i64> [[SHR44]], ptr @ul, align 8
2596 // CHECK:   [[TMP51:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2597 // CHECK:   [[TMP52:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2598 // CHECK:   [[SHR45:%.*]] = lshr <2 x i64> [[TMP52]], [[TMP51]]
2599 // CHECK:   store volatile <2 x i64> [[SHR45]], ptr @ul, align 8
2600 // CHECK:   [[TMP53:%.*]] = load volatile i32, ptr @cnt, align 4
2601 // CHECK:   [[SPLAT_SPLATINSERT46:%.*]] = insertelement <2 x i32> poison, i32 [[TMP53]], i64 0
2602 // CHECK:   [[SPLAT_SPLAT47:%.*]] = shufflevector <2 x i32> [[SPLAT_SPLATINSERT46]], <2 x i32> poison, <2 x i32> zeroinitializer
2603 // CHECK:   [[TMP54:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2604 // CHECK:   [[SH_PROM48:%.*]] = zext <2 x i32> [[SPLAT_SPLAT47]] to <2 x i64>
2605 // CHECK:   [[SHR49:%.*]] = lshr <2 x i64> [[TMP54]], [[SH_PROM48]]
2606 // CHECK:   store volatile <2 x i64> [[SHR49]], ptr @ul, align 8
2607 // CHECK:   [[TMP55:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2608 // CHECK:   [[SHR50:%.*]] = lshr <2 x i64> [[TMP55]], <i64 5, i64 5>
2609 // CHECK:   store volatile <2 x i64> [[SHR50]], ptr @ul, align 8
2610 // CHECK:   ret void
2611 void test_sr_assign(void) {
2612
2613   sc >>= sc2;
2614   sc >>= uc2;
2615   sc >>= cnt;
2616   sc >>= 5;
2617   uc >>= sc2;
2618   uc >>= uc2;
2619   uc >>= cnt;
2620   uc >>= 5;
2621
2622   ss >>= ss2;
2623   ss >>= us2;
2624   ss >>= cnt;
2625   ss >>= 5;
2626   us >>= ss2;
2627   us >>= us2;
2628   us >>= cnt;
2629   us >>= 5;
2630
2631   si >>= si2;
2632   si >>= ui2;
2633   si >>= cnt;
2634   si >>= 5;
2635   ui >>= si2;
2636   ui >>= ui2;
2637   ui >>= cnt;
2638   ui >>= 5;
2639
2640   sl >>= sl2;
2641   sl >>= ul2;
2642   sl >>= cnt;
2643   sl >>= 5;
2644   ul >>= sl2;
2645   ul >>= ul2;
2646   ul >>= cnt;
2647   ul >>= 5;
2648 }
2649
2650
2651 // CHECK-LABEL: define{{.*}} void @test_cmpeq() #0 {
2652 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2653 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2654 // CHECK:   [[CMP:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]]
2655 // CHECK:   [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8>
2656 // CHECK:   store volatile <16 x i8> [[SEXT]], ptr @bc, align 8
2657 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2658 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
2659 // CHECK:   [[CMP1:%.*]] = icmp eq <16 x i8> [[TMP2]], [[TMP3]]
2660 // CHECK:   [[SEXT2:%.*]] = sext <16 x i1> [[CMP1]] to <16 x i8>
2661 // CHECK:   store volatile <16 x i8> [[SEXT2]], ptr @bc, align 8
2662 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
2663 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2664 // CHECK:   [[CMP3:%.*]] = icmp eq <16 x i8> [[TMP4]], [[TMP5]]
2665 // CHECK:   [[SEXT4:%.*]] = sext <16 x i1> [[CMP3]] to <16 x i8>
2666 // CHECK:   store volatile <16 x i8> [[SEXT4]], ptr @bc, align 8
2667 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2668 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
2669 // CHECK:   [[CMP5:%.*]] = icmp eq <16 x i8> [[TMP6]], [[TMP7]]
2670 // CHECK:   [[SEXT6:%.*]] = sext <16 x i1> [[CMP5]] to <16 x i8>
2671 // CHECK:   store volatile <16 x i8> [[SEXT6]], ptr @bc, align 8
2672 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2673 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
2674 // CHECK:   [[CMP7:%.*]] = icmp eq <16 x i8> [[TMP8]], [[TMP9]]
2675 // CHECK:   [[SEXT8:%.*]] = sext <16 x i1> [[CMP7]] to <16 x i8>
2676 // CHECK:   store volatile <16 x i8> [[SEXT8]], ptr @bc, align 8
2677 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
2678 // CHECK:   [[TMP11:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
2679 // CHECK:   [[CMP9:%.*]] = icmp eq <16 x i8> [[TMP10]], [[TMP11]]
2680 // CHECK:   [[SEXT10:%.*]] = sext <16 x i1> [[CMP9]] to <16 x i8>
2681 // CHECK:   store volatile <16 x i8> [[SEXT10]], ptr @bc, align 8
2682 // CHECK:   [[TMP12:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
2683 // CHECK:   [[TMP13:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
2684 // CHECK:   [[CMP11:%.*]] = icmp eq <16 x i8> [[TMP12]], [[TMP13]]
2685 // CHECK:   [[SEXT12:%.*]] = sext <16 x i1> [[CMP11]] to <16 x i8>
2686 // CHECK:   store volatile <16 x i8> [[SEXT12]], ptr @bc, align 8
2687 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2688 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
2689 // CHECK:   [[CMP13:%.*]] = icmp eq <8 x i16> [[TMP14]], [[TMP15]]
2690 // CHECK:   [[SEXT14:%.*]] = sext <8 x i1> [[CMP13]] to <8 x i16>
2691 // CHECK:   store volatile <8 x i16> [[SEXT14]], ptr @bs, align 8
2692 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2693 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
2694 // CHECK:   [[CMP15:%.*]] = icmp eq <8 x i16> [[TMP16]], [[TMP17]]
2695 // CHECK:   [[SEXT16:%.*]] = sext <8 x i1> [[CMP15]] to <8 x i16>
2696 // CHECK:   store volatile <8 x i16> [[SEXT16]], ptr @bs, align 8
2697 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
2698 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
2699 // CHECK:   [[CMP17:%.*]] = icmp eq <8 x i16> [[TMP18]], [[TMP19]]
2700 // CHECK:   [[SEXT18:%.*]] = sext <8 x i1> [[CMP17]] to <8 x i16>
2701 // CHECK:   store volatile <8 x i16> [[SEXT18]], ptr @bs, align 8
2702 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2703 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
2704 // CHECK:   [[CMP19:%.*]] = icmp eq <8 x i16> [[TMP20]], [[TMP21]]
2705 // CHECK:   [[SEXT20:%.*]] = sext <8 x i1> [[CMP19]] to <8 x i16>
2706 // CHECK:   store volatile <8 x i16> [[SEXT20]], ptr @bs, align 8
2707 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2708 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
2709 // CHECK:   [[CMP21:%.*]] = icmp eq <8 x i16> [[TMP22]], [[TMP23]]
2710 // CHECK:   [[SEXT22:%.*]] = sext <8 x i1> [[CMP21]] to <8 x i16>
2711 // CHECK:   store volatile <8 x i16> [[SEXT22]], ptr @bs, align 8
2712 // CHECK:   [[TMP24:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
2713 // CHECK:   [[TMP25:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
2714 // CHECK:   [[CMP23:%.*]] = icmp eq <8 x i16> [[TMP24]], [[TMP25]]
2715 // CHECK:   [[SEXT24:%.*]] = sext <8 x i1> [[CMP23]] to <8 x i16>
2716 // CHECK:   store volatile <8 x i16> [[SEXT24]], ptr @bs, align 8
2717 // CHECK:   [[TMP26:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
2718 // CHECK:   [[TMP27:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
2719 // CHECK:   [[CMP25:%.*]] = icmp eq <8 x i16> [[TMP26]], [[TMP27]]
2720 // CHECK:   [[SEXT26:%.*]] = sext <8 x i1> [[CMP25]] to <8 x i16>
2721 // CHECK:   store volatile <8 x i16> [[SEXT26]], ptr @bs, align 8
2722 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2723 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2724 // CHECK:   [[CMP27:%.*]] = icmp eq <4 x i32> [[TMP28]], [[TMP29]]
2725 // CHECK:   [[SEXT28:%.*]] = sext <4 x i1> [[CMP27]] to <4 x i32>
2726 // CHECK:   store volatile <4 x i32> [[SEXT28]], ptr @bi, align 8
2727 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2728 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
2729 // CHECK:   [[CMP29:%.*]] = icmp eq <4 x i32> [[TMP30]], [[TMP31]]
2730 // CHECK:   [[SEXT30:%.*]] = sext <4 x i1> [[CMP29]] to <4 x i32>
2731 // CHECK:   store volatile <4 x i32> [[SEXT30]], ptr @bi, align 8
2732 // CHECK:   [[TMP32:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
2733 // CHECK:   [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2734 // CHECK:   [[CMP31:%.*]] = icmp eq <4 x i32> [[TMP32]], [[TMP33]]
2735 // CHECK:   [[SEXT32:%.*]] = sext <4 x i1> [[CMP31]] to <4 x i32>
2736 // CHECK:   store volatile <4 x i32> [[SEXT32]], ptr @bi, align 8
2737 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2738 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2739 // CHECK:   [[CMP33:%.*]] = icmp eq <4 x i32> [[TMP34]], [[TMP35]]
2740 // CHECK:   [[SEXT34:%.*]] = sext <4 x i1> [[CMP33]] to <4 x i32>
2741 // CHECK:   store volatile <4 x i32> [[SEXT34]], ptr @bi, align 8
2742 // CHECK:   [[TMP36:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2743 // CHECK:   [[TMP37:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
2744 // CHECK:   [[CMP35:%.*]] = icmp eq <4 x i32> [[TMP36]], [[TMP37]]
2745 // CHECK:   [[SEXT36:%.*]] = sext <4 x i1> [[CMP35]] to <4 x i32>
2746 // CHECK:   store volatile <4 x i32> [[SEXT36]], ptr @bi, align 8
2747 // CHECK:   [[TMP38:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
2748 // CHECK:   [[TMP39:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2749 // CHECK:   [[CMP37:%.*]] = icmp eq <4 x i32> [[TMP38]], [[TMP39]]
2750 // CHECK:   [[SEXT38:%.*]] = sext <4 x i1> [[CMP37]] to <4 x i32>
2751 // CHECK:   store volatile <4 x i32> [[SEXT38]], ptr @bi, align 8
2752 // CHECK:   [[TMP40:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
2753 // CHECK:   [[TMP41:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
2754 // CHECK:   [[CMP39:%.*]] = icmp eq <4 x i32> [[TMP40]], [[TMP41]]
2755 // CHECK:   [[SEXT40:%.*]] = sext <4 x i1> [[CMP39]] to <4 x i32>
2756 // CHECK:   store volatile <4 x i32> [[SEXT40]], ptr @bi, align 8
2757 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2758 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2759 // CHECK:   [[CMP41:%.*]] = icmp eq <2 x i64> [[TMP42]], [[TMP43]]
2760 // CHECK:   [[SEXT42:%.*]] = sext <2 x i1> [[CMP41]] to <2 x i64>
2761 // CHECK:   store volatile <2 x i64> [[SEXT42]], ptr @bl, align 8
2762 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2763 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
2764 // CHECK:   [[CMP43:%.*]] = icmp eq <2 x i64> [[TMP44]], [[TMP45]]
2765 // CHECK:   [[SEXT44:%.*]] = sext <2 x i1> [[CMP43]] to <2 x i64>
2766 // CHECK:   store volatile <2 x i64> [[SEXT44]], ptr @bl, align 8
2767 // CHECK:   [[TMP46:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
2768 // CHECK:   [[TMP47:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2769 // CHECK:   [[CMP45:%.*]] = icmp eq <2 x i64> [[TMP46]], [[TMP47]]
2770 // CHECK:   [[SEXT46:%.*]] = sext <2 x i1> [[CMP45]] to <2 x i64>
2771 // CHECK:   store volatile <2 x i64> [[SEXT46]], ptr @bl, align 8
2772 // CHECK:   [[TMP48:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2773 // CHECK:   [[TMP49:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2774 // CHECK:   [[CMP47:%.*]] = icmp eq <2 x i64> [[TMP48]], [[TMP49]]
2775 // CHECK:   [[SEXT48:%.*]] = sext <2 x i1> [[CMP47]] to <2 x i64>
2776 // CHECK:   store volatile <2 x i64> [[SEXT48]], ptr @bl, align 8
2777 // CHECK:   [[TMP50:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2778 // CHECK:   [[TMP51:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
2779 // CHECK:   [[CMP49:%.*]] = icmp eq <2 x i64> [[TMP50]], [[TMP51]]
2780 // CHECK:   [[SEXT50:%.*]] = sext <2 x i1> [[CMP49]] to <2 x i64>
2781 // CHECK:   store volatile <2 x i64> [[SEXT50]], ptr @bl, align 8
2782 // CHECK:   [[TMP52:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
2783 // CHECK:   [[TMP53:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2784 // CHECK:   [[CMP51:%.*]] = icmp eq <2 x i64> [[TMP52]], [[TMP53]]
2785 // CHECK:   [[SEXT52:%.*]] = sext <2 x i1> [[CMP51]] to <2 x i64>
2786 // CHECK:   store volatile <2 x i64> [[SEXT52]], ptr @bl, align 8
2787 // CHECK:   [[TMP54:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
2788 // CHECK:   [[TMP55:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
2789 // CHECK:   [[CMP53:%.*]] = icmp eq <2 x i64> [[TMP54]], [[TMP55]]
2790 // CHECK:   [[SEXT54:%.*]] = sext <2 x i1> [[CMP53]] to <2 x i64>
2791 // CHECK:   store volatile <2 x i64> [[SEXT54]], ptr @bl, align 8
2792 // CHECK:   [[TMP56:%.*]] = load volatile <2 x double>, ptr @fd, align 8
2793 // CHECK:   [[TMP57:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
2794 // CHECK:   [[CMP55:%.*]] = fcmp oeq <2 x double> [[TMP56]], [[TMP57]]
2795 // CHECK:   [[SEXT56:%.*]] = sext <2 x i1> [[CMP55]] to <2 x i64>
2796 // CHECK:   store volatile <2 x i64> [[SEXT56]], ptr @bl, align 8
2797 // CHECK:   ret void
2798 void test_cmpeq(void) {
2799
2800   bc = sc == sc2;
2801   bc = sc == bc2;
2802   bc = bc == sc2;
2803   bc = uc == uc2;
2804   bc = uc == bc2;
2805   bc = bc == uc2;
2806   bc = bc == bc2;
2807
2808   bs = ss == ss2;
2809   bs = ss == bs2;
2810   bs = bs == ss2;
2811   bs = us == us2;
2812   bs = us == bs2;
2813   bs = bs == us2;
2814   bs = bs == bs2;
2815
2816   bi = si == si2;
2817   bi = si == bi2;
2818   bi = bi == si2;
2819   bi = ui == ui2;
2820   bi = ui == bi2;
2821   bi = bi == ui2;
2822   bi = bi == bi2;
2823
2824   bl = sl == sl2;
2825   bl = sl == bl2;
2826   bl = bl == sl2;
2827   bl = ul == ul2;
2828   bl = ul == bl2;
2829   bl = bl == ul2;
2830   bl = bl == bl2;
2831
2832   bl = fd == fd2;
2833 }
2834
2835 // CHECK-LABEL: define{{.*}} void @test_cmpne() #0 {
2836 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2837 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2838 // CHECK:   [[CMP:%.*]] = icmp ne <16 x i8> [[TMP0]], [[TMP1]]
2839 // CHECK:   [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8>
2840 // CHECK:   store volatile <16 x i8> [[SEXT]], ptr @bc, align 8
2841 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
2842 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
2843 // CHECK:   [[CMP1:%.*]] = icmp ne <16 x i8> [[TMP2]], [[TMP3]]
2844 // CHECK:   [[SEXT2:%.*]] = sext <16 x i1> [[CMP1]] to <16 x i8>
2845 // CHECK:   store volatile <16 x i8> [[SEXT2]], ptr @bc, align 8
2846 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
2847 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2848 // CHECK:   [[CMP3:%.*]] = icmp ne <16 x i8> [[TMP4]], [[TMP5]]
2849 // CHECK:   [[SEXT4:%.*]] = sext <16 x i1> [[CMP3]] to <16 x i8>
2850 // CHECK:   store volatile <16 x i8> [[SEXT4]], ptr @bc, align 8
2851 // CHECK:   [[TMP6:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2852 // CHECK:   [[TMP7:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
2853 // CHECK:   [[CMP5:%.*]] = icmp ne <16 x i8> [[TMP6]], [[TMP7]]
2854 // CHECK:   [[SEXT6:%.*]] = sext <16 x i1> [[CMP5]] to <16 x i8>
2855 // CHECK:   store volatile <16 x i8> [[SEXT6]], ptr @bc, align 8
2856 // CHECK:   [[TMP8:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
2857 // CHECK:   [[TMP9:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
2858 // CHECK:   [[CMP7:%.*]] = icmp ne <16 x i8> [[TMP8]], [[TMP9]]
2859 // CHECK:   [[SEXT8:%.*]] = sext <16 x i1> [[CMP7]] to <16 x i8>
2860 // CHECK:   store volatile <16 x i8> [[SEXT8]], ptr @bc, align 8
2861 // CHECK:   [[TMP10:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
2862 // CHECK:   [[TMP11:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
2863 // CHECK:   [[CMP9:%.*]] = icmp ne <16 x i8> [[TMP10]], [[TMP11]]
2864 // CHECK:   [[SEXT10:%.*]] = sext <16 x i1> [[CMP9]] to <16 x i8>
2865 // CHECK:   store volatile <16 x i8> [[SEXT10]], ptr @bc, align 8
2866 // CHECK:   [[TMP12:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
2867 // CHECK:   [[TMP13:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
2868 // CHECK:   [[CMP11:%.*]] = icmp ne <16 x i8> [[TMP12]], [[TMP13]]
2869 // CHECK:   [[SEXT12:%.*]] = sext <16 x i1> [[CMP11]] to <16 x i8>
2870 // CHECK:   store volatile <16 x i8> [[SEXT12]], ptr @bc, align 8
2871 // CHECK:   [[TMP14:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2872 // CHECK:   [[TMP15:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
2873 // CHECK:   [[CMP13:%.*]] = icmp ne <8 x i16> [[TMP14]], [[TMP15]]
2874 // CHECK:   [[SEXT14:%.*]] = sext <8 x i1> [[CMP13]] to <8 x i16>
2875 // CHECK:   store volatile <8 x i16> [[SEXT14]], ptr @bs, align 8
2876 // CHECK:   [[TMP16:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
2877 // CHECK:   [[TMP17:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
2878 // CHECK:   [[CMP15:%.*]] = icmp ne <8 x i16> [[TMP16]], [[TMP17]]
2879 // CHECK:   [[SEXT16:%.*]] = sext <8 x i1> [[CMP15]] to <8 x i16>
2880 // CHECK:   store volatile <8 x i16> [[SEXT16]], ptr @bs, align 8
2881 // CHECK:   [[TMP18:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
2882 // CHECK:   [[TMP19:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
2883 // CHECK:   [[CMP17:%.*]] = icmp ne <8 x i16> [[TMP18]], [[TMP19]]
2884 // CHECK:   [[SEXT18:%.*]] = sext <8 x i1> [[CMP17]] to <8 x i16>
2885 // CHECK:   store volatile <8 x i16> [[SEXT18]], ptr @bs, align 8
2886 // CHECK:   [[TMP20:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2887 // CHECK:   [[TMP21:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
2888 // CHECK:   [[CMP19:%.*]] = icmp ne <8 x i16> [[TMP20]], [[TMP21]]
2889 // CHECK:   [[SEXT20:%.*]] = sext <8 x i1> [[CMP19]] to <8 x i16>
2890 // CHECK:   store volatile <8 x i16> [[SEXT20]], ptr @bs, align 8
2891 // CHECK:   [[TMP22:%.*]] = load volatile <8 x i16>, ptr @us, align 8
2892 // CHECK:   [[TMP23:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
2893 // CHECK:   [[CMP21:%.*]] = icmp ne <8 x i16> [[TMP22]], [[TMP23]]
2894 // CHECK:   [[SEXT22:%.*]] = sext <8 x i1> [[CMP21]] to <8 x i16>
2895 // CHECK:   store volatile <8 x i16> [[SEXT22]], ptr @bs, align 8
2896 // CHECK:   [[TMP24:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
2897 // CHECK:   [[TMP25:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
2898 // CHECK:   [[CMP23:%.*]] = icmp ne <8 x i16> [[TMP24]], [[TMP25]]
2899 // CHECK:   [[SEXT24:%.*]] = sext <8 x i1> [[CMP23]] to <8 x i16>
2900 // CHECK:   store volatile <8 x i16> [[SEXT24]], ptr @bs, align 8
2901 // CHECK:   [[TMP26:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
2902 // CHECK:   [[TMP27:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
2903 // CHECK:   [[CMP25:%.*]] = icmp ne <8 x i16> [[TMP26]], [[TMP27]]
2904 // CHECK:   [[SEXT26:%.*]] = sext <8 x i1> [[CMP25]] to <8 x i16>
2905 // CHECK:   store volatile <8 x i16> [[SEXT26]], ptr @bs, align 8
2906 // CHECK:   [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2907 // CHECK:   [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2908 // CHECK:   [[CMP27:%.*]] = icmp ne <4 x i32> [[TMP28]], [[TMP29]]
2909 // CHECK:   [[SEXT28:%.*]] = sext <4 x i1> [[CMP27]] to <4 x i32>
2910 // CHECK:   store volatile <4 x i32> [[SEXT28]], ptr @bi, align 8
2911 // CHECK:   [[TMP30:%.*]] = load volatile <4 x i32>, ptr @si, align 8
2912 // CHECK:   [[TMP31:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
2913 // CHECK:   [[CMP29:%.*]] = icmp ne <4 x i32> [[TMP30]], [[TMP31]]
2914 // CHECK:   [[SEXT30:%.*]] = sext <4 x i1> [[CMP29]] to <4 x i32>
2915 // CHECK:   store volatile <4 x i32> [[SEXT30]], ptr @bi, align 8
2916 // CHECK:   [[TMP32:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
2917 // CHECK:   [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2918 // CHECK:   [[CMP31:%.*]] = icmp ne <4 x i32> [[TMP32]], [[TMP33]]
2919 // CHECK:   [[SEXT32:%.*]] = sext <4 x i1> [[CMP31]] to <4 x i32>
2920 // CHECK:   store volatile <4 x i32> [[SEXT32]], ptr @bi, align 8
2921 // CHECK:   [[TMP34:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2922 // CHECK:   [[TMP35:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2923 // CHECK:   [[CMP33:%.*]] = icmp ne <4 x i32> [[TMP34]], [[TMP35]]
2924 // CHECK:   [[SEXT34:%.*]] = sext <4 x i1> [[CMP33]] to <4 x i32>
2925 // CHECK:   store volatile <4 x i32> [[SEXT34]], ptr @bi, align 8
2926 // CHECK:   [[TMP36:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
2927 // CHECK:   [[TMP37:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
2928 // CHECK:   [[CMP35:%.*]] = icmp ne <4 x i32> [[TMP36]], [[TMP37]]
2929 // CHECK:   [[SEXT36:%.*]] = sext <4 x i1> [[CMP35]] to <4 x i32>
2930 // CHECK:   store volatile <4 x i32> [[SEXT36]], ptr @bi, align 8
2931 // CHECK:   [[TMP38:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
2932 // CHECK:   [[TMP39:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
2933 // CHECK:   [[CMP37:%.*]] = icmp ne <4 x i32> [[TMP38]], [[TMP39]]
2934 // CHECK:   [[SEXT38:%.*]] = sext <4 x i1> [[CMP37]] to <4 x i32>
2935 // CHECK:   store volatile <4 x i32> [[SEXT38]], ptr @bi, align 8
2936 // CHECK:   [[TMP40:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
2937 // CHECK:   [[TMP41:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
2938 // CHECK:   [[CMP39:%.*]] = icmp ne <4 x i32> [[TMP40]], [[TMP41]]
2939 // CHECK:   [[SEXT40:%.*]] = sext <4 x i1> [[CMP39]] to <4 x i32>
2940 // CHECK:   store volatile <4 x i32> [[SEXT40]], ptr @bi, align 8
2941 // CHECK:   [[TMP42:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2942 // CHECK:   [[TMP43:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2943 // CHECK:   [[CMP41:%.*]] = icmp ne <2 x i64> [[TMP42]], [[TMP43]]
2944 // CHECK:   [[SEXT42:%.*]] = sext <2 x i1> [[CMP41]] to <2 x i64>
2945 // CHECK:   store volatile <2 x i64> [[SEXT42]], ptr @bl, align 8
2946 // CHECK:   [[TMP44:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
2947 // CHECK:   [[TMP45:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
2948 // CHECK:   [[CMP43:%.*]] = icmp ne <2 x i64> [[TMP44]], [[TMP45]]
2949 // CHECK:   [[SEXT44:%.*]] = sext <2 x i1> [[CMP43]] to <2 x i64>
2950 // CHECK:   store volatile <2 x i64> [[SEXT44]], ptr @bl, align 8
2951 // CHECK:   [[TMP46:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
2952 // CHECK:   [[TMP47:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
2953 // CHECK:   [[CMP45:%.*]] = icmp ne <2 x i64> [[TMP46]], [[TMP47]]
2954 // CHECK:   [[SEXT46:%.*]] = sext <2 x i1> [[CMP45]] to <2 x i64>
2955 // CHECK:   store volatile <2 x i64> [[SEXT46]], ptr @bl, align 8
2956 // CHECK:   [[TMP48:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2957 // CHECK:   [[TMP49:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2958 // CHECK:   [[CMP47:%.*]] = icmp ne <2 x i64> [[TMP48]], [[TMP49]]
2959 // CHECK:   [[SEXT48:%.*]] = sext <2 x i1> [[CMP47]] to <2 x i64>
2960 // CHECK:   store volatile <2 x i64> [[SEXT48]], ptr @bl, align 8
2961 // CHECK:   [[TMP50:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
2962 // CHECK:   [[TMP51:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
2963 // CHECK:   [[CMP49:%.*]] = icmp ne <2 x i64> [[TMP50]], [[TMP51]]
2964 // CHECK:   [[SEXT50:%.*]] = sext <2 x i1> [[CMP49]] to <2 x i64>
2965 // CHECK:   store volatile <2 x i64> [[SEXT50]], ptr @bl, align 8
2966 // CHECK:   [[TMP52:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
2967 // CHECK:   [[TMP53:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
2968 // CHECK:   [[CMP51:%.*]] = icmp ne <2 x i64> [[TMP52]], [[TMP53]]
2969 // CHECK:   [[SEXT52:%.*]] = sext <2 x i1> [[CMP51]] to <2 x i64>
2970 // CHECK:   store volatile <2 x i64> [[SEXT52]], ptr @bl, align 8
2971 // CHECK:   [[TMP54:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
2972 // CHECK:   [[TMP55:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
2973 // CHECK:   [[CMP53:%.*]] = icmp ne <2 x i64> [[TMP54]], [[TMP55]]
2974 // CHECK:   [[SEXT54:%.*]] = sext <2 x i1> [[CMP53]] to <2 x i64>
2975 // CHECK:   store volatile <2 x i64> [[SEXT54]], ptr @bl, align 8
2976 // CHECK:   [[TMP56:%.*]] = load volatile <2 x double>, ptr @fd, align 8
2977 // CHECK:   [[TMP57:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
2978 // CHECK:   [[CMP55:%.*]] = fcmp une <2 x double> [[TMP56]], [[TMP57]]
2979 // CHECK:   [[SEXT56:%.*]] = sext <2 x i1> [[CMP55]] to <2 x i64>
2980 // CHECK:   store volatile <2 x i64> [[SEXT56]], ptr @bl, align 8
2981 // CHECK:   ret void
2982 void test_cmpne(void) {
2983
2984   bc = sc != sc2;
2985   bc = sc != bc2;
2986   bc = bc != sc2;
2987   bc = uc != uc2;
2988   bc = uc != bc2;
2989   bc = bc != uc2;
2990   bc = bc != bc2;
2991
2992   bs = ss != ss2;
2993   bs = ss != bs2;
2994   bs = bs != ss2;
2995   bs = us != us2;
2996   bs = us != bs2;
2997   bs = bs != us2;
2998   bs = bs != bs2;
2999
3000   bi = si != si2;
3001   bi = si != bi2;
3002   bi = bi != si2;
3003   bi = ui != ui2;
3004   bi = ui != bi2;
3005   bi = bi != ui2;
3006   bi = bi != bi2;
3007
3008   bl = sl != sl2;
3009   bl = sl != bl2;
3010   bl = bl != sl2;
3011   bl = ul != ul2;
3012   bl = ul != bl2;
3013   bl = bl != ul2;
3014   bl = bl != bl2;
3015
3016   bl = fd != fd2;
3017 }
3018
3019 // CHECK-LABEL: define{{.*}} void @test_cmpge() #0 {
3020 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
3021 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3022 // CHECK:   [[CMP:%.*]] = icmp sge <16 x i8> [[TMP0]], [[TMP1]]
3023 // CHECK:   [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8>
3024 // CHECK:   store volatile <16 x i8> [[SEXT]], ptr @bc, align 8
3025 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
3026 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
3027 // CHECK:   [[CMP1:%.*]] = icmp uge <16 x i8> [[TMP2]], [[TMP3]]
3028 // CHECK:   [[SEXT2:%.*]] = sext <16 x i1> [[CMP1]] to <16 x i8>
3029 // CHECK:   store volatile <16 x i8> [[SEXT2]], ptr @bc, align 8
3030 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
3031 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
3032 // CHECK:   [[CMP3:%.*]] = icmp uge <16 x i8> [[TMP4]], [[TMP5]]
3033 // CHECK:   [[SEXT4:%.*]] = sext <16 x i1> [[CMP3]] to <16 x i8>
3034 // CHECK:   store volatile <16 x i8> [[SEXT4]], ptr @bc, align 8
3035 // CHECK:   [[TMP6:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
3036 // CHECK:   [[TMP7:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
3037 // CHECK:   [[CMP5:%.*]] = icmp sge <8 x i16> [[TMP6]], [[TMP7]]
3038 // CHECK:   [[SEXT6:%.*]] = sext <8 x i1> [[CMP5]] to <8 x i16>
3039 // CHECK:   store volatile <8 x i16> [[SEXT6]], ptr @bs, align 8
3040 // CHECK:   [[TMP8:%.*]] = load volatile <8 x i16>, ptr @us, align 8
3041 // CHECK:   [[TMP9:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
3042 // CHECK:   [[CMP7:%.*]] = icmp uge <8 x i16> [[TMP8]], [[TMP9]]
3043 // CHECK:   [[SEXT8:%.*]] = sext <8 x i1> [[CMP7]] to <8 x i16>
3044 // CHECK:   store volatile <8 x i16> [[SEXT8]], ptr @bs, align 8
3045 // CHECK:   [[TMP10:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
3046 // CHECK:   [[TMP11:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
3047 // CHECK:   [[CMP9:%.*]] = icmp uge <8 x i16> [[TMP10]], [[TMP11]]
3048 // CHECK:   [[SEXT10:%.*]] = sext <8 x i1> [[CMP9]] to <8 x i16>
3049 // CHECK:   store volatile <8 x i16> [[SEXT10]], ptr @bs, align 8
3050 // CHECK:   [[TMP12:%.*]] = load volatile <4 x i32>, ptr @si, align 8
3051 // CHECK:   [[TMP13:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3052 // CHECK:   [[CMP11:%.*]] = icmp sge <4 x i32> [[TMP12]], [[TMP13]]
3053 // CHECK:   [[SEXT12:%.*]] = sext <4 x i1> [[CMP11]] to <4 x i32>
3054 // CHECK:   store volatile <4 x i32> [[SEXT12]], ptr @bi, align 8
3055 // CHECK:   [[TMP14:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
3056 // CHECK:   [[TMP15:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
3057 // CHECK:   [[CMP13:%.*]] = icmp uge <4 x i32> [[TMP14]], [[TMP15]]
3058 // CHECK:   [[SEXT14:%.*]] = sext <4 x i1> [[CMP13]] to <4 x i32>
3059 // CHECK:   store volatile <4 x i32> [[SEXT14]], ptr @bi, align 8
3060 // CHECK:   [[TMP16:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
3061 // CHECK:   [[TMP17:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
3062 // CHECK:   [[CMP15:%.*]] = icmp uge <4 x i32> [[TMP16]], [[TMP17]]
3063 // CHECK:   [[SEXT16:%.*]] = sext <4 x i1> [[CMP15]] to <4 x i32>
3064 // CHECK:   store volatile <4 x i32> [[SEXT16]], ptr @bi, align 8
3065 // CHECK:   [[TMP18:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
3066 // CHECK:   [[TMP19:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
3067 // CHECK:   [[CMP17:%.*]] = icmp sge <2 x i64> [[TMP18]], [[TMP19]]
3068 // CHECK:   [[SEXT18:%.*]] = sext <2 x i1> [[CMP17]] to <2 x i64>
3069 // CHECK:   store volatile <2 x i64> [[SEXT18]], ptr @bl, align 8
3070 // CHECK:   [[TMP20:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
3071 // CHECK:   [[TMP21:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
3072 // CHECK:   [[CMP19:%.*]] = icmp uge <2 x i64> [[TMP20]], [[TMP21]]
3073 // CHECK:   [[SEXT20:%.*]] = sext <2 x i1> [[CMP19]] to <2 x i64>
3074 // CHECK:   store volatile <2 x i64> [[SEXT20]], ptr @bl, align 8
3075 // CHECK:   [[TMP22:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
3076 // CHECK:   [[TMP23:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
3077 // CHECK:   [[CMP21:%.*]] = icmp uge <2 x i64> [[TMP22]], [[TMP23]]
3078 // CHECK:   [[SEXT22:%.*]] = sext <2 x i1> [[CMP21]] to <2 x i64>
3079 // CHECK:   store volatile <2 x i64> [[SEXT22]], ptr @bl, align 8
3080 // CHECK:   [[TMP24:%.*]] = load volatile <2 x double>, ptr @fd, align 8
3081 // CHECK:   [[TMP25:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
3082 // CHECK:   [[CMP23:%.*]] = fcmp oge <2 x double> [[TMP24]], [[TMP25]]
3083 // CHECK:   [[SEXT24:%.*]] = sext <2 x i1> [[CMP23]] to <2 x i64>
3084 // CHECK:   store volatile <2 x i64> [[SEXT24]], ptr @bl, align 8
3085 // CHECK:   ret void
3086 void test_cmpge(void) {
3087
3088   bc = sc >= sc2;
3089   bc = uc >= uc2;
3090   bc = bc >= bc2;
3091
3092   bs = ss >= ss2;
3093   bs = us >= us2;
3094   bs = bs >= bs2;
3095
3096   bi = si >= si2;
3097   bi = ui >= ui2;
3098   bi = bi >= bi2;
3099
3100   bl = sl >= sl2;
3101   bl = ul >= ul2;
3102   bl = bl >= bl2;
3103
3104   bl = fd >= fd2;
3105 }
3106
3107 // CHECK-LABEL: define{{.*}} void @test_cmpgt() #0 {
3108 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
3109 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3110 // CHECK:   [[CMP:%.*]] = icmp sgt <16 x i8> [[TMP0]], [[TMP1]]
3111 // CHECK:   [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8>
3112 // CHECK:   store volatile <16 x i8> [[SEXT]], ptr @bc, align 8
3113 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
3114 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
3115 // CHECK:   [[CMP1:%.*]] = icmp ugt <16 x i8> [[TMP2]], [[TMP3]]
3116 // CHECK:   [[SEXT2:%.*]] = sext <16 x i1> [[CMP1]] to <16 x i8>
3117 // CHECK:   store volatile <16 x i8> [[SEXT2]], ptr @bc, align 8
3118 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
3119 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
3120 // CHECK:   [[CMP3:%.*]] = icmp ugt <16 x i8> [[TMP4]], [[TMP5]]
3121 // CHECK:   [[SEXT4:%.*]] = sext <16 x i1> [[CMP3]] to <16 x i8>
3122 // CHECK:   store volatile <16 x i8> [[SEXT4]], ptr @bc, align 8
3123 // CHECK:   [[TMP6:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
3124 // CHECK:   [[TMP7:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
3125 // CHECK:   [[CMP5:%.*]] = icmp sgt <8 x i16> [[TMP6]], [[TMP7]]
3126 // CHECK:   [[SEXT6:%.*]] = sext <8 x i1> [[CMP5]] to <8 x i16>
3127 // CHECK:   store volatile <8 x i16> [[SEXT6]], ptr @bs, align 8
3128 // CHECK:   [[TMP8:%.*]] = load volatile <8 x i16>, ptr @us, align 8
3129 // CHECK:   [[TMP9:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
3130 // CHECK:   [[CMP7:%.*]] = icmp ugt <8 x i16> [[TMP8]], [[TMP9]]
3131 // CHECK:   [[SEXT8:%.*]] = sext <8 x i1> [[CMP7]] to <8 x i16>
3132 // CHECK:   store volatile <8 x i16> [[SEXT8]], ptr @bs, align 8
3133 // CHECK:   [[TMP10:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
3134 // CHECK:   [[TMP11:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
3135 // CHECK:   [[CMP9:%.*]] = icmp ugt <8 x i16> [[TMP10]], [[TMP11]]
3136 // CHECK:   [[SEXT10:%.*]] = sext <8 x i1> [[CMP9]] to <8 x i16>
3137 // CHECK:   store volatile <8 x i16> [[SEXT10]], ptr @bs, align 8
3138 // CHECK:   [[TMP12:%.*]] = load volatile <4 x i32>, ptr @si, align 8
3139 // CHECK:   [[TMP13:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3140 // CHECK:   [[CMP11:%.*]] = icmp sgt <4 x i32> [[TMP12]], [[TMP13]]
3141 // CHECK:   [[SEXT12:%.*]] = sext <4 x i1> [[CMP11]] to <4 x i32>
3142 // CHECK:   store volatile <4 x i32> [[SEXT12]], ptr @bi, align 8
3143 // CHECK:   [[TMP14:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
3144 // CHECK:   [[TMP15:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
3145 // CHECK:   [[CMP13:%.*]] = icmp ugt <4 x i32> [[TMP14]], [[TMP15]]
3146 // CHECK:   [[SEXT14:%.*]] = sext <4 x i1> [[CMP13]] to <4 x i32>
3147 // CHECK:   store volatile <4 x i32> [[SEXT14]], ptr @bi, align 8
3148 // CHECK:   [[TMP16:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
3149 // CHECK:   [[TMP17:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
3150 // CHECK:   [[CMP15:%.*]] = icmp ugt <4 x i32> [[TMP16]], [[TMP17]]
3151 // CHECK:   [[SEXT16:%.*]] = sext <4 x i1> [[CMP15]] to <4 x i32>
3152 // CHECK:   store volatile <4 x i32> [[SEXT16]], ptr @bi, align 8
3153 // CHECK:   [[TMP18:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
3154 // CHECK:   [[TMP19:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
3155 // CHECK:   [[CMP17:%.*]] = icmp sgt <2 x i64> [[TMP18]], [[TMP19]]
3156 // CHECK:   [[SEXT18:%.*]] = sext <2 x i1> [[CMP17]] to <2 x i64>
3157 // CHECK:   store volatile <2 x i64> [[SEXT18]], ptr @bl, align 8
3158 // CHECK:   [[TMP20:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
3159 // CHECK:   [[TMP21:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
3160 // CHECK:   [[CMP19:%.*]] = icmp ugt <2 x i64> [[TMP20]], [[TMP21]]
3161 // CHECK:   [[SEXT20:%.*]] = sext <2 x i1> [[CMP19]] to <2 x i64>
3162 // CHECK:   store volatile <2 x i64> [[SEXT20]], ptr @bl, align 8
3163 // CHECK:   [[TMP22:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
3164 // CHECK:   [[TMP23:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
3165 // CHECK:   [[CMP21:%.*]] = icmp ugt <2 x i64> [[TMP22]], [[TMP23]]
3166 // CHECK:   [[SEXT22:%.*]] = sext <2 x i1> [[CMP21]] to <2 x i64>
3167 // CHECK:   store volatile <2 x i64> [[SEXT22]], ptr @bl, align 8
3168 // CHECK:   [[TMP24:%.*]] = load volatile <2 x double>, ptr @fd, align 8
3169 // CHECK:   [[TMP25:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
3170 // CHECK:   [[CMP23:%.*]] = fcmp ogt <2 x double> [[TMP24]], [[TMP25]]
3171 // CHECK:   [[SEXT24:%.*]] = sext <2 x i1> [[CMP23]] to <2 x i64>
3172 // CHECK:   store volatile <2 x i64> [[SEXT24]], ptr @bl, align 8
3173 // CHECK:   ret void
3174 void test_cmpgt(void) {
3175
3176   bc = sc > sc2;
3177   bc = uc > uc2;
3178   bc = bc > bc2;
3179
3180   bs = ss > ss2;
3181   bs = us > us2;
3182   bs = bs > bs2;
3183
3184   bi = si > si2;
3185   bi = ui > ui2;
3186   bi = bi > bi2;
3187
3188   bl = sl > sl2;
3189   bl = ul > ul2;
3190   bl = bl > bl2;
3191
3192   bl = fd > fd2;
3193 }
3194
3195 // CHECK-LABEL: define{{.*}} void @test_cmple() #0 {
3196 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
3197 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3198 // CHECK:   [[CMP:%.*]] = icmp sle <16 x i8> [[TMP0]], [[TMP1]]
3199 // CHECK:   [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8>
3200 // CHECK:   store volatile <16 x i8> [[SEXT]], ptr @bc, align 8
3201 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
3202 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
3203 // CHECK:   [[CMP1:%.*]] = icmp ule <16 x i8> [[TMP2]], [[TMP3]]
3204 // CHECK:   [[SEXT2:%.*]] = sext <16 x i1> [[CMP1]] to <16 x i8>
3205 // CHECK:   store volatile <16 x i8> [[SEXT2]], ptr @bc, align 8
3206 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
3207 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
3208 // CHECK:   [[CMP3:%.*]] = icmp ule <16 x i8> [[TMP4]], [[TMP5]]
3209 // CHECK:   [[SEXT4:%.*]] = sext <16 x i1> [[CMP3]] to <16 x i8>
3210 // CHECK:   store volatile <16 x i8> [[SEXT4]], ptr @bc, align 8
3211 // CHECK:   [[TMP6:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
3212 // CHECK:   [[TMP7:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
3213 // CHECK:   [[CMP5:%.*]] = icmp sle <8 x i16> [[TMP6]], [[TMP7]]
3214 // CHECK:   [[SEXT6:%.*]] = sext <8 x i1> [[CMP5]] to <8 x i16>
3215 // CHECK:   store volatile <8 x i16> [[SEXT6]], ptr @bs, align 8
3216 // CHECK:   [[TMP8:%.*]] = load volatile <8 x i16>, ptr @us, align 8
3217 // CHECK:   [[TMP9:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
3218 // CHECK:   [[CMP7:%.*]] = icmp ule <8 x i16> [[TMP8]], [[TMP9]]
3219 // CHECK:   [[SEXT8:%.*]] = sext <8 x i1> [[CMP7]] to <8 x i16>
3220 // CHECK:   store volatile <8 x i16> [[SEXT8]], ptr @bs, align 8
3221 // CHECK:   [[TMP10:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
3222 // CHECK:   [[TMP11:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
3223 // CHECK:   [[CMP9:%.*]] = icmp ule <8 x i16> [[TMP10]], [[TMP11]]
3224 // CHECK:   [[SEXT10:%.*]] = sext <8 x i1> [[CMP9]] to <8 x i16>
3225 // CHECK:   store volatile <8 x i16> [[SEXT10]], ptr @bs, align 8
3226 // CHECK:   [[TMP12:%.*]] = load volatile <4 x i32>, ptr @si, align 8
3227 // CHECK:   [[TMP13:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3228 // CHECK:   [[CMP11:%.*]] = icmp sle <4 x i32> [[TMP12]], [[TMP13]]
3229 // CHECK:   [[SEXT12:%.*]] = sext <4 x i1> [[CMP11]] to <4 x i32>
3230 // CHECK:   store volatile <4 x i32> [[SEXT12]], ptr @bi, align 8
3231 // CHECK:   [[TMP14:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
3232 // CHECK:   [[TMP15:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
3233 // CHECK:   [[CMP13:%.*]] = icmp ule <4 x i32> [[TMP14]], [[TMP15]]
3234 // CHECK:   [[SEXT14:%.*]] = sext <4 x i1> [[CMP13]] to <4 x i32>
3235 // CHECK:   store volatile <4 x i32> [[SEXT14]], ptr @bi, align 8
3236 // CHECK:   [[TMP16:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
3237 // CHECK:   [[TMP17:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
3238 // CHECK:   [[CMP15:%.*]] = icmp ule <4 x i32> [[TMP16]], [[TMP17]]
3239 // CHECK:   [[SEXT16:%.*]] = sext <4 x i1> [[CMP15]] to <4 x i32>
3240 // CHECK:   store volatile <4 x i32> [[SEXT16]], ptr @bi, align 8
3241 // CHECK:   [[TMP18:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
3242 // CHECK:   [[TMP19:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
3243 // CHECK:   [[CMP17:%.*]] = icmp sle <2 x i64> [[TMP18]], [[TMP19]]
3244 // CHECK:   [[SEXT18:%.*]] = sext <2 x i1> [[CMP17]] to <2 x i64>
3245 // CHECK:   store volatile <2 x i64> [[SEXT18]], ptr @bl, align 8
3246 // CHECK:   [[TMP20:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
3247 // CHECK:   [[TMP21:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
3248 // CHECK:   [[CMP19:%.*]] = icmp ule <2 x i64> [[TMP20]], [[TMP21]]
3249 // CHECK:   [[SEXT20:%.*]] = sext <2 x i1> [[CMP19]] to <2 x i64>
3250 // CHECK:   store volatile <2 x i64> [[SEXT20]], ptr @bl, align 8
3251 // CHECK:   [[TMP22:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
3252 // CHECK:   [[TMP23:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
3253 // CHECK:   [[CMP21:%.*]] = icmp ule <2 x i64> [[TMP22]], [[TMP23]]
3254 // CHECK:   [[SEXT22:%.*]] = sext <2 x i1> [[CMP21]] to <2 x i64>
3255 // CHECK:   store volatile <2 x i64> [[SEXT22]], ptr @bl, align 8
3256 // CHECK:   [[TMP24:%.*]] = load volatile <2 x double>, ptr @fd, align 8
3257 // CHECK:   [[TMP25:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
3258 // CHECK:   [[CMP23:%.*]] = fcmp ole <2 x double> [[TMP24]], [[TMP25]]
3259 // CHECK:   [[SEXT24:%.*]] = sext <2 x i1> [[CMP23]] to <2 x i64>
3260 // CHECK:   store volatile <2 x i64> [[SEXT24]], ptr @bl, align 8
3261 // CHECK:   ret void
3262 void test_cmple(void) {
3263
3264   bc = sc <= sc2;
3265   bc = uc <= uc2;
3266   bc = bc <= bc2;
3267
3268   bs = ss <= ss2;
3269   bs = us <= us2;
3270   bs = bs <= bs2;
3271
3272   bi = si <= si2;
3273   bi = ui <= ui2;
3274   bi = bi <= bi2;
3275
3276   bl = sl <= sl2;
3277   bl = ul <= ul2;
3278   bl = bl <= bl2;
3279
3280   bl = fd <= fd2;
3281 }
3282
3283 // CHECK-LABEL: define{{.*}} void @test_cmplt() #0 {
3284 // CHECK:   [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc, align 8
3285 // CHECK:   [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3286 // CHECK:   [[CMP:%.*]] = icmp slt <16 x i8> [[TMP0]], [[TMP1]]
3287 // CHECK:   [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8>
3288 // CHECK:   store volatile <16 x i8> [[SEXT]], ptr @bc, align 8
3289 // CHECK:   [[TMP2:%.*]] = load volatile <16 x i8>, ptr @uc, align 8
3290 // CHECK:   [[TMP3:%.*]] = load volatile <16 x i8>, ptr @uc2, align 8
3291 // CHECK:   [[CMP1:%.*]] = icmp ult <16 x i8> [[TMP2]], [[TMP3]]
3292 // CHECK:   [[SEXT2:%.*]] = sext <16 x i1> [[CMP1]] to <16 x i8>
3293 // CHECK:   store volatile <16 x i8> [[SEXT2]], ptr @bc, align 8
3294 // CHECK:   [[TMP4:%.*]] = load volatile <16 x i8>, ptr @bc, align 8
3295 // CHECK:   [[TMP5:%.*]] = load volatile <16 x i8>, ptr @bc2, align 8
3296 // CHECK:   [[CMP3:%.*]] = icmp ult <16 x i8> [[TMP4]], [[TMP5]]
3297 // CHECK:   [[SEXT4:%.*]] = sext <16 x i1> [[CMP3]] to <16 x i8>
3298 // CHECK:   store volatile <16 x i8> [[SEXT4]], ptr @bc, align 8
3299 // CHECK:   [[TMP6:%.*]] = load volatile <8 x i16>, ptr @ss, align 8
3300 // CHECK:   [[TMP7:%.*]] = load volatile <8 x i16>, ptr @ss2, align 8
3301 // CHECK:   [[CMP5:%.*]] = icmp slt <8 x i16> [[TMP6]], [[TMP7]]
3302 // CHECK:   [[SEXT6:%.*]] = sext <8 x i1> [[CMP5]] to <8 x i16>
3303 // CHECK:   store volatile <8 x i16> [[SEXT6]], ptr @bs, align 8
3304 // CHECK:   [[TMP8:%.*]] = load volatile <8 x i16>, ptr @us, align 8
3305 // CHECK:   [[TMP9:%.*]] = load volatile <8 x i16>, ptr @us2, align 8
3306 // CHECK:   [[CMP7:%.*]] = icmp ult <8 x i16> [[TMP8]], [[TMP9]]
3307 // CHECK:   [[SEXT8:%.*]] = sext <8 x i1> [[CMP7]] to <8 x i16>
3308 // CHECK:   store volatile <8 x i16> [[SEXT8]], ptr @bs, align 8
3309 // CHECK:   [[TMP10:%.*]] = load volatile <8 x i16>, ptr @bs, align 8
3310 // CHECK:   [[TMP11:%.*]] = load volatile <8 x i16>, ptr @bs2, align 8
3311 // CHECK:   [[CMP9:%.*]] = icmp ult <8 x i16> [[TMP10]], [[TMP11]]
3312 // CHECK:   [[SEXT10:%.*]] = sext <8 x i1> [[CMP9]] to <8 x i16>
3313 // CHECK:   store volatile <8 x i16> [[SEXT10]], ptr @bs, align 8
3314 // CHECK:   [[TMP12:%.*]] = load volatile <4 x i32>, ptr @si, align 8
3315 // CHECK:   [[TMP13:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3316 // CHECK:   [[CMP11:%.*]] = icmp slt <4 x i32> [[TMP12]], [[TMP13]]
3317 // CHECK:   [[SEXT12:%.*]] = sext <4 x i1> [[CMP11]] to <4 x i32>
3318 // CHECK:   store volatile <4 x i32> [[SEXT12]], ptr @bi, align 8
3319 // CHECK:   [[TMP14:%.*]] = load volatile <4 x i32>, ptr @ui, align 8
3320 // CHECK:   [[TMP15:%.*]] = load volatile <4 x i32>, ptr @ui2, align 8
3321 // CHECK:   [[CMP13:%.*]] = icmp ult <4 x i32> [[TMP14]], [[TMP15]]
3322 // CHECK:   [[SEXT14:%.*]] = sext <4 x i1> [[CMP13]] to <4 x i32>
3323 // CHECK:   store volatile <4 x i32> [[SEXT14]], ptr @bi, align 8
3324 // CHECK:   [[TMP16:%.*]] = load volatile <4 x i32>, ptr @bi, align 8
3325 // CHECK:   [[TMP17:%.*]] = load volatile <4 x i32>, ptr @bi2, align 8
3326 // CHECK:   [[CMP15:%.*]] = icmp ult <4 x i32> [[TMP16]], [[TMP17]]
3327 // CHECK:   [[SEXT16:%.*]] = sext <4 x i1> [[CMP15]] to <4 x i32>
3328 // CHECK:   store volatile <4 x i32> [[SEXT16]], ptr @bi, align 8
3329 // CHECK:   [[TMP18:%.*]] = load volatile <2 x i64>, ptr @sl, align 8
3330 // CHECK:   [[TMP19:%.*]] = load volatile <2 x i64>, ptr @sl2, align 8
3331 // CHECK:   [[CMP17:%.*]] = icmp slt <2 x i64> [[TMP18]], [[TMP19]]
3332 // CHECK:   [[SEXT18:%.*]] = sext <2 x i1> [[CMP17]] to <2 x i64>
3333 // CHECK:   store volatile <2 x i64> [[SEXT18]], ptr @bl, align 8
3334 // CHECK:   [[TMP20:%.*]] = load volatile <2 x i64>, ptr @ul, align 8
3335 // CHECK:   [[TMP21:%.*]] = load volatile <2 x i64>, ptr @ul2, align 8
3336 // CHECK:   [[CMP19:%.*]] = icmp ult <2 x i64> [[TMP20]], [[TMP21]]
3337 // CHECK:   [[SEXT20:%.*]] = sext <2 x i1> [[CMP19]] to <2 x i64>
3338 // CHECK:   store volatile <2 x i64> [[SEXT20]], ptr @bl, align 8
3339 // CHECK:   [[TMP22:%.*]] = load volatile <2 x i64>, ptr @bl, align 8
3340 // CHECK:   [[TMP23:%.*]] = load volatile <2 x i64>, ptr @bl2, align 8
3341 // CHECK:   [[CMP21:%.*]] = icmp ult <2 x i64> [[TMP22]], [[TMP23]]
3342 // CHECK:   [[SEXT22:%.*]] = sext <2 x i1> [[CMP21]] to <2 x i64>
3343 // CHECK:   store volatile <2 x i64> [[SEXT22]], ptr @bl, align 8
3344 // CHECK:   [[TMP24:%.*]] = load volatile <2 x double>, ptr @fd, align 8
3345 // CHECK:   [[TMP25:%.*]] = load volatile <2 x double>, ptr @fd2, align 8
3346 // CHECK:   [[CMP23:%.*]] = fcmp olt <2 x double> [[TMP24]], [[TMP25]]
3347 // CHECK:   [[SEXT24:%.*]] = sext <2 x i1> [[CMP23]] to <2 x i64>
3348 // CHECK:   store volatile <2 x i64> [[SEXT24]], ptr @bl, align 8
3349 // CHECK:   ret void
3350 void test_cmplt(void) {
3351
3352   bc = sc < sc2;
3353   bc = uc < uc2;
3354   bc = bc < bc2;
3355
3356   bs = ss < ss2;
3357   bs = us < us2;
3358   bs = bs < bs2;
3359
3360   bi = si < si2;
3361   bi = ui < ui2;
3362   bi = bi < bi2;
3363
3364   bl = sl < sl2;
3365   bl = ul < ul2;
3366   bl = bl < bl2;
3367
3368   bl = fd < fd2;
3369 }
3370