clang/test/CodeGen/X86/avx-cmp-builtins.c

   1 // RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -O3 -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - | FileCheck %s
   2 // RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -O3 -triple=i386-apple-darwin -target-feature +avx -emit-llvm -o - | FileCheck %s
   3 // FIXME: The shufflevector instructions in test_cmpgt_sd are relying on O3 here.
   4
   5
   6 #include <immintrin.h>
   7
   8 //
   9 // Test LLVM IR codegen of cmpXY instructions
  10 //
  11
  12 __m128d test_cmp_sd(__m128d a, __m128d b) {
  13   // Expects that the third argument in LLVM IR is immediate expression
  14   // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 13)
  15   return _mm_cmp_sd(a, b, _CMP_GE_OS);
  16 }
  17
  18 __m128 test_cmp_ss(__m128 a, __m128 b) {
  19   // Expects that the third argument in LLVM IR is immediate expression
  20   // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 13)
  21   return _mm_cmp_ss(a, b, _CMP_GE_OS);
  22 }
  23
  24 __m128 test_cmpgt_ss(__m128 a, __m128 b) {
  25   // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 1)
  26   // CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
  27   return _mm_cmpgt_ss(a, b);
  28 }
  29
  30 __m128 test_cmpge_ss(__m128 a, __m128 b) {
  31   // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 2)
  32   // CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
  33   return _mm_cmpge_ss(a, b);
  34 }
  35
  36 __m128 test_cmpngt_ss(__m128 a, __m128 b) {
  37   // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 5)
  38   // CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
  39   return _mm_cmpngt_ss(a, b);
  40 }
  41
  42 __m128 test_cmpnge_ss(__m128 a, __m128 b) {
  43   // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 6)
  44   // CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
  45   return _mm_cmpnge_ss(a, b);
  46 }
  47
  48 __m128d test_cmpgt_sd(__m128d a, __m128d b) {
  49   // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 1)
  50   // CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
  51   return _mm_cmpgt_sd(a, b);
  52 }
  53
  54 __m128d test_cmpge_sd(__m128d a, __m128d b) {
  55   // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 2)
  56   // CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
  57   return _mm_cmpge_sd(a, b);
  58 }
  59
  60 __m128d test_cmpngt_sd(__m128d a, __m128d b) {
  61   // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 5)
  62   // CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
  63   return _mm_cmpngt_sd(a, b);
  64 }
  65
  66 __m128d test_cmpnge_sd(__m128d a, __m128d b) {
  67   // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 6)
  68   // CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
  69   return _mm_cmpnge_sd(a, b);
  70 }