clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX
   5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s
   6
   7 #include <arm_sme_draft_spec_subject_to_change.h>
   8
   9 // CHECK-C-LABEL: define dso_local void @test_svstr_vnum_za(
  10 // CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
  11 // CHECK-C-NEXT:  entry:
  12 // CHECK-C-NEXT:    tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE]], ptr [[PTR]])
  13 // CHECK-C-NEXT:    ret void
  14 //
  15 // CHECK-CXX-LABEL: define dso_local void @_Z18test_svstr_vnum_zajPv(
  16 // CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
  17 // CHECK-CXX-NEXT:  entry:
  18 // CHECK-CXX-NEXT:    tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE]], ptr [[PTR]])
  19 // CHECK-CXX-NEXT:    ret void
  20 //
  21 void test_svstr_vnum_za(uint32_t slice_base, void *ptr) {
  22   svstr_vnum_za(slice_base, ptr, 0);
  23 }
  24
  25 // CHECK-C-LABEL: define dso_local void @test_svstr_vnum_za_1(
  26 // CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] {
  27 // CHECK-C-NEXT:  entry:
  28 // CHECK-C-NEXT:    [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
  29 // CHECK-C-NEXT:    [[MULVL:%.*]] = mul i64 [[SVLB]], 15
  30 // CHECK-C-NEXT:    [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]]
  31 // CHECK-C-NEXT:    [[TILESLICE:%.*]] = add i32 [[SLICE_BASE]], 15
  32 // CHECK-C-NEXT:    tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]])
  33 // CHECK-C-NEXT:    ret void
  34 //
  35 // CHECK-CXX-LABEL: define dso_local void @_Z20test_svstr_vnum_za_1jPv(
  36 // CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] {
  37 // CHECK-CXX-NEXT:  entry:
  38 // CHECK-CXX-NEXT:    [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
  39 // CHECK-CXX-NEXT:    [[MULVL:%.*]] = mul i64 [[SVLB]], 15
  40 // CHECK-CXX-NEXT:    [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]]
  41 // CHECK-CXX-NEXT:    [[TILESLICE:%.*]] = add i32 [[SLICE_BASE]], 15
  42 // CHECK-CXX-NEXT:    tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]])
  43 // CHECK-CXX-NEXT:    ret void
  44 //
  45 void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) {
  46   svstr_vnum_za(slice_base, ptr, 15);
  47 }
  48
  49 // CHECK-C-LABEL: define dso_local void @test_svstr_za(
  50 // CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] {
  51 // CHECK-C-NEXT:  entry:
  52 // CHECK-C-NEXT:    tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE]], ptr [[PTR]])
  53 // CHECK-C-NEXT:    ret void
  54 //
  55 // CHECK-CXX-LABEL: define dso_local void @_Z13test_svstr_zajPv(
  56 // CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] {
  57 // CHECK-CXX-NEXT:  entry:
  58 // CHECK-CXX-NEXT:    tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE]], ptr [[PTR]])
  59 // CHECK-CXX-NEXT:    ret void
  60 //
  61 void test_svstr_za(uint32_t slice_base, void *ptr) {
  62   svstr_za(slice_base, ptr);
  63 }
  64
  65 // CHECK-C-LABEL: define dso_local void @test_svstr_vnum_za_var(
  66 // CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] {
  67 // CHECK-C-NEXT:  entry:
  68 // CHECK-C-NEXT:    [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
  69 // CHECK-C-NEXT:    [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM]]
  70 // CHECK-C-NEXT:    [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]]
  71 // CHECK-C-NEXT:    [[TMP1:%.*]] = trunc i64 [[VNUM]] to i32
  72 // CHECK-C-NEXT:    [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE]]
  73 // CHECK-C-NEXT:    tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]])
  74 // CHECK-C-NEXT:    ret void
  75 //
  76 // CHECK-CXX-LABEL: define dso_local void @_Z22test_svstr_vnum_za_varjPvl(
  77 // CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] {
  78 // CHECK-CXX-NEXT:  entry:
  79 // CHECK-CXX-NEXT:    [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
  80 // CHECK-CXX-NEXT:    [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM]]
  81 // CHECK-CXX-NEXT:    [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]]
  82 // CHECK-CXX-NEXT:    [[TMP1:%.*]] = trunc i64 [[VNUM]] to i32
  83 // CHECK-CXX-NEXT:    [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE]]
  84 // CHECK-CXX-NEXT:    tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]])
  85 // CHECK-CXX-NEXT:    ret void
  86 //
  87 void test_svstr_vnum_za_var(uint32_t slice_base, void *ptr, int64_t vnum) {
  88   svstr_vnum_za(slice_base, ptr, vnum);
  89 }
  90 //// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
  91 // CHECK: {{.*}}