clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   7 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   8 #include <arm_sve.h>
   9
  10 #ifdef SVE_OVERLOADED_FORMS
  11 // A simple used,unused... macro, long enough to represent any SVE builtin.
  12 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
  13 #else
  14 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
  15 #endif
  16
  17 // CHECK-LABEL: @test_svclz_s8_z(
  18 // CHECK-NEXT:  entry:
  19 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  20 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  21 //
  22 // CPP-CHECK-LABEL: @_Z15test_svclz_s8_zu10__SVBool_tu10__SVInt8_t(
  23 // CPP-CHECK-NEXT:  entry:
  24 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  25 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  26 //
  27 svuint8_t test_svclz_s8_z(svbool_t pg, svint8_t op)
  28 {
  29   return SVE_ACLE_FUNC(svclz,_s8,_z,)(pg, op);
  30 }
  31
  32 // CHECK-LABEL: @test_svclz_s16_z(
  33 // CHECK-NEXT:  entry:
  34 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  35 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
  36 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  37 //
  38 // CPP-CHECK-LABEL: @_Z16test_svclz_s16_zu10__SVBool_tu11__SVInt16_t(
  39 // CPP-CHECK-NEXT:  entry:
  40 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  41 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
  42 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  43 //
  44 svuint16_t test_svclz_s16_z(svbool_t pg, svint16_t op)
  45 {
  46   return SVE_ACLE_FUNC(svclz,_s16,_z,)(pg, op);
  47 }
  48
  49 // CHECK-LABEL: @test_svclz_s32_z(
  50 // CHECK-NEXT:  entry:
  51 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  52 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
  53 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  54 //
  55 // CPP-CHECK-LABEL: @_Z16test_svclz_s32_zu10__SVBool_tu11__SVInt32_t(
  56 // CPP-CHECK-NEXT:  entry:
  57 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  58 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
  59 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  60 //
  61 svuint32_t test_svclz_s32_z(svbool_t pg, svint32_t op)
  62 {
  63   return SVE_ACLE_FUNC(svclz,_s32,_z,)(pg, op);
  64 }
  65
  66 // CHECK-LABEL: @test_svclz_s64_z(
  67 // CHECK-NEXT:  entry:
  68 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  69 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
  70 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
  71 //
  72 // CPP-CHECK-LABEL: @_Z16test_svclz_s64_zu10__SVBool_tu11__SVInt64_t(
  73 // CPP-CHECK-NEXT:  entry:
  74 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  75 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
  76 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
  77 //
  78 svuint64_t test_svclz_s64_z(svbool_t pg, svint64_t op)
  79 {
  80   return SVE_ACLE_FUNC(svclz,_s64,_z,)(pg, op);
  81 }
  82
  83 // CHECK-LABEL: @test_svclz_u8_z(
  84 // CHECK-NEXT:  entry:
  85 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  86 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  87 //
  88 // CPP-CHECK-LABEL: @_Z15test_svclz_u8_zu10__SVBool_tu11__SVUint8_t(
  89 // CPP-CHECK-NEXT:  entry:
  90 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  91 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  92 //
  93 svuint8_t test_svclz_u8_z(svbool_t pg, svuint8_t op)
  94 {
  95   return SVE_ACLE_FUNC(svclz,_u8,_z,)(pg, op);
  96 }
  97
  98 // CHECK-LABEL: @test_svclz_u16_z(
  99 // CHECK-NEXT:  entry:
 100 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 101 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 102 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 103 //
 104 // CPP-CHECK-LABEL: @_Z16test_svclz_u16_zu10__SVBool_tu12__SVUint16_t(
 105 // CPP-CHECK-NEXT:  entry:
 106 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 107 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 108 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 109 //
 110 svuint16_t test_svclz_u16_z(svbool_t pg, svuint16_t op)
 111 {
 112   return SVE_ACLE_FUNC(svclz,_u16,_z,)(pg, op);
 113 }
 114
 115 // CHECK-LABEL: @test_svclz_u32_z(
 116 // CHECK-NEXT:  entry:
 117 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 118 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 119 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 120 //
 121 // CPP-CHECK-LABEL: @_Z16test_svclz_u32_zu10__SVBool_tu12__SVUint32_t(
 122 // CPP-CHECK-NEXT:  entry:
 123 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 124 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 125 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 126 //
 127 svuint32_t test_svclz_u32_z(svbool_t pg, svuint32_t op)
 128 {
 129   return SVE_ACLE_FUNC(svclz,_u32,_z,)(pg, op);
 130 }
 131
 132 // CHECK-LABEL: @test_svclz_u64_z(
 133 // CHECK-NEXT:  entry:
 134 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 135 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 136 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 137 //
 138 // CPP-CHECK-LABEL: @_Z16test_svclz_u64_zu10__SVBool_tu12__SVUint64_t(
 139 // CPP-CHECK-NEXT:  entry:
 140 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 141 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 142 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 143 //
 144 svuint64_t test_svclz_u64_z(svbool_t pg, svuint64_t op)
 145 {
 146   return SVE_ACLE_FUNC(svclz,_u64,_z,)(pg, op);
 147 }
 148
 149 // CHECK-LABEL: @test_svclz_s8_m(
 150 // CHECK-NEXT:  entry:
 151 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 152 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 153 //
 154 // CPP-CHECK-LABEL: @_Z15test_svclz_s8_mu11__SVUint8_tu10__SVBool_tu10__SVInt8_t(
 155 // CPP-CHECK-NEXT:  entry:
 156 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 157 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 158 //
 159 svuint8_t test_svclz_s8_m(svuint8_t inactive, svbool_t pg, svint8_t op)
 160 {
 161   return SVE_ACLE_FUNC(svclz,_s8,_m,)(inactive, pg, op);
 162 }
 163
 164 // CHECK-LABEL: @test_svclz_s16_m(
 165 // CHECK-NEXT:  entry:
 166 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 167 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 168 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 169 //
 170 // CPP-CHECK-LABEL: @_Z16test_svclz_s16_mu12__SVUint16_tu10__SVBool_tu11__SVInt16_t(
 171 // CPP-CHECK-NEXT:  entry:
 172 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 173 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 174 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 175 //
 176 svuint16_t test_svclz_s16_m(svuint16_t inactive, svbool_t pg, svint16_t op)
 177 {
 178   return SVE_ACLE_FUNC(svclz,_s16,_m,)(inactive, pg, op);
 179 }
 180
 181 // CHECK-LABEL: @test_svclz_s32_m(
 182 // CHECK-NEXT:  entry:
 183 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 184 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 185 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 186 //
 187 // CPP-CHECK-LABEL: @_Z16test_svclz_s32_mu12__SVUint32_tu10__SVBool_tu11__SVInt32_t(
 188 // CPP-CHECK-NEXT:  entry:
 189 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 190 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 191 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 192 //
 193 svuint32_t test_svclz_s32_m(svuint32_t inactive, svbool_t pg, svint32_t op)
 194 {
 195   return SVE_ACLE_FUNC(svclz,_s32,_m,)(inactive, pg, op);
 196 }
 197
 198 // CHECK-LABEL: @test_svclz_s64_m(
 199 // CHECK-NEXT:  entry:
 200 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 201 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 202 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 203 //
 204 // CPP-CHECK-LABEL: @_Z16test_svclz_s64_mu12__SVUint64_tu10__SVBool_tu11__SVInt64_t(
 205 // CPP-CHECK-NEXT:  entry:
 206 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 207 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 208 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 209 //
 210 svuint64_t test_svclz_s64_m(svuint64_t inactive, svbool_t pg, svint64_t op)
 211 {
 212   return SVE_ACLE_FUNC(svclz,_s64,_m,)(inactive, pg, op);
 213 }
 214
 215 // CHECK-LABEL: @test_svclz_u8_m(
 216 // CHECK-NEXT:  entry:
 217 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 218 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 219 //
 220 // CPP-CHECK-LABEL: @_Z15test_svclz_u8_mu11__SVUint8_tu10__SVBool_tS_(
 221 // CPP-CHECK-NEXT:  entry:
 222 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 223 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 224 //
 225 svuint8_t test_svclz_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op)
 226 {
 227   return SVE_ACLE_FUNC(svclz,_u8,_m,)(inactive, pg, op);
 228 }
 229
 230 // CHECK-LABEL: @test_svclz_u16_m(
 231 // CHECK-NEXT:  entry:
 232 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 233 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 234 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 235 //
 236 // CPP-CHECK-LABEL: @_Z16test_svclz_u16_mu12__SVUint16_tu10__SVBool_tS_(
 237 // CPP-CHECK-NEXT:  entry:
 238 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 239 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 240 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 241 //
 242 svuint16_t test_svclz_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op)
 243 {
 244   return SVE_ACLE_FUNC(svclz,_u16,_m,)(inactive, pg, op);
 245 }
 246
 247 // CHECK-LABEL: @test_svclz_u32_m(
 248 // CHECK-NEXT:  entry:
 249 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 250 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 251 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 252 //
 253 // CPP-CHECK-LABEL: @_Z16test_svclz_u32_mu12__SVUint32_tu10__SVBool_tS_(
 254 // CPP-CHECK-NEXT:  entry:
 255 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 256 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 257 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 258 //
 259 svuint32_t test_svclz_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op)
 260 {
 261   return SVE_ACLE_FUNC(svclz,_u32,_m,)(inactive, pg, op);
 262 }
 263
 264 // CHECK-LABEL: @test_svclz_u64_m(
 265 // CHECK-NEXT:  entry:
 266 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 267 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 268 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 269 //
 270 // CPP-CHECK-LABEL: @_Z16test_svclz_u64_mu12__SVUint64_tu10__SVBool_tS_(
 271 // CPP-CHECK-NEXT:  entry:
 272 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 273 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 274 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 275 //
 276 svuint64_t test_svclz_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op)
 277 {
 278   return SVE_ACLE_FUNC(svclz,_u64,_m,)(inactive, pg, op);
 279 }
 280
 281 // CHECK-LABEL: @test_svclz_s8_x(
 282 // CHECK-NEXT:  entry:
 283 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 284 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 285 //
 286 // CPP-CHECK-LABEL: @_Z15test_svclz_s8_xu10__SVBool_tu10__SVInt8_t(
 287 // CPP-CHECK-NEXT:  entry:
 288 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 289 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 290 //
 291 svuint8_t test_svclz_s8_x(svbool_t pg, svint8_t op)
 292 {
 293   return SVE_ACLE_FUNC(svclz,_s8,_x,)(pg, op);
 294 }
 295
 296 // CHECK-LABEL: @test_svclz_s16_x(
 297 // CHECK-NEXT:  entry:
 298 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 299 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 300 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 301 //
 302 // CPP-CHECK-LABEL: @_Z16test_svclz_s16_xu10__SVBool_tu11__SVInt16_t(
 303 // CPP-CHECK-NEXT:  entry:
 304 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 305 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 306 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 307 //
 308 svuint16_t test_svclz_s16_x(svbool_t pg, svint16_t op)
 309 {
 310   return SVE_ACLE_FUNC(svclz,_s16,_x,)(pg, op);
 311 }
 312
 313 // CHECK-LABEL: @test_svclz_s32_x(
 314 // CHECK-NEXT:  entry:
 315 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 316 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 317 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 318 //
 319 // CPP-CHECK-LABEL: @_Z16test_svclz_s32_xu10__SVBool_tu11__SVInt32_t(
 320 // CPP-CHECK-NEXT:  entry:
 321 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 322 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 323 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 324 //
 325 svuint32_t test_svclz_s32_x(svbool_t pg, svint32_t op)
 326 {
 327   return SVE_ACLE_FUNC(svclz,_s32,_x,)(pg, op);
 328 }
 329
 330 // CHECK-LABEL: @test_svclz_s64_x(
 331 // CHECK-NEXT:  entry:
 332 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 333 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 334 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 335 //
 336 // CPP-CHECK-LABEL: @_Z16test_svclz_s64_xu10__SVBool_tu11__SVInt64_t(
 337 // CPP-CHECK-NEXT:  entry:
 338 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 339 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 340 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 341 //
 342 svuint64_t test_svclz_s64_x(svbool_t pg, svint64_t op)
 343 {
 344   return SVE_ACLE_FUNC(svclz,_s64,_x,)(pg, op);
 345 }
 346
 347 // CHECK-LABEL: @test_svclz_u8_x(
 348 // CHECK-NEXT:  entry:
 349 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 350 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 351 //
 352 // CPP-CHECK-LABEL: @_Z15test_svclz_u8_xu10__SVBool_tu11__SVUint8_t(
 353 // CPP-CHECK-NEXT:  entry:
 354 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.clz.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 355 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 356 //
 357 svuint8_t test_svclz_u8_x(svbool_t pg, svuint8_t op)
 358 {
 359   return SVE_ACLE_FUNC(svclz,_u8,_x,)(pg, op);
 360 }
 361
 362 // CHECK-LABEL: @test_svclz_u16_x(
 363 // CHECK-NEXT:  entry:
 364 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 365 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 366 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 367 //
 368 // CPP-CHECK-LABEL: @_Z16test_svclz_u16_xu10__SVBool_tu12__SVUint16_t(
 369 // CPP-CHECK-NEXT:  entry:
 370 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 371 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.clz.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 372 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 373 //
 374 svuint16_t test_svclz_u16_x(svbool_t pg, svuint16_t op)
 375 {
 376   return SVE_ACLE_FUNC(svclz,_u16,_x,)(pg, op);
 377 }
 378
 379 // CHECK-LABEL: @test_svclz_u32_x(
 380 // CHECK-NEXT:  entry:
 381 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 382 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 383 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 384 //
 385 // CPP-CHECK-LABEL: @_Z16test_svclz_u32_xu10__SVBool_tu12__SVUint32_t(
 386 // CPP-CHECK-NEXT:  entry:
 387 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 388 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.clz.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 389 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 390 //
 391 svuint32_t test_svclz_u32_x(svbool_t pg, svuint32_t op)
 392 {
 393   return SVE_ACLE_FUNC(svclz,_u32,_x,)(pg, op);
 394 }
 395
 396 // CHECK-LABEL: @test_svclz_u64_x(
 397 // CHECK-NEXT:  entry:
 398 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 399 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 400 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 401 //
 402 // CPP-CHECK-LABEL: @_Z16test_svclz_u64_xu10__SVBool_tu12__SVUint64_t(
 403 // CPP-CHECK-NEXT:  entry:
 404 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 405 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.clz.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 406 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 407 //
 408 svuint64_t test_svclz_u64_x(svbool_t pg, svuint64_t op)
 409 {
 410   return SVE_ACLE_FUNC(svclz,_u64,_x,)(pg, op);
 411 }