clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   6 #include <arm_sve.h>
   7
   8 // CHECK-LABEL: @test_svcntd(
   9 // CHECK-NEXT:  entry:
  10 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
  11 // CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
  12 // CHECK-NEXT:    ret i64 [[TMP1]]
  13 //
  14 // CPP-CHECK-LABEL: @_Z11test_svcntdv(
  15 // CPP-CHECK-NEXT:  entry:
  16 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
  17 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
  18 // CPP-CHECK-NEXT:    ret i64 [[TMP1]]
  19 //
  20 uint64_t test_svcntd()
  21 {
  22   return svcntd();
  23 }
  24
  25 // CHECK-LABEL: @test_svcntd_pat(
  26 // CHECK-NEXT:  entry:
  27 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 0)
  28 // CHECK-NEXT:    ret i64 [[TMP0]]
  29 //
  30 // CPP-CHECK-LABEL: @_Z15test_svcntd_patv(
  31 // CPP-CHECK-NEXT:  entry:
  32 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 0)
  33 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  34 //
  35 uint64_t test_svcntd_pat()
  36 {
  37   return svcntd_pat(SV_POW2);
  38 }
  39
  40 // CHECK-LABEL: @test_svcntd_pat_1(
  41 // CHECK-NEXT:  entry:
  42 // CHECK-NEXT:    ret i64 1
  43 //
  44 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_1v(
  45 // CPP-CHECK-NEXT:  entry:
  46 // CPP-CHECK-NEXT:    ret i64 1
  47 //
  48 uint64_t test_svcntd_pat_1()
  49 {
  50   return svcntd_pat(SV_VL1);
  51 }
  52
  53 // CHECK-LABEL: @test_svcntd_pat_2(
  54 // CHECK-NEXT:  entry:
  55 // CHECK-NEXT:    ret i64 2
  56 //
  57 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_2v(
  58 // CPP-CHECK-NEXT:  entry:
  59 // CPP-CHECK-NEXT:    ret i64 2
  60 //
  61 uint64_t test_svcntd_pat_2()
  62 {
  63   return svcntd_pat(SV_VL2);
  64 }
  65
  66 // CHECK-LABEL: @test_svcntd_pat_3(
  67 // CHECK-NEXT:  entry:
  68 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 3)
  69 // CHECK-NEXT:    ret i64 [[TMP0]]
  70 //
  71 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_3v(
  72 // CPP-CHECK-NEXT:  entry:
  73 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 3)
  74 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  75 //
  76 uint64_t test_svcntd_pat_3()
  77 {
  78   return svcntd_pat(SV_VL3);
  79 }
  80
  81 // CHECK-LABEL: @test_svcntd_pat_4(
  82 // CHECK-NEXT:  entry:
  83 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 4)
  84 // CHECK-NEXT:    ret i64 [[TMP0]]
  85 //
  86 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_4v(
  87 // CPP-CHECK-NEXT:  entry:
  88 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 4)
  89 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  90 //
  91 uint64_t test_svcntd_pat_4()
  92 {
  93   return svcntd_pat(SV_VL4);
  94 }
  95
  96 // CHECK-LABEL: @test_svcntd_pat_5(
  97 // CHECK-NEXT:  entry:
  98 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 5)
  99 // CHECK-NEXT:    ret i64 [[TMP0]]
 100 //
 101 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_5v(
 102 // CPP-CHECK-NEXT:  entry:
 103 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 5)
 104 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 105 //
 106 uint64_t test_svcntd_pat_5()
 107 {
 108   return svcntd_pat(SV_VL5);
 109 }
 110
 111 // CHECK-LABEL: @test_svcntd_pat_6(
 112 // CHECK-NEXT:  entry:
 113 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 6)
 114 // CHECK-NEXT:    ret i64 [[TMP0]]
 115 //
 116 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_6v(
 117 // CPP-CHECK-NEXT:  entry:
 118 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 6)
 119 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 120 //
 121 uint64_t test_svcntd_pat_6()
 122 {
 123   return svcntd_pat(SV_VL6);
 124 }
 125
 126 // CHECK-LABEL: @test_svcntd_pat_7(
 127 // CHECK-NEXT:  entry:
 128 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 7)
 129 // CHECK-NEXT:    ret i64 [[TMP0]]
 130 //
 131 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_7v(
 132 // CPP-CHECK-NEXT:  entry:
 133 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 7)
 134 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 135 //
 136 uint64_t test_svcntd_pat_7()
 137 {
 138   return svcntd_pat(SV_VL7);
 139 }
 140
 141 // CHECK-LABEL: @test_svcntd_pat_8(
 142 // CHECK-NEXT:  entry:
 143 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 8)
 144 // CHECK-NEXT:    ret i64 [[TMP0]]
 145 //
 146 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_8v(
 147 // CPP-CHECK-NEXT:  entry:
 148 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 8)
 149 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 150 //
 151 uint64_t test_svcntd_pat_8()
 152 {
 153   return svcntd_pat(SV_VL8);
 154 }
 155
 156 // CHECK-LABEL: @test_svcntd_pat_9(
 157 // CHECK-NEXT:  entry:
 158 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 9)
 159 // CHECK-NEXT:    ret i64 [[TMP0]]
 160 //
 161 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_9v(
 162 // CPP-CHECK-NEXT:  entry:
 163 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 9)
 164 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 165 //
 166 uint64_t test_svcntd_pat_9()
 167 {
 168   return svcntd_pat(SV_VL16);
 169 }
 170
 171 // CHECK-LABEL: @test_svcntd_pat_10(
 172 // CHECK-NEXT:  entry:
 173 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 10)
 174 // CHECK-NEXT:    ret i64 [[TMP0]]
 175 //
 176 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_10v(
 177 // CPP-CHECK-NEXT:  entry:
 178 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 10)
 179 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 180 //
 181 uint64_t test_svcntd_pat_10()
 182 {
 183   return svcntd_pat(SV_VL32);
 184 }
 185
 186 // CHECK-LABEL: @test_svcntd_pat_11(
 187 // CHECK-NEXT:  entry:
 188 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 11)
 189 // CHECK-NEXT:    ret i64 [[TMP0]]
 190 //
 191 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_11v(
 192 // CPP-CHECK-NEXT:  entry:
 193 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 11)
 194 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 195 //
 196 uint64_t test_svcntd_pat_11()
 197 {
 198   return svcntd_pat(SV_VL64);
 199 }
 200
 201 // CHECK-LABEL: @test_svcntd_pat_12(
 202 // CHECK-NEXT:  entry:
 203 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 12)
 204 // CHECK-NEXT:    ret i64 [[TMP0]]
 205 //
 206 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_12v(
 207 // CPP-CHECK-NEXT:  entry:
 208 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 12)
 209 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 210 //
 211 uint64_t test_svcntd_pat_12()
 212 {
 213   return svcntd_pat(SV_VL128);
 214 }
 215
 216 // CHECK-LABEL: @test_svcntd_pat_13(
 217 // CHECK-NEXT:  entry:
 218 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 13)
 219 // CHECK-NEXT:    ret i64 [[TMP0]]
 220 //
 221 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_13v(
 222 // CPP-CHECK-NEXT:  entry:
 223 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 13)
 224 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 225 //
 226 uint64_t test_svcntd_pat_13()
 227 {
 228   return svcntd_pat(SV_VL256);
 229 }
 230
 231 // CHECK-LABEL: @test_svcntd_pat_14(
 232 // CHECK-NEXT:  entry:
 233 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 29)
 234 // CHECK-NEXT:    ret i64 [[TMP0]]
 235 //
 236 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_14v(
 237 // CPP-CHECK-NEXT:  entry:
 238 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 29)
 239 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 240 //
 241 uint64_t test_svcntd_pat_14()
 242 {
 243   return svcntd_pat(SV_MUL4);
 244 }
 245
 246 // CHECK-LABEL: @test_svcntd_pat_15(
 247 // CHECK-NEXT:  entry:
 248 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 30)
 249 // CHECK-NEXT:    ret i64 [[TMP0]]
 250 //
 251 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_15v(
 252 // CPP-CHECK-NEXT:  entry:
 253 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 30)
 254 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 255 //
 256 uint64_t test_svcntd_pat_15()
 257 {
 258   return svcntd_pat(SV_MUL3);
 259 }
 260
 261 // CHECK-LABEL: @test_svcntd_pat_16(
 262 // CHECK-NEXT:  entry:
 263 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
 264 // CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
 265 // CHECK-NEXT:    ret i64 [[TMP1]]
 266 //
 267 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_16v(
 268 // CPP-CHECK-NEXT:  entry:
 269 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
 270 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
 271 // CPP-CHECK-NEXT:    ret i64 [[TMP1]]
 272 //
 273 uint64_t test_svcntd_pat_16()
 274 {
 275   return svcntd_pat(SV_ALL);
 276 }