clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   6
   7 // REQUIRES: aarch64-registered-target
   8
   9 #include <arm_sve.h>
  10
  11 #ifdef SVE_OVERLOADED_FORMS
  12 // A simple used,unused... macro, long enough to represent any SVE builtin.
  13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
  14 #else
  15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
  16 #endif
  17
  18 // CHECK-LABEL: @test_svcreate2_s8(
  19 // CHECK-NEXT:  entry:
  20 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8> poison, <vscale x 16 x i8> [[X0:%.*]], i64 0)
  21 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8> [[TMP0]], <vscale x 16 x i8> [[X1:%.*]], i64 16)
  22 // CHECK-NEXT:    ret <vscale x 32 x i8> [[TMP1]]
  23 //
  24 // CPP-CHECK-LABEL: @_Z17test_svcreate2_s8u10__SVInt8_tS_(
  25 // CPP-CHECK-NEXT:  entry:
  26 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8> poison, <vscale x 16 x i8> [[X0:%.*]], i64 0)
  27 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8> [[TMP0]], <vscale x 16 x i8> [[X1:%.*]], i64 16)
  28 // CPP-CHECK-NEXT:    ret <vscale x 32 x i8> [[TMP1]]
  29 //
  30 svint8x2_t test_svcreate2_s8(svint8_t x0, svint8_t x1)
  31 {
  32   return SVE_ACLE_FUNC(svcreate2,_s8,,)(x0, x1);
  33 }
  34
  35 // CHECK-LABEL: @test_svcreate2_s16(
  36 // CHECK-NEXT:  entry:
  37 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv8i16(<vscale x 16 x i16> poison, <vscale x 8 x i16> [[X0:%.*]], i64 0)
  38 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv8i16(<vscale x 16 x i16> [[TMP0]], <vscale x 8 x i16> [[X1:%.*]], i64 8)
  39 // CHECK-NEXT:    ret <vscale x 16 x i16> [[TMP1]]
  40 //
  41 // CPP-CHECK-LABEL: @_Z18test_svcreate2_s16u11__SVInt16_tS_(
  42 // CPP-CHECK-NEXT:  entry:
  43 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv8i16(<vscale x 16 x i16> poison, <vscale x 8 x i16> [[X0:%.*]], i64 0)
  44 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv8i16(<vscale x 16 x i16> [[TMP0]], <vscale x 8 x i16> [[X1:%.*]], i64 8)
  45 // CPP-CHECK-NEXT:    ret <vscale x 16 x i16> [[TMP1]]
  46 //
  47 svint16x2_t test_svcreate2_s16(svint16_t x0, svint16_t x1)
  48 {
  49   return SVE_ACLE_FUNC(svcreate2,_s16,,)(x0, x1);
  50 }
  51
  52 // CHECK-LABEL: @test_svcreate2_s32(
  53 // CHECK-NEXT:  entry:
  54 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> poison, <vscale x 4 x i32> [[X0:%.*]], i64 0)
  55 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> [[TMP0]], <vscale x 4 x i32> [[X1:%.*]], i64 4)
  56 // CHECK-NEXT:    ret <vscale x 8 x i32> [[TMP1]]
  57 //
  58 // CPP-CHECK-LABEL: @_Z18test_svcreate2_s32u11__SVInt32_tS_(
  59 // CPP-CHECK-NEXT:  entry:
  60 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> poison, <vscale x 4 x i32> [[X0:%.*]], i64 0)
  61 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> [[TMP0]], <vscale x 4 x i32> [[X1:%.*]], i64 4)
  62 // CPP-CHECK-NEXT:    ret <vscale x 8 x i32> [[TMP1]]
  63 //
  64 svint32x2_t test_svcreate2_s32(svint32_t x0, svint32_t x1)
  65 {
  66   return SVE_ACLE_FUNC(svcreate2,_s32,,)(x0, x1);
  67 }
  68
  69 // CHECK-LABEL: @test_svcreate2_s64(
  70 // CHECK-NEXT:  entry:
  71 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv2i64(<vscale x 4 x i64> poison, <vscale x 2 x i64> [[X0:%.*]], i64 0)
  72 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv2i64(<vscale x 4 x i64> [[TMP0]], <vscale x 2 x i64> [[X1:%.*]], i64 2)
  73 // CHECK-NEXT:    ret <vscale x 4 x i64> [[TMP1]]
  74 //
  75 // CPP-CHECK-LABEL: @_Z18test_svcreate2_s64u11__SVInt64_tS_(
  76 // CPP-CHECK-NEXT:  entry:
  77 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv2i64(<vscale x 4 x i64> poison, <vscale x 2 x i64> [[X0:%.*]], i64 0)
  78 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv2i64(<vscale x 4 x i64> [[TMP0]], <vscale x 2 x i64> [[X1:%.*]], i64 2)
  79 // CPP-CHECK-NEXT:    ret <vscale x 4 x i64> [[TMP1]]
  80 //
  81 svint64x2_t test_svcreate2_s64(svint64_t x0, svint64_t x1)
  82 {
  83   return SVE_ACLE_FUNC(svcreate2,_s64,,)(x0, x1);
  84 }
  85
  86 // CHECK-LABEL: @test_svcreate2_u8(
  87 // CHECK-NEXT:  entry:
  88 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8> poison, <vscale x 16 x i8> [[X0:%.*]], i64 0)
  89 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8> [[TMP0]], <vscale x 16 x i8> [[X1:%.*]], i64 16)
  90 // CHECK-NEXT:    ret <vscale x 32 x i8> [[TMP1]]
  91 //
  92 // CPP-CHECK-LABEL: @_Z17test_svcreate2_u8u11__SVUint8_tS_(
  93 // CPP-CHECK-NEXT:  entry:
  94 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8> poison, <vscale x 16 x i8> [[X0:%.*]], i64 0)
  95 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8> [[TMP0]], <vscale x 16 x i8> [[X1:%.*]], i64 16)
  96 // CPP-CHECK-NEXT:    ret <vscale x 32 x i8> [[TMP1]]
  97 //
  98 svuint8x2_t test_svcreate2_u8(svuint8_t x0, svuint8_t x1)
  99 {
 100   return SVE_ACLE_FUNC(svcreate2,_u8,,)(x0, x1);
 101 }
 102
 103 // CHECK-LABEL: @test_svcreate2_u16(
 104 // CHECK-NEXT:  entry:
 105 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv8i16(<vscale x 16 x i16> poison, <vscale x 8 x i16> [[X0:%.*]], i64 0)
 106 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv8i16(<vscale x 16 x i16> [[TMP0]], <vscale x 8 x i16> [[X1:%.*]], i64 8)
 107 // CHECK-NEXT:    ret <vscale x 16 x i16> [[TMP1]]
 108 //
 109 // CPP-CHECK-LABEL: @_Z18test_svcreate2_u16u12__SVUint16_tS_(
 110 // CPP-CHECK-NEXT:  entry:
 111 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv8i16(<vscale x 16 x i16> poison, <vscale x 8 x i16> [[X0:%.*]], i64 0)
 112 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv8i16(<vscale x 16 x i16> [[TMP0]], <vscale x 8 x i16> [[X1:%.*]], i64 8)
 113 // CPP-CHECK-NEXT:    ret <vscale x 16 x i16> [[TMP1]]
 114 //
 115 svuint16x2_t test_svcreate2_u16(svuint16_t x0, svuint16_t x1)
 116 {
 117   return SVE_ACLE_FUNC(svcreate2,_u16,,)(x0, x1);
 118 }
 119
 120 // CHECK-LABEL: @test_svcreate2_u32(
 121 // CHECK-NEXT:  entry:
 122 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> poison, <vscale x 4 x i32> [[X0:%.*]], i64 0)
 123 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> [[TMP0]], <vscale x 4 x i32> [[X1:%.*]], i64 4)
 124 // CHECK-NEXT:    ret <vscale x 8 x i32> [[TMP1]]
 125 //
 126 // CPP-CHECK-LABEL: @_Z18test_svcreate2_u32u12__SVUint32_tS_(
 127 // CPP-CHECK-NEXT:  entry:
 128 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> poison, <vscale x 4 x i32> [[X0:%.*]], i64 0)
 129 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> [[TMP0]], <vscale x 4 x i32> [[X1:%.*]], i64 4)
 130 // CPP-CHECK-NEXT:    ret <vscale x 8 x i32> [[TMP1]]
 131 //
 132 svuint32x2_t test_svcreate2_u32(svuint32_t x0, svuint32_t x1)
 133 {
 134   return SVE_ACLE_FUNC(svcreate2,_u32,,)(x0, x1);
 135 }
 136
 137 // CHECK-LABEL: @test_svcreate2_u64(
 138 // CHECK-NEXT:  entry:
 139 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv2i64(<vscale x 4 x i64> poison, <vscale x 2 x i64> [[X0:%.*]], i64 0)
 140 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv2i64(<vscale x 4 x i64> [[TMP0]], <vscale x 2 x i64> [[X1:%.*]], i64 2)
 141 // CHECK-NEXT:    ret <vscale x 4 x i64> [[TMP1]]
 142 //
 143 // CPP-CHECK-LABEL: @_Z18test_svcreate2_u64u12__SVUint64_tS_(
 144 // CPP-CHECK-NEXT:  entry:
 145 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv2i64(<vscale x 4 x i64> poison, <vscale x 2 x i64> [[X0:%.*]], i64 0)
 146 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv2i64(<vscale x 4 x i64> [[TMP0]], <vscale x 2 x i64> [[X1:%.*]], i64 2)
 147 // CPP-CHECK-NEXT:    ret <vscale x 4 x i64> [[TMP1]]
 148 //
 149 svuint64x2_t test_svcreate2_u64(svuint64_t x0, svuint64_t x1)
 150 {
 151   return SVE_ACLE_FUNC(svcreate2,_u64,,)(x0, x1);
 152 }
 153
 154 // CHECK-LABEL: @test_svcreate2_f16(
 155 // CHECK-NEXT:  entry:
 156 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x half> @llvm.vector.insert.nxv16f16.nxv8f16(<vscale x 16 x half> poison, <vscale x 8 x half> [[X0:%.*]], i64 0)
 157 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x half> @llvm.vector.insert.nxv16f16.nxv8f16(<vscale x 16 x half> [[TMP0]], <vscale x 8 x half> [[X1:%.*]], i64 8)
 158 // CHECK-NEXT:    ret <vscale x 16 x half> [[TMP1]]
 159 //
 160 // CPP-CHECK-LABEL: @_Z18test_svcreate2_f16u13__SVFloat16_tS_(
 161 // CPP-CHECK-NEXT:  entry:
 162 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x half> @llvm.vector.insert.nxv16f16.nxv8f16(<vscale x 16 x half> poison, <vscale x 8 x half> [[X0:%.*]], i64 0)
 163 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x half> @llvm.vector.insert.nxv16f16.nxv8f16(<vscale x 16 x half> [[TMP0]], <vscale x 8 x half> [[X1:%.*]], i64 8)
 164 // CPP-CHECK-NEXT:    ret <vscale x 16 x half> [[TMP1]]
 165 //
 166 svfloat16x2_t test_svcreate2_f16(svfloat16_t x0, svfloat16_t x1)
 167 {
 168   return SVE_ACLE_FUNC(svcreate2,_f16,,)(x0, x1);
 169 }
 170
 171 // CHECK-LABEL: @test_svcreate2_f32(
 172 // CHECK-NEXT:  entry:
 173 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv4f32(<vscale x 8 x float> poison, <vscale x 4 x float> [[X0:%.*]], i64 0)
 174 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv4f32(<vscale x 8 x float> [[TMP0]], <vscale x 4 x float> [[X1:%.*]], i64 4)
 175 // CHECK-NEXT:    ret <vscale x 8 x float> [[TMP1]]
 176 //
 177 // CPP-CHECK-LABEL: @_Z18test_svcreate2_f32u13__SVFloat32_tS_(
 178 // CPP-CHECK-NEXT:  entry:
 179 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv4f32(<vscale x 8 x float> poison, <vscale x 4 x float> [[X0:%.*]], i64 0)
 180 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv4f32(<vscale x 8 x float> [[TMP0]], <vscale x 4 x float> [[X1:%.*]], i64 4)
 181 // CPP-CHECK-NEXT:    ret <vscale x 8 x float> [[TMP1]]
 182 //
 183 svfloat32x2_t test_svcreate2_f32(svfloat32_t x0, svfloat32_t x1)
 184 {
 185   return SVE_ACLE_FUNC(svcreate2,_f32,,)(x0, x1);
 186 }
 187
 188 // CHECK-LABEL: @test_svcreate2_f64(
 189 // CHECK-NEXT:  entry:
 190 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x double> @llvm.vector.insert.nxv4f64.nxv2f64(<vscale x 4 x double> poison, <vscale x 2 x double> [[X0:%.*]], i64 0)
 191 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x double> @llvm.vector.insert.nxv4f64.nxv2f64(<vscale x 4 x double> [[TMP0]], <vscale x 2 x double> [[X1:%.*]], i64 2)
 192 // CHECK-NEXT:    ret <vscale x 4 x double> [[TMP1]]
 193 //
 194 // CPP-CHECK-LABEL: @_Z18test_svcreate2_f64u13__SVFloat64_tS_(
 195 // CPP-CHECK-NEXT:  entry:
 196 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x double> @llvm.vector.insert.nxv4f64.nxv2f64(<vscale x 4 x double> poison, <vscale x 2 x double> [[X0:%.*]], i64 0)
 197 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x double> @llvm.vector.insert.nxv4f64.nxv2f64(<vscale x 4 x double> [[TMP0]], <vscale x 2 x double> [[X1:%.*]], i64 2)
 198 // CPP-CHECK-NEXT:    ret <vscale x 4 x double> [[TMP1]]
 199 //
 200 svfloat64x2_t test_svcreate2_f64(svfloat64_t x0, svfloat64_t x1)
 201 {
 202   return SVE_ACLE_FUNC(svcreate2,_f64,,)(x0, x1);
 203 }