clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
   6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   7
   8 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   9 #include <arm_sve.h>
  10
  11 #ifdef SVE_OVERLOADED_FORMS
  12 // A simple used,unused... macro, long enough to represent any SVE builtin.
  13 #define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
  14 #else
  15 #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
  16 #endif
  17
  18 // CHECK-LABEL: @test_svdup_n_bf16(
  19 // CHECK-NEXT:  entry:
  20 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x bfloat> poison, bfloat [[OP:%.*]], i64 0
  21 // CHECK-NEXT:    [[TMP0:%.*]] = shufflevector <vscale x 8 x bfloat> [[DOTSPLATINSERT]], <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer
  22 // CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP0]]
  23 //
  24 // CPP-CHECK-LABEL: @_Z17test_svdup_n_bf16u6__bf16(
  25 // CPP-CHECK-NEXT:  entry:
  26 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x bfloat> poison, bfloat [[OP:%.*]], i64 0
  27 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = shufflevector <vscale x 8 x bfloat> [[DOTSPLATINSERT]], <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer
  28 // CPP-CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP0]]
  29 //
  30 svbfloat16_t test_svdup_n_bf16(bfloat16_t op) {
  31   // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16'}}
  32   return SVE_ACLE_FUNC(svdup, _n, _bf16, )(op);
  33 }
  34
  35 // CHECK-LABEL: @test_svdup_n_bf16_z(
  36 // CHECK-NEXT:  entry:
  37 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  38 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])
  39 // CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
  40 //
  41 // CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_zu10__SVBool_tu6__bf16(
  42 // CPP-CHECK-NEXT:  entry:
  43 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  44 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])
  45 // CPP-CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
  46 //
  47 svbfloat16_t test_svdup_n_bf16_z(svbool_t pg, bfloat16_t op) {
  48   // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_z'}}
  49   return SVE_ACLE_FUNC(svdup, _n, _bf16_z, )(pg, op);
  50 }
  51
  52 // CHECK-LABEL: @test_svdup_n_bf16_m(
  53 // CHECK-NEXT:  entry:
  54 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  55 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])
  56 // CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
  57 //
  58 // CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_mu14__SVBfloat16_tu10__SVBool_tu6__bf16(
  59 // CPP-CHECK-NEXT:  entry:
  60 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  61 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])
  62 // CPP-CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
  63 //
  64 svbfloat16_t test_svdup_n_bf16_m(svbfloat16_t inactive, svbool_t pg, bfloat16_t op) {
  65   // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_m'}}
  66   return SVE_ACLE_FUNC(svdup, _n, _bf16_m, )(inactive, pg, op);
  67 }
  68
  69 // CHECK-LABEL: @test_svdup_n_bf16_x(
  70 // CHECK-NEXT:  entry:
  71 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  72 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> undef, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])
  73 // CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
  74 //
  75 // CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_xu10__SVBool_tu6__bf16(
  76 // CPP-CHECK-NEXT:  entry:
  77 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  78 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> undef, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]])
  79 // CPP-CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
  80 //
  81 svbfloat16_t test_svdup_n_bf16_x(svbool_t pg, bfloat16_t op) {
  82   // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_x'}}
  83   return SVE_ACLE_FUNC(svdup, _n, _bf16_x, )(pg, op);
  84 }
  85
  86 // CHECK-LABEL: @test_svdup_lane_bf16(
  87 // CHECK-NEXT:  entry:
  88 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 0
  89 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
  90 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.tbl.nxv8bf16(<vscale x 8 x bfloat> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])
  91 // CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP0]]
  92 //
  93 // CPP-CHECK-LABEL: @_Z20test_svdup_lane_bf16u14__SVBfloat16_tt(
  94 // CPP-CHECK-NEXT:  entry:
  95 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 0
  96 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
  97 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.tbl.nxv8bf16(<vscale x 8 x bfloat> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])
  98 // CPP-CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP0]]
  99 //
 100 svbfloat16_t test_svdup_lane_bf16(svbfloat16_t data, uint16_t index)
 101 {
 102   // expected-warning@+1 {{implicit declaration of function 'svdup_lane_bf16'}}
 103   return SVE_ACLE_FUNC(svdup_lane,_bf16,,)(data, index);
 104 }