clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   7 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   8 #include <arm_sve.h>
   9
  10 #ifdef SVE_OVERLOADED_FORMS
  11 // A simple used,unused... macro, long enough to represent any SVE builtin.
  12 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
  13 #else
  14 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
  15 #endif
  16
  17 // CHECK-LABEL: @test_svextb_s16_z(
  18 // CHECK-NEXT:  entry:
  19 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  20 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sxtb.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
  21 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  22 //
  23 // CPP-CHECK-LABEL: @_Z17test_svextb_s16_zu10__SVBool_tu11__SVInt16_t(
  24 // CPP-CHECK-NEXT:  entry:
  25 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  26 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sxtb.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
  27 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  28 //
  29 svint16_t test_svextb_s16_z(svbool_t pg, svint16_t op)
  30 {
  31   return SVE_ACLE_FUNC(svextb,_s16,_z,)(pg, op);
  32 }
  33
  34 // CHECK-LABEL: @test_svextb_s32_z(
  35 // CHECK-NEXT:  entry:
  36 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  37 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sxtb.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
  38 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  39 //
  40 // CPP-CHECK-LABEL: @_Z17test_svextb_s32_zu10__SVBool_tu11__SVInt32_t(
  41 // CPP-CHECK-NEXT:  entry:
  42 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  43 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sxtb.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
  44 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  45 //
  46 svint32_t test_svextb_s32_z(svbool_t pg, svint32_t op)
  47 {
  48   return SVE_ACLE_FUNC(svextb,_s32,_z,)(pg, op);
  49 }
  50
  51 // CHECK-LABEL: @test_svextb_s64_z(
  52 // CHECK-NEXT:  entry:
  53 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  54 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sxtb.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
  55 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
  56 //
  57 // CPP-CHECK-LABEL: @_Z17test_svextb_s64_zu10__SVBool_tu11__SVInt64_t(
  58 // CPP-CHECK-NEXT:  entry:
  59 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  60 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sxtb.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
  61 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
  62 //
  63 svint64_t test_svextb_s64_z(svbool_t pg, svint64_t op)
  64 {
  65   return SVE_ACLE_FUNC(svextb,_s64,_z,)(pg, op);
  66 }
  67
  68 // CHECK-LABEL: @test_svextb_u16_z(
  69 // CHECK-NEXT:  entry:
  70 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  71 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uxtb.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
  72 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  73 //
  74 // CPP-CHECK-LABEL: @_Z17test_svextb_u16_zu10__SVBool_tu12__SVUint16_t(
  75 // CPP-CHECK-NEXT:  entry:
  76 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  77 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uxtb.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
  78 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  79 //
  80 svuint16_t test_svextb_u16_z(svbool_t pg, svuint16_t op)
  81 {
  82   return SVE_ACLE_FUNC(svextb,_u16,_z,)(pg, op);
  83 }
  84
  85 // CHECK-LABEL: @test_svextb_u32_z(
  86 // CHECK-NEXT:  entry:
  87 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  88 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uxtb.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
  89 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  90 //
  91 // CPP-CHECK-LABEL: @_Z17test_svextb_u32_zu10__SVBool_tu12__SVUint32_t(
  92 // CPP-CHECK-NEXT:  entry:
  93 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  94 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uxtb.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
  95 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  96 //
  97 svuint32_t test_svextb_u32_z(svbool_t pg, svuint32_t op)
  98 {
  99   return SVE_ACLE_FUNC(svextb,_u32,_z,)(pg, op);
 100 }
 101
 102 // CHECK-LABEL: @test_svextb_u64_z(
 103 // CHECK-NEXT:  entry:
 104 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 105 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uxtb.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 106 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 107 //
 108 // CPP-CHECK-LABEL: @_Z17test_svextb_u64_zu10__SVBool_tu12__SVUint64_t(
 109 // CPP-CHECK-NEXT:  entry:
 110 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 111 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uxtb.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 112 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 113 //
 114 svuint64_t test_svextb_u64_z(svbool_t pg, svuint64_t op)
 115 {
 116   return SVE_ACLE_FUNC(svextb,_u64,_z,)(pg, op);
 117 }
 118
 119 // CHECK-LABEL: @test_svextb_s16_m(
 120 // CHECK-NEXT:  entry:
 121 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 122 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sxtb.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 123 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 124 //
 125 // CPP-CHECK-LABEL: @_Z17test_svextb_s16_mu11__SVInt16_tu10__SVBool_tS_(
 126 // CPP-CHECK-NEXT:  entry:
 127 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 128 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sxtb.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 129 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 130 //
 131 svint16_t test_svextb_s16_m(svint16_t inactive, svbool_t pg, svint16_t op)
 132 {
 133   return SVE_ACLE_FUNC(svextb,_s16,_m,)(inactive, pg, op);
 134 }
 135
 136 // CHECK-LABEL: @test_svextb_s32_m(
 137 // CHECK-NEXT:  entry:
 138 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 139 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sxtb.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 140 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 141 //
 142 // CPP-CHECK-LABEL: @_Z17test_svextb_s32_mu11__SVInt32_tu10__SVBool_tS_(
 143 // CPP-CHECK-NEXT:  entry:
 144 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 145 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sxtb.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 146 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 147 //
 148 svint32_t test_svextb_s32_m(svint32_t inactive, svbool_t pg, svint32_t op)
 149 {
 150   return SVE_ACLE_FUNC(svextb,_s32,_m,)(inactive, pg, op);
 151 }
 152
 153 // CHECK-LABEL: @test_svextb_s64_m(
 154 // CHECK-NEXT:  entry:
 155 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 156 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sxtb.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 157 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 158 //
 159 // CPP-CHECK-LABEL: @_Z17test_svextb_s64_mu11__SVInt64_tu10__SVBool_tS_(
 160 // CPP-CHECK-NEXT:  entry:
 161 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 162 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sxtb.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 163 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 164 //
 165 svint64_t test_svextb_s64_m(svint64_t inactive, svbool_t pg, svint64_t op)
 166 {
 167   return SVE_ACLE_FUNC(svextb,_s64,_m,)(inactive, pg, op);
 168 }
 169
 170 // CHECK-LABEL: @test_svextb_u16_m(
 171 // CHECK-NEXT:  entry:
 172 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 173 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uxtb.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 174 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 175 //
 176 // CPP-CHECK-LABEL: @_Z17test_svextb_u16_mu12__SVUint16_tu10__SVBool_tS_(
 177 // CPP-CHECK-NEXT:  entry:
 178 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 179 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uxtb.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 180 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 181 //
 182 svuint16_t test_svextb_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op)
 183 {
 184   return SVE_ACLE_FUNC(svextb,_u16,_m,)(inactive, pg, op);
 185 }
 186
 187 // CHECK-LABEL: @test_svextb_u32_m(
 188 // CHECK-NEXT:  entry:
 189 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 190 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uxtb.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 191 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 192 //
 193 // CPP-CHECK-LABEL: @_Z17test_svextb_u32_mu12__SVUint32_tu10__SVBool_tS_(
 194 // CPP-CHECK-NEXT:  entry:
 195 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 196 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uxtb.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 197 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 198 //
 199 svuint32_t test_svextb_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op)
 200 {
 201   return SVE_ACLE_FUNC(svextb,_u32,_m,)(inactive, pg, op);
 202 }
 203
 204 // CHECK-LABEL: @test_svextb_u64_m(
 205 // CHECK-NEXT:  entry:
 206 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 207 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uxtb.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 208 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 209 //
 210 // CPP-CHECK-LABEL: @_Z17test_svextb_u64_mu12__SVUint64_tu10__SVBool_tS_(
 211 // CPP-CHECK-NEXT:  entry:
 212 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 213 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uxtb.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 214 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 215 //
 216 svuint64_t test_svextb_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op)
 217 {
 218   return SVE_ACLE_FUNC(svextb,_u64,_m,)(inactive, pg, op);
 219 }
 220
 221 // CHECK-LABEL: @test_svextb_s16_x(
 222 // CHECK-NEXT:  entry:
 223 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 224 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sxtb.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 225 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 226 //
 227 // CPP-CHECK-LABEL: @_Z17test_svextb_s16_xu10__SVBool_tu11__SVInt16_t(
 228 // CPP-CHECK-NEXT:  entry:
 229 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 230 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sxtb.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 231 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 232 //
 233 svint16_t test_svextb_s16_x(svbool_t pg, svint16_t op)
 234 {
 235   return SVE_ACLE_FUNC(svextb,_s16,_x,)(pg, op);
 236 }
 237
 238 // CHECK-LABEL: @test_svextb_s32_x(
 239 // CHECK-NEXT:  entry:
 240 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 241 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sxtb.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 242 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 243 //
 244 // CPP-CHECK-LABEL: @_Z17test_svextb_s32_xu10__SVBool_tu11__SVInt32_t(
 245 // CPP-CHECK-NEXT:  entry:
 246 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 247 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sxtb.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 248 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 249 //
 250 svint32_t test_svextb_s32_x(svbool_t pg, svint32_t op)
 251 {
 252   return SVE_ACLE_FUNC(svextb,_s32,_x,)(pg, op);
 253 }
 254
 255 // CHECK-LABEL: @test_svextb_s64_x(
 256 // CHECK-NEXT:  entry:
 257 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 258 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sxtb.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 259 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 260 //
 261 // CPP-CHECK-LABEL: @_Z17test_svextb_s64_xu10__SVBool_tu11__SVInt64_t(
 262 // CPP-CHECK-NEXT:  entry:
 263 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 264 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sxtb.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 265 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 266 //
 267 svint64_t test_svextb_s64_x(svbool_t pg, svint64_t op)
 268 {
 269   return SVE_ACLE_FUNC(svextb,_s64,_x,)(pg, op);
 270 }
 271
 272 // CHECK-LABEL: @test_svextb_u16_x(
 273 // CHECK-NEXT:  entry:
 274 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 275 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uxtb.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 276 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 277 //
 278 // CPP-CHECK-LABEL: @_Z17test_svextb_u16_xu10__SVBool_tu12__SVUint16_t(
 279 // CPP-CHECK-NEXT:  entry:
 280 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 281 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uxtb.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 282 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 283 //
 284 svuint16_t test_svextb_u16_x(svbool_t pg, svuint16_t op)
 285 {
 286   return SVE_ACLE_FUNC(svextb,_u16,_x,)(pg, op);
 287 }
 288
 289 // CHECK-LABEL: @test_svextb_u32_x(
 290 // CHECK-NEXT:  entry:
 291 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 292 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uxtb.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 293 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 294 //
 295 // CPP-CHECK-LABEL: @_Z17test_svextb_u32_xu10__SVBool_tu12__SVUint32_t(
 296 // CPP-CHECK-NEXT:  entry:
 297 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 298 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uxtb.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 299 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 300 //
 301 svuint32_t test_svextb_u32_x(svbool_t pg, svuint32_t op)
 302 {
 303   return SVE_ACLE_FUNC(svextb,_u32,_x,)(pg, op);
 304 }
 305
 306 // CHECK-LABEL: @test_svextb_u64_x(
 307 // CHECK-NEXT:  entry:
 308 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 309 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uxtb.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 310 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 311 //
 312 // CPP-CHECK-LABEL: @_Z17test_svextb_u64_xu10__SVBool_tu12__SVUint64_t(
 313 // CPP-CHECK-NEXT:  entry:
 314 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 315 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uxtb.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 316 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 317 //
 318 svuint64_t test_svextb_u64_x(svbool_t pg, svuint64_t op)
 319 {
 320   return SVE_ACLE_FUNC(svextb,_u64,_x,)(pg, op);
 321 }