clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   6
   7 // REQUIRES: aarch64-registered-target
   8
   9 #include <arm_sve.h>
  10
  11 #ifdef SVE_OVERLOADED_FORMS
  12 // A simple used,unused... macro, long enough to represent any SVE builtin.
  13 #define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
  14 #else
  15 #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
  16 #endif
  17
  18 // CHECK-LABEL: @test_svld1ro_s8(
  19 // CHECK-NEXT:  entry:
  20 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1ro.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])
  21 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  22 //
  23 // CPP-CHECK-LABEL: @_Z15test_svld1ro_s8u10__SVBool_tPKa(
  24 // CPP-CHECK-NEXT:  entry:
  25 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1ro.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])
  26 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  27 //
  28 svint8_t test_svld1ro_s8(svbool_t pg, const int8_t *base) {
  29   return SVE_ACLE_FUNC(svld1ro, _s8, , )(pg, base);
  30 }
  31
  32 // CHECK-LABEL: @test_svld1ro_s16(
  33 // CHECK-NEXT:  entry:
  34 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  35 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1ro.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])
  36 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  37 //
  38 // CPP-CHECK-LABEL: @_Z16test_svld1ro_s16u10__SVBool_tPKs(
  39 // CPP-CHECK-NEXT:  entry:
  40 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  41 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1ro.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])
  42 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  43 //
  44 svint16_t test_svld1ro_s16(svbool_t pg, const int16_t *base) {
  45   return SVE_ACLE_FUNC(svld1ro, _s16, , )(pg, base);
  46 }
  47
  48 // CHECK-LABEL: @test_svld1ro_s32(
  49 // CHECK-NEXT:  entry:
  50 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  51 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1ro.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])
  52 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  53 //
  54 // CPP-CHECK-LABEL: @_Z16test_svld1ro_s32u10__SVBool_tPKi(
  55 // CPP-CHECK-NEXT:  entry:
  56 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  57 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1ro.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])
  58 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  59 //
  60 svint32_t test_svld1ro_s32(svbool_t pg, const int32_t *base) {
  61   return SVE_ACLE_FUNC(svld1ro, _s32, , )(pg, base);
  62 }
  63
  64 // CHECK-LABEL: @test_svld1ro_s64(
  65 // CHECK-NEXT:  entry:
  66 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  67 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1ro.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])
  68 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
  69 //
  70 // CPP-CHECK-LABEL: @_Z16test_svld1ro_s64u10__SVBool_tPKl(
  71 // CPP-CHECK-NEXT:  entry:
  72 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  73 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1ro.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])
  74 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
  75 //
  76 svint64_t test_svld1ro_s64(svbool_t pg, const int64_t *base) {
  77   return SVE_ACLE_FUNC(svld1ro, _s64, , )(pg, base);
  78 }
  79
  80 // CHECK-LABEL: @test_svld1ro_u8(
  81 // CHECK-NEXT:  entry:
  82 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1ro.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])
  83 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  84 //
  85 // CPP-CHECK-LABEL: @_Z15test_svld1ro_u8u10__SVBool_tPKh(
  86 // CPP-CHECK-NEXT:  entry:
  87 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.ld1ro.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], ptr [[BASE:%.*]])
  88 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  89 //
  90 svuint8_t test_svld1ro_u8(svbool_t pg, const uint8_t *base) {
  91   return SVE_ACLE_FUNC(svld1ro, _u8, , )(pg, base);
  92 }
  93
  94 // CHECK-LABEL: @test_svld1ro_u16(
  95 // CHECK-NEXT:  entry:
  96 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  97 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1ro.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])
  98 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  99 //
 100 // CPP-CHECK-LABEL: @_Z16test_svld1ro_u16u10__SVBool_tPKt(
 101 // CPP-CHECK-NEXT:  entry:
 102 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 103 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.ld1ro.nxv8i16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])
 104 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 105 //
 106 svuint16_t test_svld1ro_u16(svbool_t pg, const uint16_t *base) {
 107   return SVE_ACLE_FUNC(svld1ro, _u16, , )(pg, base);
 108 }
 109
 110 // CHECK-LABEL: @test_svld1ro_u32(
 111 // CHECK-NEXT:  entry:
 112 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 113 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1ro.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])
 114 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 115 //
 116 // CPP-CHECK-LABEL: @_Z16test_svld1ro_u32u10__SVBool_tPKj(
 117 // CPP-CHECK-NEXT:  entry:
 118 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 119 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.ld1ro.nxv4i32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])
 120 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 121 //
 122 svuint32_t test_svld1ro_u32(svbool_t pg, const uint32_t *base) {
 123   return SVE_ACLE_FUNC(svld1ro, _u32, , )(pg, base);
 124 }
 125
 126 // CHECK-LABEL: @test_svld1ro_u64(
 127 // CHECK-NEXT:  entry:
 128 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 129 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1ro.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])
 130 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 131 //
 132 // CPP-CHECK-LABEL: @_Z16test_svld1ro_u64u10__SVBool_tPKm(
 133 // CPP-CHECK-NEXT:  entry:
 134 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 135 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.ld1ro.nxv2i64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])
 136 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 137 //
 138 svuint64_t test_svld1ro_u64(svbool_t pg, const uint64_t *base) {
 139   return SVE_ACLE_FUNC(svld1ro, _u64, , )(pg, base);
 140 }
 141
 142 // CHECK-LABEL: @test_svld1ro_f16(
 143 // CHECK-NEXT:  entry:
 144 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 145 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.ld1ro.nxv8f16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])
 146 // CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 147 //
 148 // CPP-CHECK-LABEL: @_Z16test_svld1ro_f16u10__SVBool_tPKDh(
 149 // CPP-CHECK-NEXT:  entry:
 150 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 151 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.ld1ro.nxv8f16(<vscale x 8 x i1> [[TMP0]], ptr [[BASE:%.*]])
 152 // CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 153 //
 154 svfloat16_t test_svld1ro_f16(svbool_t pg, const float16_t *base) {
 155   return SVE_ACLE_FUNC(svld1ro, _f16, , )(pg, base);
 156 }
 157
 158 // CHECK-LABEL: @test_svld1ro_f32(
 159 // CHECK-NEXT:  entry:
 160 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 161 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.ld1ro.nxv4f32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])
 162 // CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 163 //
 164 // CPP-CHECK-LABEL: @_Z16test_svld1ro_f32u10__SVBool_tPKf(
 165 // CPP-CHECK-NEXT:  entry:
 166 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 167 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.ld1ro.nxv4f32(<vscale x 4 x i1> [[TMP0]], ptr [[BASE:%.*]])
 168 // CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 169 //
 170 svfloat32_t test_svld1ro_f32(svbool_t pg, const float32_t *base) {
 171   return SVE_ACLE_FUNC(svld1ro, _f32, , )(pg, base);
 172 }
 173
 174 // CHECK-LABEL: @test_svld1ro_f64(
 175 // CHECK-NEXT:  entry:
 176 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 177 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.ld1ro.nxv2f64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])
 178 // CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 179 //
 180 // CPP-CHECK-LABEL: @_Z16test_svld1ro_f64u10__SVBool_tPKd(
 181 // CPP-CHECK-NEXT:  entry:
 182 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 183 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.ld1ro.nxv2f64(<vscale x 2 x i1> [[TMP0]], ptr [[BASE:%.*]])
 184 // CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 185 //
 186 svfloat64_t test_svld1ro_f64(svbool_t pg, const float64_t *base) {
 187   return SVE_ACLE_FUNC(svld1ro, _f64, , )(pg, base);
 188 }