clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   7 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   8
   9 #include <arm_sve.h>
  10
  11 #ifdef SVE_OVERLOADED_FORMS
  12 // A simple used,unused... macro, long enough to represent any SVE builtin.
  13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
  14 #else
  15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
  16 #endif
  17
  18 // CHECK-LABEL: @test_svminv_s8(
  19 // CHECK-NEXT:  entry:
  20 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.sminv.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  21 // CHECK-NEXT:    ret i8 [[TMP0]]
  22 //
  23 // CPP-CHECK-LABEL: @_Z14test_svminv_s8u10__SVBool_tu10__SVInt8_t(
  24 // CPP-CHECK-NEXT:  entry:
  25 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.sminv.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  26 // CPP-CHECK-NEXT:    ret i8 [[TMP0]]
  27 //
  28 int8_t test_svminv_s8(svbool_t pg, svint8_t op)
  29 {
  30   return SVE_ACLE_FUNC(svminv,_s8,,)(pg, op);
  31 }
  32
  33 // CHECK-LABEL: @test_svminv_s16(
  34 // CHECK-NEXT:  entry:
  35 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  36 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.sminv.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
  37 // CHECK-NEXT:    ret i16 [[TMP1]]
  38 //
  39 // CPP-CHECK-LABEL: @_Z15test_svminv_s16u10__SVBool_tu11__SVInt16_t(
  40 // CPP-CHECK-NEXT:  entry:
  41 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  42 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.sminv.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
  43 // CPP-CHECK-NEXT:    ret i16 [[TMP1]]
  44 //
  45 int16_t test_svminv_s16(svbool_t pg, svint16_t op)
  46 {
  47   return SVE_ACLE_FUNC(svminv,_s16,,)(pg, op);
  48 }
  49
  50 // CHECK-LABEL: @test_svminv_s32(
  51 // CHECK-NEXT:  entry:
  52 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  53 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sminv.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
  54 // CHECK-NEXT:    ret i32 [[TMP1]]
  55 //
  56 // CPP-CHECK-LABEL: @_Z15test_svminv_s32u10__SVBool_tu11__SVInt32_t(
  57 // CPP-CHECK-NEXT:  entry:
  58 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  59 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sminv.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
  60 // CPP-CHECK-NEXT:    ret i32 [[TMP1]]
  61 //
  62 int32_t test_svminv_s32(svbool_t pg, svint32_t op)
  63 {
  64   return SVE_ACLE_FUNC(svminv,_s32,,)(pg, op);
  65 }
  66
  67 // CHECK-LABEL: @test_svminv_s64(
  68 // CHECK-NEXT:  entry:
  69 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  70 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sminv.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
  71 // CHECK-NEXT:    ret i64 [[TMP1]]
  72 //
  73 // CPP-CHECK-LABEL: @_Z15test_svminv_s64u10__SVBool_tu11__SVInt64_t(
  74 // CPP-CHECK-NEXT:  entry:
  75 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  76 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sminv.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
  77 // CPP-CHECK-NEXT:    ret i64 [[TMP1]]
  78 //
  79 int64_t test_svminv_s64(svbool_t pg, svint64_t op)
  80 {
  81   return SVE_ACLE_FUNC(svminv,_s64,,)(pg, op);
  82 }
  83
  84 // CHECK-LABEL: @test_svminv_u8(
  85 // CHECK-NEXT:  entry:
  86 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.uminv.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  87 // CHECK-NEXT:    ret i8 [[TMP0]]
  88 //
  89 // CPP-CHECK-LABEL: @_Z14test_svminv_u8u10__SVBool_tu11__SVUint8_t(
  90 // CPP-CHECK-NEXT:  entry:
  91 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.uminv.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  92 // CPP-CHECK-NEXT:    ret i8 [[TMP0]]
  93 //
  94 uint8_t test_svminv_u8(svbool_t pg, svuint8_t op)
  95 {
  96   return SVE_ACLE_FUNC(svminv,_u8,,)(pg, op);
  97 }
  98
  99 // CHECK-LABEL: @test_svminv_u16(
 100 // CHECK-NEXT:  entry:
 101 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 102 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.uminv.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 103 // CHECK-NEXT:    ret i16 [[TMP1]]
 104 //
 105 // CPP-CHECK-LABEL: @_Z15test_svminv_u16u10__SVBool_tu12__SVUint16_t(
 106 // CPP-CHECK-NEXT:  entry:
 107 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 108 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.uminv.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 109 // CPP-CHECK-NEXT:    ret i16 [[TMP1]]
 110 //
 111 uint16_t test_svminv_u16(svbool_t pg, svuint16_t op)
 112 {
 113   return SVE_ACLE_FUNC(svminv,_u16,,)(pg, op);
 114 }
 115
 116 // CHECK-LABEL: @test_svminv_u32(
 117 // CHECK-NEXT:  entry:
 118 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 119 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uminv.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 120 // CHECK-NEXT:    ret i32 [[TMP1]]
 121 //
 122 // CPP-CHECK-LABEL: @_Z15test_svminv_u32u10__SVBool_tu12__SVUint32_t(
 123 // CPP-CHECK-NEXT:  entry:
 124 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 125 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uminv.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 126 // CPP-CHECK-NEXT:    ret i32 [[TMP1]]
 127 //
 128 uint32_t test_svminv_u32(svbool_t pg, svuint32_t op)
 129 {
 130   return SVE_ACLE_FUNC(svminv,_u32,,)(pg, op);
 131 }
 132
 133 // CHECK-LABEL: @test_svminv_u64(
 134 // CHECK-NEXT:  entry:
 135 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 136 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uminv.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 137 // CHECK-NEXT:    ret i64 [[TMP1]]
 138 //
 139 // CPP-CHECK-LABEL: @_Z15test_svminv_u64u10__SVBool_tu12__SVUint64_t(
 140 // CPP-CHECK-NEXT:  entry:
 141 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 142 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uminv.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 143 // CPP-CHECK-NEXT:    ret i64 [[TMP1]]
 144 //
 145 uint64_t test_svminv_u64(svbool_t pg, svuint64_t op)
 146 {
 147   return SVE_ACLE_FUNC(svminv,_u64,,)(pg, op);
 148 }
 149
 150 // CHECK-LABEL: @test_svminv_f16(
 151 // CHECK-NEXT:  entry:
 152 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 153 // CHECK-NEXT:    [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fminv.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
 154 // CHECK-NEXT:    ret half [[TMP1]]
 155 //
 156 // CPP-CHECK-LABEL: @_Z15test_svminv_f16u10__SVBool_tu13__SVFloat16_t(
 157 // CPP-CHECK-NEXT:  entry:
 158 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 159 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fminv.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
 160 // CPP-CHECK-NEXT:    ret half [[TMP1]]
 161 //
 162 float16_t test_svminv_f16(svbool_t pg, svfloat16_t op)
 163 {
 164   return SVE_ACLE_FUNC(svminv,_f16,,)(pg, op);
 165 }
 166
 167 // CHECK-LABEL: @test_svminv_f32(
 168 // CHECK-NEXT:  entry:
 169 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 170 // CHECK-NEXT:    [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fminv.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
 171 // CHECK-NEXT:    ret float [[TMP1]]
 172 //
 173 // CPP-CHECK-LABEL: @_Z15test_svminv_f32u10__SVBool_tu13__SVFloat32_t(
 174 // CPP-CHECK-NEXT:  entry:
 175 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 176 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fminv.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
 177 // CPP-CHECK-NEXT:    ret float [[TMP1]]
 178 //
 179 float32_t test_svminv_f32(svbool_t pg, svfloat32_t op)
 180 {
 181   return SVE_ACLE_FUNC(svminv,_f32,,)(pg, op);
 182 }
 183
 184 // CHECK-LABEL: @test_svminv_f64(
 185 // CHECK-NEXT:  entry:
 186 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 187 // CHECK-NEXT:    [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fminv.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
 188 // CHECK-NEXT:    ret double [[TMP1]]
 189 //
 190 // CPP-CHECK-LABEL: @_Z15test_svminv_f64u10__SVBool_tu13__SVFloat64_t(
 191 // CPP-CHECK-NEXT:  entry:
 192 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 193 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fminv.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
 194 // CPP-CHECK-NEXT:    ret double [[TMP1]]
 195 //
 196 float64_t test_svminv_f64(svbool_t pg, svfloat64_t op)
 197 {
 198   return SVE_ACLE_FUNC(svminv,_f64,,)(pg, op);
 199 }