clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   6 #include <arm_sve.h>
   7
   8 // CHECK-LABEL: @test_svptest_any(
   9 // CHECK-NEXT:  entry:
  10 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.any.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]])
  11 // CHECK-NEXT:    ret i1 [[TMP0]]
  12 //
  13 // CPP-CHECK-LABEL: @_Z16test_svptest_anyu10__SVBool_tS_(
  14 // CPP-CHECK-NEXT:  entry:
  15 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.any.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]])
  16 // CPP-CHECK-NEXT:    ret i1 [[TMP0]]
  17 //
  18 bool test_svptest_any(svbool_t pg, svbool_t op)
  19 {
  20   return svptest_any(pg, op);
  21 }
  22
  23 // CHECK-LABEL: @test_svptest_first(
  24 // CHECK-NEXT:  entry:
  25 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.first.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]])
  26 // CHECK-NEXT:    ret i1 [[TMP0]]
  27 //
  28 // CPP-CHECK-LABEL: @_Z18test_svptest_firstu10__SVBool_tS_(
  29 // CPP-CHECK-NEXT:  entry:
  30 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.first.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]])
  31 // CPP-CHECK-NEXT:    ret i1 [[TMP0]]
  32 //
  33 bool test_svptest_first(svbool_t pg, svbool_t op)
  34 {
  35   return svptest_first(pg, op);
  36 }
  37
  38 // CHECK-LABEL: @test_svptest_last(
  39 // CHECK-NEXT:  entry:
  40 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.last.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]])
  41 // CHECK-NEXT:    ret i1 [[TMP0]]
  42 //
  43 // CPP-CHECK-LABEL: @_Z17test_svptest_lastu10__SVBool_tS_(
  44 // CPP-CHECK-NEXT:  entry:
  45 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.last.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]])
  46 // CPP-CHECK-NEXT:    ret i1 [[TMP0]]
  47 //
  48 bool test_svptest_last(svbool_t pg, svbool_t op)
  49 {
  50   return svptest_last(pg, op);
  51 }