clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
   6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   7 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   8 #include <arm_sve.h>
   9
  10 #ifdef SVE_OVERLOADED_FORMS
  11 // A simple used,unused... macro, long enough to represent any SVE builtin.
  12 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
  13 #else
  14 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
  15 #endif
  16
  17 // CHECK-LABEL: @test_svqsub_s8(
  18 // CHECK-NEXT:  entry:
  19 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqsub.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
  20 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  21 //
  22 // CPP-CHECK-LABEL: @_Z14test_svqsub_s8u10__SVInt8_tS_(
  23 // CPP-CHECK-NEXT:  entry:
  24 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqsub.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
  25 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  26 //
  27 svint8_t test_svqsub_s8(svint8_t op1, svint8_t op2)
  28 {
  29   return SVE_ACLE_FUNC(svqsub,_s8,,)(op1, op2);
  30 }
  31
  32 // CHECK-LABEL: @test_svqsub_s16(
  33 // CHECK-NEXT:  entry:
  34 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqsub.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
  35 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP0]]
  36 //
  37 // CPP-CHECK-LABEL: @_Z15test_svqsub_s16u11__SVInt16_tS_(
  38 // CPP-CHECK-NEXT:  entry:
  39 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqsub.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
  40 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP0]]
  41 //
  42 svint16_t test_svqsub_s16(svint16_t op1, svint16_t op2)
  43 {
  44   return SVE_ACLE_FUNC(svqsub,_s16,,)(op1, op2);
  45 }
  46
  47 // CHECK-LABEL: @test_svqsub_s32(
  48 // CHECK-NEXT:  entry:
  49 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqsub.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
  50 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
  51 //
  52 // CPP-CHECK-LABEL: @_Z15test_svqsub_s32u11__SVInt32_tS_(
  53 // CPP-CHECK-NEXT:  entry:
  54 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqsub.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
  55 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
  56 //
  57 svint32_t test_svqsub_s32(svint32_t op1, svint32_t op2)
  58 {
  59   return SVE_ACLE_FUNC(svqsub,_s32,,)(op1, op2);
  60 }
  61
  62 // CHECK-LABEL: @test_svqsub_s64(
  63 // CHECK-NEXT:  entry:
  64 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqsub.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
  65 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
  66 //
  67 // CPP-CHECK-LABEL: @_Z15test_svqsub_s64u11__SVInt64_tS_(
  68 // CPP-CHECK-NEXT:  entry:
  69 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqsub.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
  70 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
  71 //
  72 svint64_t test_svqsub_s64(svint64_t op1, svint64_t op2)
  73 {
  74   return SVE_ACLE_FUNC(svqsub,_s64,,)(op1, op2);
  75 }
  76
  77 // CHECK-LABEL: @test_svqsub_u8(
  78 // CHECK-NEXT:  entry:
  79 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uqsub.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
  80 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  81 //
  82 // CPP-CHECK-LABEL: @_Z14test_svqsub_u8u11__SVUint8_tS_(
  83 // CPP-CHECK-NEXT:  entry:
  84 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uqsub.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
  85 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  86 //
  87 svuint8_t test_svqsub_u8(svuint8_t op1, svuint8_t op2)
  88 {
  89   return SVE_ACLE_FUNC(svqsub,_u8,,)(op1, op2);
  90 }
  91
  92 // CHECK-LABEL: @test_svqsub_u16(
  93 // CHECK-NEXT:  entry:
  94 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqsub.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
  95 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP0]]
  96 //
  97 // CPP-CHECK-LABEL: @_Z15test_svqsub_u16u12__SVUint16_tS_(
  98 // CPP-CHECK-NEXT:  entry:
  99 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqsub.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
 100 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP0]]
 101 //
 102 svuint16_t test_svqsub_u16(svuint16_t op1, svuint16_t op2)
 103 {
 104   return SVE_ACLE_FUNC(svqsub,_u16,,)(op1, op2);
 105 }
 106
 107 // CHECK-LABEL: @test_svqsub_u32(
 108 // CHECK-NEXT:  entry:
 109 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uqsub.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
 110 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
 111 //
 112 // CPP-CHECK-LABEL: @_Z15test_svqsub_u32u12__SVUint32_tS_(
 113 // CPP-CHECK-NEXT:  entry:
 114 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uqsub.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
 115 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
 116 //
 117 svuint32_t test_svqsub_u32(svuint32_t op1, svuint32_t op2)
 118 {
 119   return SVE_ACLE_FUNC(svqsub,_u32,,)(op1, op2);
 120 }
 121
 122 // CHECK-LABEL: @test_svqsub_u64(
 123 // CHECK-NEXT:  entry:
 124 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uqsub.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
 125 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
 126 //
 127 // CPP-CHECK-LABEL: @_Z15test_svqsub_u64u12__SVUint64_tS_(
 128 // CPP-CHECK-NEXT:  entry:
 129 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uqsub.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
 130 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
 131 //
 132 svuint64_t test_svqsub_u64(svuint64_t op1, svuint64_t op2)
 133 {
 134   return SVE_ACLE_FUNC(svqsub,_u64,,)(op1, op2);
 135 }
 136
 137 // CHECK-LABEL: @test_svqsub_n_s8(
 138 // CHECK-NEXT:  entry:
 139 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0
 140 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
 141 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqsub.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])
 142 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 143 //
 144 // CPP-CHECK-LABEL: @_Z16test_svqsub_n_s8u10__SVInt8_ta(
 145 // CPP-CHECK-NEXT:  entry:
 146 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0
 147 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
 148 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqsub.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])
 149 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 150 //
 151 svint8_t test_svqsub_n_s8(svint8_t op1, int8_t op2)
 152 {
 153   return SVE_ACLE_FUNC(svqsub,_n_s8,,)(op1, op2);
 154 }
 155
 156 // CHECK-LABEL: @test_svqsub_n_s16(
 157 // CHECK-NEXT:  entry:
 158 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0
 159 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
 160 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqsub.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])
 161 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP0]]
 162 //
 163 // CPP-CHECK-LABEL: @_Z17test_svqsub_n_s16u11__SVInt16_ts(
 164 // CPP-CHECK-NEXT:  entry:
 165 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0
 166 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
 167 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqsub.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])
 168 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP0]]
 169 //
 170 svint16_t test_svqsub_n_s16(svint16_t op1, int16_t op2)
 171 {
 172   return SVE_ACLE_FUNC(svqsub,_n_s16,,)(op1, op2);
 173 }
 174
 175 // CHECK-LABEL: @test_svqsub_n_s32(
 176 // CHECK-NEXT:  entry:
 177 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0
 178 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
 179 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqsub.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])
 180 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
 181 //
 182 // CPP-CHECK-LABEL: @_Z17test_svqsub_n_s32u11__SVInt32_ti(
 183 // CPP-CHECK-NEXT:  entry:
 184 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0
 185 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
 186 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqsub.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])
 187 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
 188 //
 189 svint32_t test_svqsub_n_s32(svint32_t op1, int32_t op2)
 190 {
 191   return SVE_ACLE_FUNC(svqsub,_n_s32,,)(op1, op2);
 192 }
 193
 194 // CHECK-LABEL: @test_svqsub_n_s64(
 195 // CHECK-NEXT:  entry:
 196 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP2:%.*]], i64 0
 197 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
 198 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqsub.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])
 199 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
 200 //
 201 // CPP-CHECK-LABEL: @_Z17test_svqsub_n_s64u11__SVInt64_tl(
 202 // CPP-CHECK-NEXT:  entry:
 203 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP2:%.*]], i64 0
 204 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
 205 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sqsub.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])
 206 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
 207 //
 208 svint64_t test_svqsub_n_s64(svint64_t op1, int64_t op2)
 209 {
 210   return SVE_ACLE_FUNC(svqsub,_n_s64,,)(op1, op2);
 211 }
 212
 213 // CHECK-LABEL: @test_svqsub_n_u8(
 214 // CHECK-NEXT:  entry:
 215 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0
 216 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
 217 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uqsub.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])
 218 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 219 //
 220 // CPP-CHECK-LABEL: @_Z16test_svqsub_n_u8u11__SVUint8_th(
 221 // CPP-CHECK-NEXT:  entry:
 222 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0
 223 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
 224 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uqsub.x.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])
 225 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 226 //
 227 svuint8_t test_svqsub_n_u8(svuint8_t op1, uint8_t op2)
 228 {
 229   return SVE_ACLE_FUNC(svqsub,_n_u8,,)(op1, op2);
 230 }
 231
 232 // CHECK-LABEL: @test_svqsub_n_u16(
 233 // CHECK-NEXT:  entry:
 234 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0
 235 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
 236 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqsub.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])
 237 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP0]]
 238 //
 239 // CPP-CHECK-LABEL: @_Z17test_svqsub_n_u16u12__SVUint16_tt(
 240 // CPP-CHECK-NEXT:  entry:
 241 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP2:%.*]], i64 0
 242 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
 243 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uqsub.x.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[DOTSPLAT]])
 244 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP0]]
 245 //
 246 svuint16_t test_svqsub_n_u16(svuint16_t op1, uint16_t op2)
 247 {
 248   return SVE_ACLE_FUNC(svqsub,_n_u16,,)(op1, op2);
 249 }
 250
 251 // CHECK-LABEL: @test_svqsub_n_u32(
 252 // CHECK-NEXT:  entry:
 253 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0
 254 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
 255 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uqsub.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])
 256 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
 257 //
 258 // CPP-CHECK-LABEL: @_Z17test_svqsub_n_u32u12__SVUint32_tj(
 259 // CPP-CHECK-NEXT:  entry:
 260 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0
 261 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
 262 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uqsub.x.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])
 263 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
 264 //
 265 svuint32_t test_svqsub_n_u32(svuint32_t op1, uint32_t op2)
 266 {
 267   return SVE_ACLE_FUNC(svqsub,_n_u32,,)(op1, op2);
 268 }
 269
 270 // CHECK-LABEL: @test_svqsub_n_u64(
 271 // CHECK-NEXT:  entry:
 272 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP2:%.*]], i64 0
 273 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
 274 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uqsub.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])
 275 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
 276 //
 277 // CPP-CHECK-LABEL: @_Z17test_svqsub_n_u64u12__SVUint64_tm(
 278 // CPP-CHECK-NEXT:  entry:
 279 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP2:%.*]], i64 0
 280 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
 281 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uqsub.x.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])
 282 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
 283 //
 284 svuint64_t test_svqsub_n_u64(svuint64_t op1, uint64_t op2)
 285 {
 286   return SVE_ACLE_FUNC(svqsub,_n_u64,,)(op1, op2);
 287 }