Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / CodeGen / aarch64-sve-intrinsics / acle_sve_sel.c
blob5ce8c76d8525a1c0a108b5df979242804973af1b
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: aarch64-registered-target
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
7 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
8 #include <arm_sve.h>
10 #ifdef SVE_OVERLOADED_FORMS
11 // A simple used,unused... macro, long enough to represent any SVE builtin.
12 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
13 #else
14 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
15 #endif
17 // CHECK-LABEL: @test_svsel_s8(
18 // CHECK-NEXT: entry:
19 // CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]]
20 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
22 // CPP-CHECK-LABEL: @_Z13test_svsel_s8u10__SVBool_tu10__SVInt8_tS0_(
23 // CPP-CHECK-NEXT: entry:
24 // CPP-CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]]
25 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
27 svint8_t test_svsel_s8(svbool_t pg, svint8_t op1, svint8_t op2)
29 return SVE_ACLE_FUNC(svsel,_s8,,)(pg, op1, op2);
32 // CHECK-LABEL: @test_svsel_s16(
33 // CHECK-NEXT: entry:
34 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
35 // CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]]
36 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]
38 // CPP-CHECK-LABEL: @_Z14test_svsel_s16u10__SVBool_tu11__SVInt16_tS0_(
39 // CPP-CHECK-NEXT: entry:
40 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
41 // CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]]
42 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]
44 svint16_t test_svsel_s16(svbool_t pg, svint16_t op1, svint16_t op2)
46 return SVE_ACLE_FUNC(svsel,_s16,,)(pg, op1, op2);
49 // CHECK-LABEL: @test_svsel_s32(
50 // CHECK-NEXT: entry:
51 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
52 // CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]]
53 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]
55 // CPP-CHECK-LABEL: @_Z14test_svsel_s32u10__SVBool_tu11__SVInt32_tS0_(
56 // CPP-CHECK-NEXT: entry:
57 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
58 // CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]]
59 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]
61 svint32_t test_svsel_s32(svbool_t pg, svint32_t op1, svint32_t op2)
63 return SVE_ACLE_FUNC(svsel,_s32,,)(pg, op1, op2);
66 // CHECK-LABEL: @test_svsel_s64(
67 // CHECK-NEXT: entry:
68 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
69 // CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]]
70 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]
72 // CPP-CHECK-LABEL: @_Z14test_svsel_s64u10__SVBool_tu11__SVInt64_tS0_(
73 // CPP-CHECK-NEXT: entry:
74 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
75 // CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]]
76 // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]
78 svint64_t test_svsel_s64(svbool_t pg, svint64_t op1, svint64_t op2)
80 return SVE_ACLE_FUNC(svsel,_s64,,)(pg, op1, op2);
83 // CHECK-LABEL: @test_svsel_u8(
84 // CHECK-NEXT: entry:
85 // CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]]
86 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
88 // CPP-CHECK-LABEL: @_Z13test_svsel_u8u10__SVBool_tu11__SVUint8_tS0_(
89 // CPP-CHECK-NEXT: entry:
90 // CPP-CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]]
91 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
93 svuint8_t test_svsel_u8(svbool_t pg, svuint8_t op1, svuint8_t op2)
95 return SVE_ACLE_FUNC(svsel,_u8,,)(pg, op1, op2);
98 // CHECK-LABEL: @test_svsel_u16(
99 // CHECK-NEXT: entry:
100 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
101 // CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]]
102 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]
104 // CPP-CHECK-LABEL: @_Z14test_svsel_u16u10__SVBool_tu12__SVUint16_tS0_(
105 // CPP-CHECK-NEXT: entry:
106 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
107 // CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]]
108 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]
110 svuint16_t test_svsel_u16(svbool_t pg, svuint16_t op1, svuint16_t op2)
112 return SVE_ACLE_FUNC(svsel,_u16,,)(pg, op1, op2);
115 // CHECK-LABEL: @test_svsel_u32(
116 // CHECK-NEXT: entry:
117 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
118 // CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]]
119 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]
121 // CPP-CHECK-LABEL: @_Z14test_svsel_u32u10__SVBool_tu12__SVUint32_tS0_(
122 // CPP-CHECK-NEXT: entry:
123 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
124 // CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]]
125 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]]
127 svuint32_t test_svsel_u32(svbool_t pg, svuint32_t op1, svuint32_t op2)
129 return SVE_ACLE_FUNC(svsel,_u32,,)(pg, op1, op2);
132 // CHECK-LABEL: @test_svsel_u64(
133 // CHECK-NEXT: entry:
134 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
135 // CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]]
136 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]
138 // CPP-CHECK-LABEL: @_Z14test_svsel_u64u10__SVBool_tu12__SVUint64_tS0_(
139 // CPP-CHECK-NEXT: entry:
140 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
141 // CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]]
142 // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]
144 svuint64_t test_svsel_u64(svbool_t pg, svuint64_t op1, svuint64_t op2)
146 return SVE_ACLE_FUNC(svsel,_u64,,)(pg, op1, op2);
149 // CHECK-LABEL: @test_svsel_f16(
150 // CHECK-NEXT: entry:
151 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
152 // CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]]
153 // CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]]
155 // CPP-CHECK-LABEL: @_Z14test_svsel_f16u10__SVBool_tu13__SVFloat16_tS0_(
156 // CPP-CHECK-NEXT: entry:
157 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
158 // CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]]
159 // CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]]
161 svfloat16_t test_svsel_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
163 return SVE_ACLE_FUNC(svsel,_f16,,)(pg, op1, op2);
166 // CHECK-LABEL: @test_svsel_f32(
167 // CHECK-NEXT: entry:
168 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
169 // CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]]
170 // CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]
172 // CPP-CHECK-LABEL: @_Z14test_svsel_f32u10__SVBool_tu13__SVFloat32_tS0_(
173 // CPP-CHECK-NEXT: entry:
174 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
175 // CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]]
176 // CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]
178 svfloat32_t test_svsel_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
180 return SVE_ACLE_FUNC(svsel,_f32,,)(pg, op1, op2);
183 // CHECK-LABEL: @test_svsel_f64(
184 // CHECK-NEXT: entry:
185 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
186 // CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]]
187 // CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]
189 // CPP-CHECK-LABEL: @_Z14test_svsel_f64u10__SVBool_tu13__SVFloat64_tS0_(
190 // CPP-CHECK-NEXT: entry:
191 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
192 // CPP-CHECK-NEXT: [[TMP1:%.*]] = select <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]]
193 // CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]
195 svfloat64_t test_svsel_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
197 return SVE_ACLE_FUNC(svsel,_f64,,)(pg, op1, op2);
200 // CHECK-LABEL: @test_svsel_b(
201 // CHECK-NEXT: entry:
202 // CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP1:%.*]], <vscale x 16 x i1> [[OP2:%.*]]
203 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
205 // CPP-CHECK-LABEL: @_Z12test_svsel_bu10__SVBool_tS_S_(
206 // CPP-CHECK-NEXT: entry:
207 // CPP-CHECK-NEXT: [[TMP0:%.*]] = select <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP1:%.*]], <vscale x 16 x i1> [[OP2:%.*]]
208 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
210 svbool_t test_svsel_b(svbool_t pg, svbool_t op1, svbool_t op2)
212 return SVE_ACLE_FUNC(svsel,_b,,)(pg, op1, op2);