clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
   5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
   6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
   7 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
   8
   9 #include <arm_sve.h>
  10
  11 #ifdef SVE_OVERLOADED_FORMS
  12 // A simple used,unused... macro, long enough to represent any SVE builtin.
  13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
  14 #else
  15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
  16 #endif
  17
  18 // CHECK-LABEL: @test_svadclb_u32(
  19 // CHECK-NEXT:  entry:
  20 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.adclb.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]])
  21 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
  22 //
  23 // CPP-CHECK-LABEL: @_Z16test_svadclb_u32u12__SVUint32_tS_S_(
  24 // CPP-CHECK-NEXT:  entry:
  25 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.adclb.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]])
  26 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
  27 //
  28 svuint32_t test_svadclb_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3)
  29 {
  30   return SVE_ACLE_FUNC(svadclb,_u32,,)(op1, op2, op3);
  31 }
  32
  33 // CHECK-LABEL: @test_svadclb_u64(
  34 // CHECK-NEXT:  entry:
  35 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.adclb.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]])
  36 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
  37 //
  38 // CPP-CHECK-LABEL: @_Z16test_svadclb_u64u12__SVUint64_tS_S_(
  39 // CPP-CHECK-NEXT:  entry:
  40 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.adclb.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]])
  41 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
  42 //
  43 svuint64_t test_svadclb_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3)
  44 {
  45   return SVE_ACLE_FUNC(svadclb,_u64,,)(op1, op2, op3);
  46 }
  47
  48 // CHECK-LABEL: @test_svadclb_n_u32(
  49 // CHECK-NEXT:  entry:
  50 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP3:%.*]], i64 0
  51 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
  52 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.adclb.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])
  53 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
  54 //
  55 // CPP-CHECK-LABEL: @_Z18test_svadclb_n_u32u12__SVUint32_tS_j(
  56 // CPP-CHECK-NEXT:  entry:
  57 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP3:%.*]], i64 0
  58 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
  59 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.adclb.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])
  60 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
  61 //
  62 svuint32_t test_svadclb_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3)
  63 {
  64   return SVE_ACLE_FUNC(svadclb,_n_u32,,)(op1, op2, op3);
  65 }
  66
  67 // CHECK-LABEL: @test_svadclb_n_u64(
  68 // CHECK-NEXT:  entry:
  69 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP3:%.*]], i64 0
  70 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
  71 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.adclb.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])
  72 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
  73 //
  74 // CPP-CHECK-LABEL: @_Z18test_svadclb_n_u64u12__SVUint64_tS_m(
  75 // CPP-CHECK-NEXT:  entry:
  76 // CPP-CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP3:%.*]], i64 0
  77 // CPP-CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
  78 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.adclb.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[DOTSPLAT]])
  79 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
  80 //
  81 svuint64_t test_svadclb_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3)
  82 {
  83   return SVE_ACLE_FUNC(svadclb,_n_u64,,)(op1, op2, op3);
  84 }