clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
   4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
   5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
   6
   7 // REQUIRES: aarch64-registered-target
   8
   9 #include <arm_sve.h>
  10
  11 #ifdef SVE_OVERLOADED_FORMS
  12 // A simple used,unused... macro, long enough to represent any SVE builtin.
  13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
  14 #else
  15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
  16 #endif
  17
  18 // CHECK-LABEL: @test_svminp_s8_m(
  19 // CHECK-NEXT:  entry:
  20 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sminp.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
  21 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  22 //
  23 // CPP-CHECK-LABEL: @_Z16test_svminp_s8_mu10__SVBool_tu10__SVInt8_tS0_(
  24 // CPP-CHECK-NEXT:  entry:
  25 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sminp.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
  26 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  27 //
  28 svint8_t test_svminp_s8_m(svbool_t pg, svint8_t op1, svint8_t op2)
  29 {
  30   return SVE_ACLE_FUNC(svminp,_s8,_m,)(pg, op1, op2);
  31 }
  32
  33 // CHECK-LABEL: @test_svminp_s16_m(
  34 // CHECK-NEXT:  entry:
  35 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  36 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sminp.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
  37 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  38 //
  39 // CPP-CHECK-LABEL: @_Z17test_svminp_s16_mu10__SVBool_tu11__SVInt16_tS0_(
  40 // CPP-CHECK-NEXT:  entry:
  41 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  42 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sminp.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
  43 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  44 //
  45 svint16_t test_svminp_s16_m(svbool_t pg, svint16_t op1, svint16_t op2)
  46 {
  47   return SVE_ACLE_FUNC(svminp,_s16,_m,)(pg, op1, op2);
  48 }
  49
  50 // CHECK-LABEL: @test_svminp_s32_m(
  51 // CHECK-NEXT:  entry:
  52 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  53 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sminp.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
  54 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  55 //
  56 // CPP-CHECK-LABEL: @_Z17test_svminp_s32_mu10__SVBool_tu11__SVInt32_tS0_(
  57 // CPP-CHECK-NEXT:  entry:
  58 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  59 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sminp.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
  60 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  61 //
  62 svint32_t test_svminp_s32_m(svbool_t pg, svint32_t op1, svint32_t op2)
  63 {
  64   return SVE_ACLE_FUNC(svminp,_s32,_m,)(pg, op1, op2);
  65 }
  66
  67 // CHECK-LABEL: @test_svminp_s64_m(
  68 // CHECK-NEXT:  entry:
  69 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  70 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sminp.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
  71 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
  72 //
  73 // CPP-CHECK-LABEL: @_Z17test_svminp_s64_mu10__SVBool_tu11__SVInt64_tS0_(
  74 // CPP-CHECK-NEXT:  entry:
  75 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  76 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sminp.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
  77 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
  78 //
  79 svint64_t test_svminp_s64_m(svbool_t pg, svint64_t op1, svint64_t op2)
  80 {
  81   return SVE_ACLE_FUNC(svminp,_s64,_m,)(pg, op1, op2);
  82 }
  83
  84 // CHECK-LABEL: @test_svminp_u8_m(
  85 // CHECK-NEXT:  entry:
  86 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uminp.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
  87 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  88 //
  89 // CPP-CHECK-LABEL: @_Z16test_svminp_u8_mu10__SVBool_tu11__SVUint8_tS0_(
  90 // CPP-CHECK-NEXT:  entry:
  91 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uminp.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
  92 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  93 //
  94 svuint8_t test_svminp_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2)
  95 {
  96   return SVE_ACLE_FUNC(svminp,_u8,_m,)(pg, op1, op2);
  97 }
  98
  99 // CHECK-LABEL: @test_svminp_u16_m(
 100 // CHECK-NEXT:  entry:
 101 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 102 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uminp.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
 103 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 104 //
 105 // CPP-CHECK-LABEL: @_Z17test_svminp_u16_mu10__SVBool_tu12__SVUint16_tS0_(
 106 // CPP-CHECK-NEXT:  entry:
 107 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 108 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uminp.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
 109 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 110 //
 111 svuint16_t test_svminp_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2)
 112 {
 113   return SVE_ACLE_FUNC(svminp,_u16,_m,)(pg, op1, op2);
 114 }
 115
 116 // CHECK-LABEL: @test_svminp_u32_m(
 117 // CHECK-NEXT:  entry:
 118 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 119 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uminp.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
 120 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 121 //
 122 // CPP-CHECK-LABEL: @_Z17test_svminp_u32_mu10__SVBool_tu12__SVUint32_tS0_(
 123 // CPP-CHECK-NEXT:  entry:
 124 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 125 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uminp.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
 126 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 127 //
 128 svuint32_t test_svminp_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2)
 129 {
 130   return SVE_ACLE_FUNC(svminp,_u32,_m,)(pg, op1, op2);
 131 }
 132
 133 // CHECK-LABEL: @test_svminp_u64_m(
 134 // CHECK-NEXT:  entry:
 135 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 136 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uminp.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
 137 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 138 //
 139 // CPP-CHECK-LABEL: @_Z17test_svminp_u64_mu10__SVBool_tu12__SVUint64_tS0_(
 140 // CPP-CHECK-NEXT:  entry:
 141 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 142 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uminp.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
 143 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 144 //
 145 svuint64_t test_svminp_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2)
 146 {
 147   return SVE_ACLE_FUNC(svminp,_u64,_m,)(pg, op1, op2);
 148 }
 149
 150 // CHECK-LABEL: @test_svminp_s8_x(
 151 // CHECK-NEXT:  entry:
 152 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sminp.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
 153 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 154 //
 155 // CPP-CHECK-LABEL: @_Z16test_svminp_s8_xu10__SVBool_tu10__SVInt8_tS0_(
 156 // CPP-CHECK-NEXT:  entry:
 157 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sminp.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
 158 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 159 //
 160 svint8_t test_svminp_s8_x(svbool_t pg, svint8_t op1, svint8_t op2)
 161 {
 162   return SVE_ACLE_FUNC(svminp,_s8,_x,)(pg, op1, op2);
 163 }
 164
 165 // CHECK-LABEL: @test_svminp_s16_x(
 166 // CHECK-NEXT:  entry:
 167 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 168 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sminp.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
 169 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 170 //
 171 // CPP-CHECK-LABEL: @_Z17test_svminp_s16_xu10__SVBool_tu11__SVInt16_tS0_(
 172 // CPP-CHECK-NEXT:  entry:
 173 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 174 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sminp.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
 175 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 176 //
 177 svint16_t test_svminp_s16_x(svbool_t pg, svint16_t op1, svint16_t op2)
 178 {
 179   return SVE_ACLE_FUNC(svminp,_s16,_x,)(pg, op1, op2);
 180 }
 181
 182 // CHECK-LABEL: @test_svminp_s32_x(
 183 // CHECK-NEXT:  entry:
 184 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 185 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sminp.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
 186 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 187 //
 188 // CPP-CHECK-LABEL: @_Z17test_svminp_s32_xu10__SVBool_tu11__SVInt32_tS0_(
 189 // CPP-CHECK-NEXT:  entry:
 190 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 191 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sminp.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
 192 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 193 //
 194 svint32_t test_svminp_s32_x(svbool_t pg, svint32_t op1, svint32_t op2)
 195 {
 196   return SVE_ACLE_FUNC(svminp,_s32,_x,)(pg, op1, op2);
 197 }
 198
 199 // CHECK-LABEL: @test_svminp_s64_x(
 200 // CHECK-NEXT:  entry:
 201 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 202 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sminp.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
 203 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 204 //
 205 // CPP-CHECK-LABEL: @_Z17test_svminp_s64_xu10__SVBool_tu11__SVInt64_tS0_(
 206 // CPP-CHECK-NEXT:  entry:
 207 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 208 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sminp.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
 209 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 210 //
 211 svint64_t test_svminp_s64_x(svbool_t pg, svint64_t op1, svint64_t op2)
 212 {
 213   return SVE_ACLE_FUNC(svminp,_s64,_x,)(pg, op1, op2);
 214 }
 215
 216 // CHECK-LABEL: @test_svminp_u8_x(
 217 // CHECK-NEXT:  entry:
 218 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uminp.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
 219 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 220 //
 221 // CPP-CHECK-LABEL: @_Z16test_svminp_u8_xu10__SVBool_tu11__SVUint8_tS0_(
 222 // CPP-CHECK-NEXT:  entry:
 223 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uminp.nxv16i8(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
 224 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 225 //
 226 svuint8_t test_svminp_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2)
 227 {
 228   return SVE_ACLE_FUNC(svminp,_u8,_x,)(pg, op1, op2);
 229 }
 230
 231 // CHECK-LABEL: @test_svminp_u16_x(
 232 // CHECK-NEXT:  entry:
 233 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 234 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uminp.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
 235 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 236 //
 237 // CPP-CHECK-LABEL: @_Z17test_svminp_u16_xu10__SVBool_tu12__SVUint16_tS0_(
 238 // CPP-CHECK-NEXT:  entry:
 239 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 240 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.uminp.nxv8i16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]])
 241 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 242 //
 243 svuint16_t test_svminp_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2)
 244 {
 245   return SVE_ACLE_FUNC(svminp,_u16,_x,)(pg, op1, op2);
 246 }
 247
 248 // CHECK-LABEL: @test_svminp_u32_x(
 249 // CHECK-NEXT:  entry:
 250 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 251 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uminp.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
 252 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 253 //
 254 // CPP-CHECK-LABEL: @_Z17test_svminp_u32_xu10__SVBool_tu12__SVUint32_tS0_(
 255 // CPP-CHECK-NEXT:  entry:
 256 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 257 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.uminp.nxv4i32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
 258 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 259 //
 260 svuint32_t test_svminp_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2)
 261 {
 262   return SVE_ACLE_FUNC(svminp,_u32,_x,)(pg, op1, op2);
 263 }
 264
 265 // CHECK-LABEL: @test_svminp_u64_x(
 266 // CHECK-NEXT:  entry:
 267 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 268 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uminp.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
 269 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 270 //
 271 // CPP-CHECK-LABEL: @_Z17test_svminp_u64_xu10__SVBool_tu12__SVUint64_tS0_(
 272 // CPP-CHECK-NEXT:  entry:
 273 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 274 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.uminp.nxv2i64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]])
 275 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 276 //
 277 svuint64_t test_svminp_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2)
 278 {
 279   return SVE_ACLE_FUNC(svminp,_u64,_x,)(pg, op1, op2);
 280 }
 281
 282 // CHECK-LABEL: @test_svminp_f16_m(
 283 // CHECK-NEXT:  entry:
 284 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 285 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fminp.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]])
 286 // CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 287 //
 288 // CPP-CHECK-LABEL: @_Z17test_svminp_f16_mu10__SVBool_tu13__SVFloat16_tS0_(
 289 // CPP-CHECK-NEXT:  entry:
 290 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 291 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fminp.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]])
 292 // CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 293 //
 294 svfloat16_t test_svminp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
 295 {
 296   return SVE_ACLE_FUNC(svminp,_f16,_m,)(pg, op1, op2);
 297 }
 298
 299 // CHECK-LABEL: @test_svminp_f32_m(
 300 // CHECK-NEXT:  entry:
 301 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 302 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fminp.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]])
 303 // CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 304 //
 305 // CPP-CHECK-LABEL: @_Z17test_svminp_f32_mu10__SVBool_tu13__SVFloat32_tS0_(
 306 // CPP-CHECK-NEXT:  entry:
 307 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 308 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fminp.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]])
 309 // CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 310 //
 311 svfloat32_t test_svminp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
 312 {
 313   return SVE_ACLE_FUNC(svminp,_f32,_m,)(pg, op1, op2);
 314 }
 315
 316 // CHECK-LABEL: @test_svminp_f64_m(
 317 // CHECK-NEXT:  entry:
 318 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 319 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fminp.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]])
 320 // CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 321 //
 322 // CPP-CHECK-LABEL: @_Z17test_svminp_f64_mu10__SVBool_tu13__SVFloat64_tS0_(
 323 // CPP-CHECK-NEXT:  entry:
 324 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 325 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fminp.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]])
 326 // CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 327 //
 328 svfloat64_t test_svminp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
 329 {
 330   return SVE_ACLE_FUNC(svminp,_f64,_m,)(pg, op1, op2);
 331 }
 332
 333 // CHECK-LABEL: @test_svminp_f16_x(
 334 // CHECK-NEXT:  entry:
 335 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 336 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fminp.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]])
 337 // CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 338 //
 339 // CPP-CHECK-LABEL: @_Z17test_svminp_f16_xu10__SVBool_tu13__SVFloat16_tS0_(
 340 // CPP-CHECK-NEXT:  entry:
 341 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 342 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fminp.nxv8f16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]])
 343 // CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 344 //
 345 svfloat16_t test_svminp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
 346 {
 347   return SVE_ACLE_FUNC(svminp,_f16,_x,)(pg, op1, op2);
 348 }
 349
 350 // CHECK-LABEL: @test_svminp_f32_x(
 351 // CHECK-NEXT:  entry:
 352 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 353 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fminp.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]])
 354 // CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 355 //
 356 // CPP-CHECK-LABEL: @_Z17test_svminp_f32_xu10__SVBool_tu13__SVFloat32_tS0_(
 357 // CPP-CHECK-NEXT:  entry:
 358 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 359 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fminp.nxv4f32(<vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]])
 360 // CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 361 //
 362 svfloat32_t test_svminp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
 363 {
 364   return SVE_ACLE_FUNC(svminp,_f32,_x,)(pg, op1, op2);
 365 }
 366
 367 // CHECK-LABEL: @test_svminp_f64_x(
 368 // CHECK-NEXT:  entry:
 369 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 370 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fminp.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]])
 371 // CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 372 //
 373 // CPP-CHECK-LABEL: @_Z17test_svminp_f64_xu10__SVBool_tu13__SVFloat64_tS0_(
 374 // CPP-CHECK-NEXT:  entry:
 375 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 376 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fminp.nxv2f64(<vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]])
 377 // CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 378 //
 379 svfloat64_t test_svminp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
 380 {
 381   return SVE_ACLE_FUNC(svminp,_f64,_x,)(pg, op1, op2);
 382 }