1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: aarch64-registered-target
4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
7 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
11 #ifdef SVE_OVERLOADED_FORMS
12 // A simple used,unused... macro, long enough to represent any SVE builtin.
13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
18 // CHECK-LABEL: @test_svpmullt_pair_u8(
20 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.pmullt.pair.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
21 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
23 // CPP-CHECK-LABEL: @_Z21test_svpmullt_pair_u8u11__SVUint8_tS_(
24 // CPP-CHECK-NEXT: entry:
25 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.pmullt.pair.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
26 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
28 svuint8_t
test_svpmullt_pair_u8(svuint8_t op1
, svuint8_t op2
)
30 return SVE_ACLE_FUNC(svpmullt_pair
,_u8
,,)(op1
, op2
);
33 // CHECK-LABEL: @test_svpmullt_pair_u32(
35 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.pmullt.pair.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
36 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
38 // CPP-CHECK-LABEL: @_Z22test_svpmullt_pair_u32u12__SVUint32_tS_(
39 // CPP-CHECK-NEXT: entry:
40 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.pmullt.pair.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
41 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
43 svuint32_t
test_svpmullt_pair_u32(svuint32_t op1
, svuint32_t op2
)
45 return SVE_ACLE_FUNC(svpmullt_pair
,_u32
,,)(op1
, op2
);
48 // CHECK-LABEL: @test_svpmullt_pair_n_u8(
50 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0
51 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
52 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.pmullt.pair.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])
53 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
55 // CPP-CHECK-LABEL: @_Z23test_svpmullt_pair_n_u8u11__SVUint8_th(
56 // CPP-CHECK-NEXT: entry:
57 // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0
58 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
59 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.pmullt.pair.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])
60 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
62 svuint8_t
test_svpmullt_pair_n_u8(svuint8_t op1
, uint8_t op2
)
64 return SVE_ACLE_FUNC(svpmullt_pair
,_n_u8
,,)(op1
, op2
);
67 // CHECK-LABEL: @test_svpmullt_pair_n_u32(
69 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0
70 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
71 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.pmullt.pair.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])
72 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
74 // CPP-CHECK-LABEL: @_Z24test_svpmullt_pair_n_u32u12__SVUint32_tj(
75 // CPP-CHECK-NEXT: entry:
76 // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0
77 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
78 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.pmullt.pair.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])
79 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
81 svuint32_t
test_svpmullt_pair_n_u32(svuint32_t op1
, uint32_t op2
)
83 return SVE_ACLE_FUNC(svpmullt_pair
,_n_u32
,,)(op1
, op2
);
86 // CHECK-LABEL: @test_svpmullt_u16(
88 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.pmullt.pair.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
89 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 16 x i8> [[TMP0]] to <vscale x 8 x i16>
90 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]
92 // CPP-CHECK-LABEL: @_Z17test_svpmullt_u16u11__SVUint8_tS_(
93 // CPP-CHECK-NEXT: entry:
94 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.pmullt.pair.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]])
95 // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 16 x i8> [[TMP0]] to <vscale x 8 x i16>
96 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]
98 svuint16_t
test_svpmullt_u16(svuint8_t op1
, svuint8_t op2
)
100 return SVE_ACLE_FUNC(svpmullt
,_u16
,,)(op1
, op2
);
103 // CHECK-LABEL: @test_svpmullt_u64(
104 // CHECK-NEXT: entry:
105 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.pmullt.pair.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
106 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 4 x i32> [[TMP0]] to <vscale x 2 x i64>
107 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]
109 // CPP-CHECK-LABEL: @_Z17test_svpmullt_u64u12__SVUint32_tS_(
110 // CPP-CHECK-NEXT: entry:
111 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.pmullt.pair.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]])
112 // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 4 x i32> [[TMP0]] to <vscale x 2 x i64>
113 // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]
115 svuint64_t
test_svpmullt_u64(svuint32_t op1
, svuint32_t op2
)
117 return SVE_ACLE_FUNC(svpmullt
,_u64
,,)(op1
, op2
);
120 // CHECK-LABEL: @test_svpmullt_n_u16(
121 // CHECK-NEXT: entry:
122 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0
123 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
124 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.pmullt.pair.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])
125 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 16 x i8> [[TMP0]] to <vscale x 8 x i16>
126 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]
128 // CPP-CHECK-LABEL: @_Z19test_svpmullt_n_u16u11__SVUint8_th(
129 // CPP-CHECK-NEXT: entry:
130 // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP2:%.*]], i64 0
131 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
132 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.pmullt.pair.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[DOTSPLAT]])
133 // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 16 x i8> [[TMP0]] to <vscale x 8 x i16>
134 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]]
136 svuint16_t
test_svpmullt_n_u16(svuint8_t op1
, uint8_t op2
)
138 return SVE_ACLE_FUNC(svpmullt
,_n_u16
,,)(op1
, op2
);
141 // CHECK-LABEL: @test_svpmullt_n_u64(
142 // CHECK-NEXT: entry:
143 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0
144 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
145 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.pmullt.pair.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])
146 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 4 x i32> [[TMP0]] to <vscale x 2 x i64>
147 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]
149 // CPP-CHECK-LABEL: @_Z19test_svpmullt_n_u64u12__SVUint32_tj(
150 // CPP-CHECK-NEXT: entry:
151 // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP2:%.*]], i64 0
152 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
153 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.pmullt.pair.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[DOTSPLAT]])
154 // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 4 x i32> [[TMP0]] to <vscale x 2 x i64>
155 // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]]
157 svuint64_t
test_svpmullt_n_u64(svuint32_t op1
, uint32_t op2
)
159 return SVE_ACLE_FUNC(svpmullt
,_n_u64
,,)(op1
, op2
);