1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
7 // REQUIRES: aarch64-registered-target
11 #ifdef SVE_OVERLOADED_FORMS
12 // A simple used,unused... macro, long enough to represent any SVE builtin.
13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
18 // CHECK-LABEL: @test_svqrshrunt_n_s16(
20 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshrunt.nxv8i16(<vscale x 16 x i8> [[OP:%.*]], <vscale x 8 x i16> [[OP1:%.*]], i32 1)
21 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
23 // CPP-CHECK-LABEL: @_Z21test_svqrshrunt_n_s16u11__SVUint8_tu11__SVInt16_t(
24 // CPP-CHECK-NEXT: entry:
25 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshrunt.nxv8i16(<vscale x 16 x i8> [[OP:%.*]], <vscale x 8 x i16> [[OP1:%.*]], i32 1)
26 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
28 svuint8_t
test_svqrshrunt_n_s16(svuint8_t op
, svint16_t op1
)
30 return SVE_ACLE_FUNC(svqrshrunt
,_n_s16
,,)(op
, op1
, 1);
33 // CHECK-LABEL: @test_svqrshrunt_n_s16_1(
35 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshrunt.nxv8i16(<vscale x 16 x i8> [[OP:%.*]], <vscale x 8 x i16> [[OP1:%.*]], i32 8)
36 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
38 // CPP-CHECK-LABEL: @_Z23test_svqrshrunt_n_s16_1u11__SVUint8_tu11__SVInt16_t(
39 // CPP-CHECK-NEXT: entry:
40 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshrunt.nxv8i16(<vscale x 16 x i8> [[OP:%.*]], <vscale x 8 x i16> [[OP1:%.*]], i32 8)
41 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
43 svuint8_t
test_svqrshrunt_n_s16_1(svuint8_t op
, svint16_t op1
)
45 return SVE_ACLE_FUNC(svqrshrunt
,_n_s16
,,)(op
, op1
, 8);
48 // CHECK-LABEL: @test_svqrshrunt_n_s32(
50 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqrshrunt.nxv4i32(<vscale x 8 x i16> [[OP:%.*]], <vscale x 4 x i32> [[OP1:%.*]], i32 1)
51 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]
53 // CPP-CHECK-LABEL: @_Z21test_svqrshrunt_n_s32u12__SVUint16_tu11__SVInt32_t(
54 // CPP-CHECK-NEXT: entry:
55 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqrshrunt.nxv4i32(<vscale x 8 x i16> [[OP:%.*]], <vscale x 4 x i32> [[OP1:%.*]], i32 1)
56 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]
58 svuint16_t
test_svqrshrunt_n_s32(svuint16_t op
, svint32_t op1
)
60 return SVE_ACLE_FUNC(svqrshrunt
,_n_s32
,,)(op
, op1
, 1);
63 // CHECK-LABEL: @test_svqrshrunt_n_s32_1(
65 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqrshrunt.nxv4i32(<vscale x 8 x i16> [[OP:%.*]], <vscale x 4 x i32> [[OP1:%.*]], i32 16)
66 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]
68 // CPP-CHECK-LABEL: @_Z23test_svqrshrunt_n_s32_1u12__SVUint16_tu11__SVInt32_t(
69 // CPP-CHECK-NEXT: entry:
70 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sqrshrunt.nxv4i32(<vscale x 8 x i16> [[OP:%.*]], <vscale x 4 x i32> [[OP1:%.*]], i32 16)
71 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]
73 svuint16_t
test_svqrshrunt_n_s32_1(svuint16_t op
, svint32_t op1
)
75 return SVE_ACLE_FUNC(svqrshrunt
,_n_s32
,,)(op
, op1
, 16);
78 // CHECK-LABEL: @test_svqrshrunt_n_s64(
80 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqrshrunt.nxv2i64(<vscale x 4 x i32> [[OP:%.*]], <vscale x 2 x i64> [[OP1:%.*]], i32 1)
81 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
83 // CPP-CHECK-LABEL: @_Z21test_svqrshrunt_n_s64u12__SVUint32_tu11__SVInt64_t(
84 // CPP-CHECK-NEXT: entry:
85 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqrshrunt.nxv2i64(<vscale x 4 x i32> [[OP:%.*]], <vscale x 2 x i64> [[OP1:%.*]], i32 1)
86 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
88 svuint32_t
test_svqrshrunt_n_s64(svuint32_t op
, svint64_t op1
)
90 return SVE_ACLE_FUNC(svqrshrunt
,_n_s64
,,)(op
, op1
, 1);
93 // CHECK-LABEL: @test_svqrshrunt_n_s64_1(
95 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqrshrunt.nxv2i64(<vscale x 4 x i32> [[OP:%.*]], <vscale x 2 x i64> [[OP1:%.*]], i32 32)
96 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
98 // CPP-CHECK-LABEL: @_Z23test_svqrshrunt_n_s64_1u12__SVUint32_tu11__SVInt64_t(
99 // CPP-CHECK-NEXT: entry:
100 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sqrshrunt.nxv2i64(<vscale x 4 x i32> [[OP:%.*]], <vscale x 2 x i64> [[OP1:%.*]], i32 32)
101 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]
103 svuint32_t
test_svqrshrunt_n_s64_1(svuint32_t op
, svint64_t op1
)
105 return SVE_ACLE_FUNC(svqrshrunt
,_n_s64
,,)(op
, op1
, 32);