clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   6
   7 #include <arm_sve.h>
   8
   9 // CHECK-LABEL: @test_svcntp_c8_vlx2(
  10 // CHECK-NEXT:  entry:
  11 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  12 // CHECK-NEXT:    ret i64 [[TMP0]]
  13 //
  14 // CPP-CHECK-LABEL: @_Z19test_svcntp_c8_vlx2u11__SVCount_t(
  15 // CPP-CHECK-NEXT:  entry:
  16 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  17 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  18 //
  19 uint64_t test_svcntp_c8_vlx2(svcount_t pnn) {
  20   return svcntp_c8(pnn, 2);
  21 }
  22
  23 // CHECK-LABEL: @test_svcntp_c8_vlx4(
  24 // CHECK-NEXT:  entry:
  25 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  26 // CHECK-NEXT:    ret i64 [[TMP0]]
  27 //
  28 // CPP-CHECK-LABEL: @_Z19test_svcntp_c8_vlx4u11__SVCount_t(
  29 // CPP-CHECK-NEXT:  entry:
  30 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  31 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  32 //
  33 uint64_t test_svcntp_c8_vlx4(svcount_t pnn) {
  34   return svcntp_c8(pnn, 4);
  35 }
  36
  37 // CHECK-LABEL: @test_svcntp_c16_vlx2(
  38 // CHECK-NEXT:  entry:
  39 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  40 // CHECK-NEXT:    ret i64 [[TMP0]]
  41 //
  42 // CPP-CHECK-LABEL: @_Z20test_svcntp_c16_vlx2u11__SVCount_t(
  43 // CPP-CHECK-NEXT:  entry:
  44 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  45 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  46 //
  47 uint64_t test_svcntp_c16_vlx2(svcount_t pnn) {
  48   return svcntp_c16(pnn, 2);
  49 }
  50
  51 // CHECK-LABEL: @test_svcntp_c16_vlx4(
  52 // CHECK-NEXT:  entry:
  53 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  54 // CHECK-NEXT:    ret i64 [[TMP0]]
  55 //
  56 // CPP-CHECK-LABEL: @_Z20test_svcntp_c16_vlx4u11__SVCount_t(
  57 // CPP-CHECK-NEXT:  entry:
  58 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  59 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  60 //
  61 uint64_t test_svcntp_c16_vlx4(svcount_t pnn) {
  62   return svcntp_c16(pnn, 4);
  63 }
  64
  65 // CHECK-LABEL: @test_svcntp_c32_vlx2(
  66 // CHECK-NEXT:  entry:
  67 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  68 // CHECK-NEXT:    ret i64 [[TMP0]]
  69 //
  70 // CPP-CHECK-LABEL: @_Z20test_svcntp_c32_vlx2u11__SVCount_t(
  71 // CPP-CHECK-NEXT:  entry:
  72 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  73 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  74 //
  75 uint64_t test_svcntp_c32_vlx2(svcount_t pnn) {
  76   return svcntp_c32(pnn, 2);
  77 }
  78
  79 // CHECK-LABEL: @test_svcntp_c32_vlx4(
  80 // CHECK-NEXT:  entry:
  81 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  82 // CHECK-NEXT:    ret i64 [[TMP0]]
  83 //
  84 // CPP-CHECK-LABEL: @_Z20test_svcntp_c32_vlx4u11__SVCount_t(
  85 // CPP-CHECK-NEXT:  entry:
  86 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount") [[PNN:%.*]], i32 4)
  87 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  88 //
  89 uint64_t test_svcntp_c32_vlx4(svcount_t pnn) {
  90   return svcntp_c32(pnn, 4);
  91 }
  92
  93 // CHECK-LABEL: @test_svcntp_c64_vlx2(
  94 // CHECK-NEXT:  entry:
  95 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount") [[PNN:%.*]], i32 2)
  96 // CHECK-NEXT:    ret i64 [[TMP0]]
  97 //
  98 // CPP-CHECK-LABEL: @_Z20test_svcntp_c64_vlx2u11__SVCount_t(
  99 // CPP-CHECK-NEXT:  entry:
 100 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount") [[PNN:%.*]], i32 2)
 101 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 102 //
 103 uint64_t test_svcntp_c64_vlx2(svcount_t pnn) {
 104   return svcntp_c64(pnn, 2);
 105 }
 106
 107 // CHECK-LABEL: @test_svcntp_c64_vlx4(
 108 // CHECK-NEXT:  entry:
 109 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount") [[PNN:%.*]], i32 4)
 110 // CHECK-NEXT:    ret i64 [[TMP0]]
 111 //
 112 // CPP-CHECK-LABEL: @_Z20test_svcntp_c64_vlx4u11__SVCount_t(
 113 // CPP-CHECK-NEXT:  entry:
 114 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount") [[PNN:%.*]], i32 4)
 115 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 116 //
 117 uint64_t test_svcntp_c64_vlx4(svcount_t pnn) {
 118   return svcntp_c64(pnn, 4);
 119 }