Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / CodeGen / aarch64-sve2p1-intrinsics / acle_sve2p1_fclamp.c
blobd9f0e2af6026b0bae971a314edcfe21d772b2547
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: aarch64-registered-target
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 \
4 // RUN: -S -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2p1 \
6 // RUN: -S -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
7 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 \
8 // RUN: -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
9 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2p1 \
10 // RUN: -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
11 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 \
12 // RUN: -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
14 #include <arm_sve.h>
16 #ifdef SVE_OVERLOADED_FORMS
17 // A simple used,unused... macro, long enough to represent any SVE builtin.
18 #define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
19 #else
20 #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
21 #endif
23 // CHECK-LABEL: @test_svclamp_f16(
24 // CHECK-NEXT: entry:
25 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fclamp.nxv8f16(<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]], <vscale x 8 x half> [[OP3:%.*]])
26 // CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]
28 // CPP-CHECK-LABEL: @_Z16test_svclamp_f16u13__SVFloat16_tS_S_(
29 // CPP-CHECK-NEXT: entry:
30 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fclamp.nxv8f16(<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]], <vscale x 8 x half> [[OP3:%.*]])
31 // CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]]
33 svfloat16_t test_svclamp_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) {
34 return SVE_ACLE_FUNC(svclamp, _f16, , )(op1, op2, op3);
37 // CHECK-LABEL: @test_svclamp_f32(
38 // CHECK-NEXT: entry:
39 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fclamp.nxv4f32(<vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]], <vscale x 4 x float> [[OP3:%.*]])
40 // CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]
42 // CPP-CHECK-LABEL: @_Z16test_svclamp_f32u13__SVFloat32_tS_S_(
43 // CPP-CHECK-NEXT: entry:
44 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fclamp.nxv4f32(<vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]], <vscale x 4 x float> [[OP3:%.*]])
45 // CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]]
47 svfloat32_t test_svclamp_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) {
48 return SVE_ACLE_FUNC(svclamp, _f32, , )(op1, op2, op3);
51 // CHECK-LABEL: @test_svclamp_f64(
52 // CHECK-NEXT: entry:
53 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fclamp.nxv2f64(<vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]], <vscale x 2 x double> [[OP3:%.*]])
54 // CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]
56 // CPP-CHECK-LABEL: @_Z16test_svclamp_f64u13__SVFloat64_tS_S_(
57 // CPP-CHECK-NEXT: entry:
58 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fclamp.nxv2f64(<vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]], <vscale x 2 x double> [[OP3:%.*]])
59 // CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]]
61 svfloat64_t test_svclamp_f64(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) {
62 return SVE_ACLE_FUNC(svclamp, _f64, , )(op1, op2, op3);