clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pext.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
   5
   6 #include <arm_sve.h>
   7
   8 // CHECK-LABEL: @test_svpext_lane_c8_0(
   9 // CHECK-NEXT:  entry:
  10 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 0)
  11 // CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP0]]
  12 //
  13 // CPP-CHECK-LABEL: @_Z21test_svpext_lane_c8_0u11__SVCount_t(
  14 // CPP-CHECK-NEXT:  entry:
  15 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 0)
  16 // CPP-CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP0]]
  17 //
  18 svbool_t test_svpext_lane_c8_0(svcount_t c) {
  19   return svpext_lane_c8(c, 0);
  20 }
  21
  22 // CHECK-LABEL: @test_svpext_lane_c8_3(
  23 // CHECK-NEXT:  entry:
  24 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 3)
  25 // CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP0]]
  26 //
  27 // CPP-CHECK-LABEL: @_Z21test_svpext_lane_c8_3u11__SVCount_t(
  28 // CPP-CHECK-NEXT:  entry:
  29 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 3)
  30 // CPP-CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP0]]
  31 //
  32 svbool_t test_svpext_lane_c8_3(svcount_t c) {
  33   return svpext_lane_c8(c, 3);
  34 }
  35
  36 // CHECK-LABEL: @test_svpext_lane_c16_0(
  37 // CHECK-NEXT:  entry:
  38 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.pext.nxv8i1(target("aarch64.svcount") [[C:%.*]], i32 0)
  39 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])
  40 // CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
  41 //
  42 // CPP-CHECK-LABEL: @_Z22test_svpext_lane_c16_0u11__SVCount_t(
  43 // CPP-CHECK-NEXT:  entry:
  44 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.pext.nxv8i1(target("aarch64.svcount") [[C:%.*]], i32 0)
  45 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])
  46 // CPP-CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
  47 //
  48 svbool_t test_svpext_lane_c16_0(svcount_t c) {
  49   return svpext_lane_c16(c, 0);
  50 }
  51
  52 // CHECK-LABEL: @test_svpext_lane_c16_3(
  53 // CHECK-NEXT:  entry:
  54 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.pext.nxv8i1(target("aarch64.svcount") [[C:%.*]], i32 3)
  55 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])
  56 // CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
  57 //
  58 // CPP-CHECK-LABEL: @_Z22test_svpext_lane_c16_3u11__SVCount_t(
  59 // CPP-CHECK-NEXT:  entry:
  60 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.pext.nxv8i1(target("aarch64.svcount") [[C:%.*]], i32 3)
  61 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])
  62 // CPP-CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
  63 //
  64 svbool_t test_svpext_lane_c16_3(svcount_t c) {
  65   return svpext_lane_c16(c, 3);
  66 }
  67
  68 // CHECK-LABEL: @test_svpext_lane_c32_0(
  69 // CHECK-NEXT:  entry:
  70 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.pext.nxv4i1(target("aarch64.svcount") [[C:%.*]], i32 0)
  71 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]])
  72 // CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
  73 //
  74 // CPP-CHECK-LABEL: @_Z22test_svpext_lane_c32_0u11__SVCount_t(
  75 // CPP-CHECK-NEXT:  entry:
  76 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.pext.nxv4i1(target("aarch64.svcount") [[C:%.*]], i32 0)
  77 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]])
  78 // CPP-CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
  79 //
  80 svbool_t test_svpext_lane_c32_0(svcount_t c) {
  81   return svpext_lane_c32(c, 0);
  82 }
  83
  84 // CHECK-LABEL: @test_svpext_lane_c32_3(
  85 // CHECK-NEXT:  entry:
  86 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.pext.nxv4i1(target("aarch64.svcount") [[C:%.*]], i32 3)
  87 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]])
  88 // CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
  89 //
  90 // CPP-CHECK-LABEL: @_Z22test_svpext_lane_c32_3u11__SVCount_t(
  91 // CPP-CHECK-NEXT:  entry:
  92 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.pext.nxv4i1(target("aarch64.svcount") [[C:%.*]], i32 3)
  93 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]])
  94 // CPP-CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
  95 //
  96 svbool_t test_svpext_lane_c32_3(svcount_t c) {
  97   return svpext_lane_c32(c, 3);
  98 }
  99
 100 // CHECK-LABEL: @test_svpext_lane_c64_0(
 101 // CHECK-NEXT:  entry:
 102 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.pext.nxv2i1(target("aarch64.svcount") [[C:%.*]], i32 0)
 103 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]])
 104 // CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
 105 //
 106 // CPP-CHECK-LABEL: @_Z22test_svpext_lane_c64_0u11__SVCount_t(
 107 // CPP-CHECK-NEXT:  entry:
 108 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.pext.nxv2i1(target("aarch64.svcount") [[C:%.*]], i32 0)
 109 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]])
 110 // CPP-CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
 111 //
 112 svbool_t test_svpext_lane_c64_0(svcount_t c) {
 113   return svpext_lane_c64(c, 0);
 114 }
 115
 116 // CHECK-LABEL: @test_svpext_lane_c64_3(
 117 // CHECK-NEXT:  entry:
 118 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.pext.nxv2i1(target("aarch64.svcount") [[C:%.*]], i32 3)
 119 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]])
 120 // CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
 121 //
 122 // CPP-CHECK-LABEL: @_Z22test_svpext_lane_c64_3u11__SVCount_t(
 123 // CPP-CHECK-NEXT:  entry:
 124 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.pext.nxv2i1(target("aarch64.svcount") [[C:%.*]], i32 3)
 125 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]])
 126 // CPP-CHECK-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
 127 //
 128 svbool_t test_svpext_lane_c64_3(svcount_t c) {
 129   return svpext_lane_c64(c, 3);
 130 }
 131
 132 // CHECK-LABEL: @test_svpext_lane_c8_x2_0(
 133 // CHECK-NEXT:  entry:
 134 // CHECK-NEXT:    [[TMP0:%.*]] = tail call { <vscale x 16 x i1>, <vscale x 16 x i1> } @llvm.aarch64.sve.pext.x2.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 0)
 135 // CHECK-NEXT:    [[TMP1:%.*]] = extractvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP0]], 0
 136 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> poison, <vscale x 16 x i1> [[TMP1]], i64 0)
 137 // CHECK-NEXT:    [[TMP3:%.*]] = extractvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP0]], 1
 138 // CHECK-NEXT:    [[TMP4:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP2]], <vscale x 16 x i1> [[TMP3]], i64 16)
 139 // CHECK-NEXT:    ret <vscale x 32 x i1> [[TMP4]]
 140 //
 141 // CPP-CHECK-LABEL: @_Z24test_svpext_lane_c8_x2_0u11__SVCount_t(
 142 // CPP-CHECK-NEXT:  entry:
 143 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call { <vscale x 16 x i1>, <vscale x 16 x i1> } @llvm.aarch64.sve.pext.x2.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 0)
 144 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = extractvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP0]], 0
 145 // CPP-CHECK-NEXT:    [[TMP2:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> poison, <vscale x 16 x i1> [[TMP1]], i64 0)
 146 // CPP-CHECK-NEXT:    [[TMP3:%.*]] = extractvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP0]], 1
 147 // CPP-CHECK-NEXT:    [[TMP4:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP2]], <vscale x 16 x i1> [[TMP3]], i64 16)
 148 // CPP-CHECK-NEXT:    ret <vscale x 32 x i1> [[TMP4]]
 149 //
 150 svboolx2_t test_svpext_lane_c8_x2_0(svcount_t c) {
 151   return svpext_lane_c8_x2(c, 0);
 152 }