Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / CodeGen / aarch64-sve2p1-intrinsics / acle_sve2p1_psel.c
blob6ada27c6d8da46eecf736ac32940590814ef9e64
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: aarch64-registered-target
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu \
4 // RUN: -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s
5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu \
6 // RUN: -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
7 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
9 #include <arm_sve.h>
11 // CHECK-LABEL: @test_svpsel_lane_b8(
12 // CHECK-NEXT: entry:
13 // CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 15
14 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv16i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 16 x i1> [[P2:%.*]], i32 [[ADD]])
15 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
17 // CPP-CHECK-LABEL: @_Z19test_svpsel_lane_b8u10__SVBool_tS_j(
18 // CPP-CHECK-NEXT: entry:
19 // CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 15
20 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv16i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 16 x i1> [[P2:%.*]], i32 [[ADD]])
21 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
23 svbool_t test_svpsel_lane_b8(svbool_t p1, svbool_t p2, uint32_t idx) {
24 return svpsel_lane_b8(p1, p2, idx + 15);
27 // CHECK-LABEL: @test_svpsel_lane_b16(
28 // CHECK-NEXT: entry:
29 // CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 7
30 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[P2:%.*]])
31 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv8i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 8 x i1> [[TMP0]], i32 [[ADD]])
32 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
34 // CPP-CHECK-LABEL: @_Z20test_svpsel_lane_b16u10__SVBool_tS_j(
35 // CPP-CHECK-NEXT: entry:
36 // CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 7
37 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[P2:%.*]])
38 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv8i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 8 x i1> [[TMP0]], i32 [[ADD]])
39 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
41 svbool_t test_svpsel_lane_b16(svbool_t p1, svbool_t p2, uint32_t idx) {
42 return svpsel_lane_b16(p1, p2, idx + 7);
45 // CHECK-LABEL: @test_svpsel_lane_b32(
46 // CHECK-NEXT: entry:
47 // CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 3
48 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[P2:%.*]])
49 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv4i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[ADD]])
50 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
52 // CPP-CHECK-LABEL: @_Z20test_svpsel_lane_b32u10__SVBool_tS_j(
53 // CPP-CHECK-NEXT: entry:
54 // CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 3
55 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[P2:%.*]])
56 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv4i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[ADD]])
57 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
59 svbool_t test_svpsel_lane_b32(svbool_t p1, svbool_t p2, uint32_t idx) {
60 return svpsel_lane_b32(p1, p2, idx + 3);
63 // CHECK-LABEL: @test_svpsel_lane_b64(
64 // CHECK-NEXT: entry:
65 // CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 1
66 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[P2:%.*]])
67 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv2i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 2 x i1> [[TMP0]], i32 [[ADD]])
68 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
70 // CPP-CHECK-LABEL: @_Z20test_svpsel_lane_b64u10__SVBool_tS_j(
71 // CPP-CHECK-NEXT: entry:
72 // CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 1
73 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[P2:%.*]])
74 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv2i1(<vscale x 16 x i1> [[P1:%.*]], <vscale x 2 x i1> [[TMP0]], i32 [[ADD]])
75 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
77 svbool_t test_svpsel_lane_b64(svbool_t p1, svbool_t p2, uint32_t idx) {
78 return svpsel_lane_b64(p1, p2, idx + 1);
81 // CHECK-LABEL: @test_svpsel_lane_c8(
82 // CHECK-NEXT: entry:
83 // CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 15
84 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.taarch64.svcountt(target("aarch64.svcount") [[P1:%.*]])
85 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv16i1(<vscale x 16 x i1> [[TMP0]], <vscale x 16 x i1> [[P2:%.*]], i32 [[ADD]])
86 // CHECK-NEXT: [[TMP2:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.convert.from.svbool.taarch64.svcountt(<vscale x 16 x i1> [[TMP1]])
87 // CHECK-NEXT: ret target("aarch64.svcount") [[TMP2]]
89 // CPP-CHECK-LABEL: @_Z19test_svpsel_lane_c8u11__SVCount_tu10__SVBool_tj(
90 // CPP-CHECK-NEXT: entry:
91 // CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 15
92 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.taarch64.svcountt(target("aarch64.svcount") [[P1:%.*]])
93 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv16i1(<vscale x 16 x i1> [[TMP0]], <vscale x 16 x i1> [[P2:%.*]], i32 [[ADD]])
94 // CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.convert.from.svbool.taarch64.svcountt(<vscale x 16 x i1> [[TMP1]])
95 // CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP2]]
97 svcount_t test_svpsel_lane_c8(svcount_t p1, svbool_t p2, uint32_t idx) {
98 return svpsel_lane_c8(p1, p2, idx + 15);
101 // CHECK-LABEL: @test_svpsel_lane_c16(
102 // CHECK-NEXT: entry:
103 // CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 7
104 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.taarch64.svcountt(target("aarch64.svcount") [[P1:%.*]])
105 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[P2:%.*]])
106 // CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv8i1(<vscale x 16 x i1> [[TMP0]], <vscale x 8 x i1> [[TMP1]], i32 [[ADD]])
107 // CHECK-NEXT: [[TMP3:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.convert.from.svbool.taarch64.svcountt(<vscale x 16 x i1> [[TMP2]])
108 // CHECK-NEXT: ret target("aarch64.svcount") [[TMP3]]
110 // CPP-CHECK-LABEL: @_Z20test_svpsel_lane_c16u11__SVCount_tu10__SVBool_tj(
111 // CPP-CHECK-NEXT: entry:
112 // CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 7
113 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.taarch64.svcountt(target("aarch64.svcount") [[P1:%.*]])
114 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[P2:%.*]])
115 // CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv8i1(<vscale x 16 x i1> [[TMP0]], <vscale x 8 x i1> [[TMP1]], i32 [[ADD]])
116 // CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.convert.from.svbool.taarch64.svcountt(<vscale x 16 x i1> [[TMP2]])
117 // CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP3]]
119 svcount_t test_svpsel_lane_c16(svcount_t p1, svbool_t p2, uint32_t idx) {
120 return svpsel_lane_c16(p1, p2, idx + 7);
123 // CHECK-LABEL: @test_svpsel_lane_c32(
124 // CHECK-NEXT: entry:
125 // CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 3
126 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.taarch64.svcountt(target("aarch64.svcount") [[P1:%.*]])
127 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[P2:%.*]])
128 // CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv4i1(<vscale x 16 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], i32 [[ADD]])
129 // CHECK-NEXT: [[TMP3:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.convert.from.svbool.taarch64.svcountt(<vscale x 16 x i1> [[TMP2]])
130 // CHECK-NEXT: ret target("aarch64.svcount") [[TMP3]]
132 // CPP-CHECK-LABEL: @_Z20test_svpsel_lane_c32u11__SVCount_tu10__SVBool_tj(
133 // CPP-CHECK-NEXT: entry:
134 // CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 3
135 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.taarch64.svcountt(target("aarch64.svcount") [[P1:%.*]])
136 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[P2:%.*]])
137 // CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv4i1(<vscale x 16 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], i32 [[ADD]])
138 // CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.convert.from.svbool.taarch64.svcountt(<vscale x 16 x i1> [[TMP2]])
139 // CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP3]]
141 svcount_t test_svpsel_lane_c32(svcount_t p1, svbool_t p2, uint32_t idx) {
142 return svpsel_lane_c32(p1, p2, idx + 3);
145 // CHECK-LABEL: @test_svpsel_lane_c64(
146 // CHECK-NEXT: entry:
147 // CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 1
148 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.taarch64.svcountt(target("aarch64.svcount") [[P1:%.*]])
149 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[P2:%.*]])
150 // CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv2i1(<vscale x 16 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], i32 [[ADD]])
151 // CHECK-NEXT: [[TMP3:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.convert.from.svbool.taarch64.svcountt(<vscale x 16 x i1> [[TMP2]])
152 // CHECK-NEXT: ret target("aarch64.svcount") [[TMP3]]
154 // CPP-CHECK-LABEL: @_Z20test_svpsel_lane_c64u11__SVCount_tu10__SVBool_tj(
155 // CPP-CHECK-NEXT: entry:
156 // CPP-CHECK-NEXT: [[ADD:%.*]] = add i32 [[IDX:%.*]], 1
157 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.taarch64.svcountt(target("aarch64.svcount") [[P1:%.*]])
158 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[P2:%.*]])
159 // CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.psel.nxv2i1(<vscale x 16 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], i32 [[ADD]])
160 // CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.convert.from.svbool.taarch64.svcountt(<vscale x 16 x i1> [[TMP2]])
161 // CPP-CHECK-NEXT: ret target("aarch64.svcount") [[TMP3]]
163 svcount_t test_svpsel_lane_c64(svcount_t p1, svbool_t p2, uint32_t idx) {
164 return svpsel_lane_c64(p1, p2, idx + 1);