clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
   3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
   4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   5
   6 // REQUIRES: aarch64-registered-target
   7
   8 #include <arm_sve.h>
   9
  10
  11 // WHILEGE
  12
  13 // CHECK-LABEL: @test_svwhilege_c8_vl2(
  14 // CHECK-NEXT:  entry:
  15 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
  16 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  17 //
  18 // CPP-CHECK-LABEL: @_Z21test_svwhilege_c8_vl2ll(
  19 // CPP-CHECK-NEXT:  entry:
  20 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
  21 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  22 //
  23 svcount_t test_svwhilege_c8_vl2(int64_t op1, int64_t op2)
  24 {
  25   return svwhilege_c8(op1, op2, 2);
  26 }
  27
  28 // CHECK-LABEL: @test_svwhilege_c8_vl4(
  29 // CHECK-NEXT:  entry:
  30 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
  31 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  32 //
  33 // CPP-CHECK-LABEL: @_Z21test_svwhilege_c8_vl4ll(
  34 // CPP-CHECK-NEXT:  entry:
  35 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
  36 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  37 //
  38 svcount_t test_svwhilege_c8_vl4(int64_t op1, int64_t op2)
  39 {
  40   return svwhilege_c8(op1, op2, 4);
  41 }
  42
  43 // CHECK-LABEL: @test_svwhilege_c16_vl2(
  44 // CHECK-NEXT:  entry:
  45 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
  46 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  47 //
  48 // CPP-CHECK-LABEL: @_Z22test_svwhilege_c16_vl2ll(
  49 // CPP-CHECK-NEXT:  entry:
  50 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
  51 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  52 //
  53 svcount_t test_svwhilege_c16_vl2(int64_t op1, int64_t op2)
  54 {
  55   return svwhilege_c16(op1, op2, 2);
  56 }
  57
  58 // CHECK-LABEL: @test_svwhilege_c16_vl4(
  59 // CHECK-NEXT:  entry:
  60 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
  61 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  62 //
  63 // CPP-CHECK-LABEL: @_Z22test_svwhilege_c16_vl4ll(
  64 // CPP-CHECK-NEXT:  entry:
  65 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
  66 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  67 //
  68 svcount_t test_svwhilege_c16_vl4(int64_t op1, int64_t op2)
  69 {
  70   return svwhilege_c16(op1, op2, 4);
  71 }
  72
  73 // CHECK-LABEL: @test_svwhilege_c32_vl2(
  74 // CHECK-NEXT:  entry:
  75 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
  76 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  77 //
  78 // CPP-CHECK-LABEL: @_Z22test_svwhilege_c32_vl2ll(
  79 // CPP-CHECK-NEXT:  entry:
  80 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
  81 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  82 //
  83 svcount_t test_svwhilege_c32_vl2(int64_t op1, int64_t op2)
  84 {
  85   return svwhilege_c32(op1, op2, 2);
  86 }
  87
  88 // CHECK-LABEL: @test_svwhilege_c32_vl4(
  89 // CHECK-NEXT:  entry:
  90 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
  91 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  92 //
  93 // CPP-CHECK-LABEL: @_Z22test_svwhilege_c32_vl4ll(
  94 // CPP-CHECK-NEXT:  entry:
  95 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
  96 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
  97 //
  98 svcount_t test_svwhilege_c32_vl4(int64_t op1, int64_t op2)
  99 {
 100   return svwhilege_c32(op1, op2, 4);
 101 }
 102
 103 // CHECK-LABEL: @test_svwhilege_c64_vl2(
 104 // CHECK-NEXT:  entry:
 105 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 106 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 107 //
 108 // CPP-CHECK-LABEL: @_Z22test_svwhilege_c64_vl2ll(
 109 // CPP-CHECK-NEXT:  entry:
 110 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 111 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 112 //
 113 svcount_t test_svwhilege_c64_vl2(int64_t op1, int64_t op2)
 114 {
 115   return svwhilege_c64(op1, op2, 2);
 116 }
 117
 118 // CHECK-LABEL: @test_svwhilege_c64_vl4(
 119 // CHECK-NEXT:  entry:
 120 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 121 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 122 //
 123 // CPP-CHECK-LABEL: @_Z22test_svwhilege_c64_vl4ll(
 124 // CPP-CHECK-NEXT:  entry:
 125 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilege.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 126 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 127 //
 128 svcount_t test_svwhilege_c64_vl4(int64_t op1, int64_t op2)
 129 {
 130   return svwhilege_c64(op1, op2, 4);
 131 }
 132
 133 // WHILEGT
 134
 135
 136 // CHECK-LABEL: @test_svwhilegt_c8_vl2(
 137 // CHECK-NEXT:  entry:
 138 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 139 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 140 //
 141 // CPP-CHECK-LABEL: @_Z21test_svwhilegt_c8_vl2ll(
 142 // CPP-CHECK-NEXT:  entry:
 143 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 144 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 145 //
 146 svcount_t test_svwhilegt_c8_vl2(int64_t op1, int64_t op2)
 147 {
 148   return svwhilegt_c8(op1, op2, 2);
 149 }
 150
 151 // CHECK-LABEL: @test_svwhilegt_c8_vl4(
 152 // CHECK-NEXT:  entry:
 153 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 154 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 155 //
 156 // CPP-CHECK-LABEL: @_Z21test_svwhilegt_c8_vl4ll(
 157 // CPP-CHECK-NEXT:  entry:
 158 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 159 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 160 //
 161 svcount_t test_svwhilegt_c8_vl4(int64_t op1, int64_t op2)
 162 {
 163   return svwhilegt_c8(op1, op2, 4);
 164 }
 165
 166 // CHECK-LABEL: @test_svwhilegt_c16_vl2(
 167 // CHECK-NEXT:  entry:
 168 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 169 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 170 //
 171 // CPP-CHECK-LABEL: @_Z22test_svwhilegt_c16_vl2ll(
 172 // CPP-CHECK-NEXT:  entry:
 173 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 174 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 175 //
 176 svcount_t test_svwhilegt_c16_vl2(int64_t op1, int64_t op2)
 177 {
 178   return svwhilegt_c16(op1, op2, 2);
 179 }
 180
 181 // CHECK-LABEL: @test_svwhilegt_c16_vl4(
 182 // CHECK-NEXT:  entry:
 183 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 184 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 185 //
 186 // CPP-CHECK-LABEL: @_Z22test_svwhilegt_c16_vl4ll(
 187 // CPP-CHECK-NEXT:  entry:
 188 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 189 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 190 //
 191 svcount_t test_svwhilegt_c16_vl4(int64_t op1, int64_t op2)
 192 {
 193   return svwhilegt_c16(op1, op2, 4);
 194 }
 195
 196 // CHECK-LABEL: @test_svwhilegt_c32_vl2(
 197 // CHECK-NEXT:  entry:
 198 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 199 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 200 //
 201 // CPP-CHECK-LABEL: @_Z22test_svwhilegt_c32_vl2ll(
 202 // CPP-CHECK-NEXT:  entry:
 203 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 204 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 205 //
 206 svcount_t test_svwhilegt_c32_vl2(int64_t op1, int64_t op2)
 207 {
 208   return svwhilegt_c32(op1, op2, 2);
 209 }
 210
 211 // CHECK-LABEL: @test_svwhilegt_c32_vl4(
 212 // CHECK-NEXT:  entry:
 213 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 214 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 215 //
 216 // CPP-CHECK-LABEL: @_Z22test_svwhilegt_c32_vl4ll(
 217 // CPP-CHECK-NEXT:  entry:
 218 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 219 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 220 //
 221 svcount_t test_svwhilegt_c32_vl4(int64_t op1, int64_t op2)
 222 {
 223   return svwhilegt_c32(op1, op2, 4);
 224 }
 225
 226 // CHECK-LABEL: @test_svwhilegt_c64_vl2(
 227 // CHECK-NEXT:  entry:
 228 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 229 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 230 //
 231 // CPP-CHECK-LABEL: @_Z22test_svwhilegt_c64_vl2ll(
 232 // CPP-CHECK-NEXT:  entry:
 233 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 234 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 235 //
 236 svcount_t test_svwhilegt_c64_vl2(int64_t op1, int64_t op2)
 237 {
 238   return svwhilegt_c64(op1, op2, 2);
 239 }
 240
 241 // CHECK-LABEL: @test_svwhilegt_c64_vl4(
 242 // CHECK-NEXT:  entry:
 243 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 244 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 245 //
 246 // CPP-CHECK-LABEL: @_Z22test_svwhilegt_c64_vl4ll(
 247 // CPP-CHECK-NEXT:  entry:
 248 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilegt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 249 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 250 //
 251 svcount_t test_svwhilegt_c64_vl4(int64_t op1, int64_t op2)
 252 {
 253   return svwhilegt_c64(op1, op2, 4);
 254 }
 255
 256
 257 // WHILEHI
 258
 259 // CHECK-LABEL: @test_svwhilehi_c8_vl2(
 260 // CHECK-NEXT:  entry:
 261 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 262 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 263 //
 264 // CPP-CHECK-LABEL: @_Z21test_svwhilehi_c8_vl2mm(
 265 // CPP-CHECK-NEXT:  entry:
 266 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 267 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 268 //
 269 svcount_t test_svwhilehi_c8_vl2(uint64_t op1, uint64_t op2)
 270 {
 271   return svwhilehi_c8(op1, op2, 2);
 272 }
 273
 274 // CHECK-LABEL: @test_svwhilehi_c8_vl4(
 275 // CHECK-NEXT:  entry:
 276 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 277 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 278 //
 279 // CPP-CHECK-LABEL: @_Z21test_svwhilehi_c8_vl4mm(
 280 // CPP-CHECK-NEXT:  entry:
 281 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 282 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 283 //
 284 svcount_t test_svwhilehi_c8_vl4(uint64_t op1, uint64_t op2)
 285 {
 286   return svwhilehi_c8(op1, op2, 4);
 287 }
 288
 289 // CHECK-LABEL: @test_svwhilehi_c16_vl2(
 290 // CHECK-NEXT:  entry:
 291 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 292 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 293 //
 294 // CPP-CHECK-LABEL: @_Z22test_svwhilehi_c16_vl2mm(
 295 // CPP-CHECK-NEXT:  entry:
 296 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 297 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 298 //
 299 svcount_t test_svwhilehi_c16_vl2(uint64_t op1, uint64_t op2)
 300 {
 301   return svwhilehi_c16(op1, op2, 2);
 302 }
 303
 304 // CHECK-LABEL: @test_svwhilehi_c16_vl4(
 305 // CHECK-NEXT:  entry:
 306 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 307 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 308 //
 309 // CPP-CHECK-LABEL: @_Z22test_svwhilehi_c16_vl4mm(
 310 // CPP-CHECK-NEXT:  entry:
 311 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 312 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 313 //
 314 svcount_t test_svwhilehi_c16_vl4(uint64_t op1, uint64_t op2)
 315 {
 316   return svwhilehi_c16(op1, op2, 4);
 317 }
 318
 319 // CHECK-LABEL: @test_svwhilehi_c32_vl2(
 320 // CHECK-NEXT:  entry:
 321 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 322 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 323 //
 324 // CPP-CHECK-LABEL: @_Z22test_svwhilehi_c32_vl2mm(
 325 // CPP-CHECK-NEXT:  entry:
 326 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 327 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 328 //
 329 svcount_t test_svwhilehi_c32_vl2(uint64_t op1, uint64_t op2)
 330 {
 331   return svwhilehi_c32(op1, op2, 2);
 332 }
 333
 334 // CHECK-LABEL: @test_svwhilehi_c32_vl4(
 335 // CHECK-NEXT:  entry:
 336 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 337 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 338 //
 339 // CPP-CHECK-LABEL: @_Z22test_svwhilehi_c32_vl4mm(
 340 // CPP-CHECK-NEXT:  entry:
 341 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 342 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 343 //
 344 svcount_t test_svwhilehi_c32_vl4(uint64_t op1, uint64_t op2)
 345 {
 346   return svwhilehi_c32(op1, op2, 4);
 347 }
 348
 349 // CHECK-LABEL: @test_svwhilehi_c64_vl2(
 350 // CHECK-NEXT:  entry:
 351 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 352 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 353 //
 354 // CPP-CHECK-LABEL: @_Z22test_svwhilehi_c64_vl2mm(
 355 // CPP-CHECK-NEXT:  entry:
 356 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 357 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 358 //
 359 svcount_t test_svwhilehi_c64_vl2(uint64_t op1, uint64_t op2)
 360 {
 361   return svwhilehi_c64(op1, op2, 2);
 362 }
 363
 364 // CHECK-LABEL: @test_svwhilehi_c64_vl4(
 365 // CHECK-NEXT:  entry:
 366 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 367 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 368 //
 369 // CPP-CHECK-LABEL: @_Z22test_svwhilehi_c64_vl4mm(
 370 // CPP-CHECK-NEXT:  entry:
 371 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehi.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 372 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 373 //
 374 svcount_t test_svwhilehi_c64_vl4(uint64_t op1, uint64_t op2)
 375 {
 376   return svwhilehi_c64(op1, op2, 4);
 377 }
 378
 379
 380 // WHILEHS
 381
 382 // CHECK-LABEL: @test_svwhilehs_c8_vl2(
 383 // CHECK-NEXT:  entry:
 384 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 385 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 386 //
 387 // CPP-CHECK-LABEL: @_Z21test_svwhilehs_c8_vl2mm(
 388 // CPP-CHECK-NEXT:  entry:
 389 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 390 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 391 //
 392 svcount_t test_svwhilehs_c8_vl2(uint64_t op1, uint64_t op2)
 393 {
 394   return svwhilehs_c8(op1, op2, 2);
 395 }
 396
 397 // CHECK-LABEL: @test_svwhilehs_c8_vl4(
 398 // CHECK-NEXT:  entry:
 399 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 400 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 401 //
 402 // CPP-CHECK-LABEL: @_Z21test_svwhilehs_c8_vl4mm(
 403 // CPP-CHECK-NEXT:  entry:
 404 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 405 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 406 //
 407 svcount_t test_svwhilehs_c8_vl4(uint64_t op1, uint64_t op2)
 408 {
 409   return svwhilehs_c8(op1, op2, 4);
 410 }
 411
 412 // CHECK-LABEL: @test_svwhilehs_c16_vl2(
 413 // CHECK-NEXT:  entry:
 414 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 415 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 416 //
 417 // CPP-CHECK-LABEL: @_Z22test_svwhilehs_c16_vl2mm(
 418 // CPP-CHECK-NEXT:  entry:
 419 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 420 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 421 //
 422 svcount_t test_svwhilehs_c16_vl2(uint64_t op1, uint64_t op2)
 423 {
 424   return svwhilehs_c16(op1, op2, 2);
 425 }
 426
 427 // CHECK-LABEL: @test_svwhilehs_c16_vl4(
 428 // CHECK-NEXT:  entry:
 429 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 430 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 431 //
 432 // CPP-CHECK-LABEL: @_Z22test_svwhilehs_c16_vl4mm(
 433 // CPP-CHECK-NEXT:  entry:
 434 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 435 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 436 //
 437 svcount_t test_svwhilehs_c16_vl4(uint64_t op1, uint64_t op2)
 438 {
 439   return svwhilehs_c16(op1, op2, 4);
 440 }
 441
 442 // CHECK-LABEL: @test_svwhilehs_c32_vl2(
 443 // CHECK-NEXT:  entry:
 444 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 445 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 446 //
 447 // CPP-CHECK-LABEL: @_Z22test_svwhilehs_c32_vl2mm(
 448 // CPP-CHECK-NEXT:  entry:
 449 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 450 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 451 //
 452 svcount_t test_svwhilehs_c32_vl2(uint64_t op1, uint64_t op2)
 453 {
 454   return svwhilehs_c32(op1, op2, 2);
 455 }
 456
 457 // CHECK-LABEL: @test_svwhilehs_c32_vl4(
 458 // CHECK-NEXT:  entry:
 459 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 460 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 461 //
 462 // CPP-CHECK-LABEL: @_Z22test_svwhilehs_c32_vl4mm(
 463 // CPP-CHECK-NEXT:  entry:
 464 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 465 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 466 //
 467 svcount_t test_svwhilehs_c32_vl4(uint64_t op1, uint64_t op2)
 468 {
 469   return svwhilehs_c32(op1, op2, 4);
 470 }
 471
 472 // CHECK-LABEL: @test_svwhilehs_c64_vl2(
 473 // CHECK-NEXT:  entry:
 474 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 475 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 476 //
 477 // CPP-CHECK-LABEL: @_Z22test_svwhilehs_c64_vl2mm(
 478 // CPP-CHECK-NEXT:  entry:
 479 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 480 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 481 //
 482 svcount_t test_svwhilehs_c64_vl2(uint64_t op1, uint64_t op2)
 483 {
 484   return svwhilehs_c64(op1, op2, 2);
 485 }
 486
 487 // CHECK-LABEL: @test_svwhilehs_c64_vl4(
 488 // CHECK-NEXT:  entry:
 489 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 490 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 491 //
 492 // CPP-CHECK-LABEL: @_Z22test_svwhilehs_c64_vl4mm(
 493 // CPP-CHECK-NEXT:  entry:
 494 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilehs.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 495 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 496 //
 497 svcount_t test_svwhilehs_c64_vl4(uint64_t op1, uint64_t op2)
 498 {
 499   return svwhilehs_c64(op1, op2, 4);
 500 }
 501
 502
 503 // WHILELE
 504
 505 // CHECK-LABEL: @test_svwhilele_c8_vl2(
 506 // CHECK-NEXT:  entry:
 507 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 508 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 509 //
 510 // CPP-CHECK-LABEL: @_Z21test_svwhilele_c8_vl2ll(
 511 // CPP-CHECK-NEXT:  entry:
 512 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 513 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 514 //
 515 svcount_t test_svwhilele_c8_vl2(int64_t op1, int64_t op2)
 516 {
 517   return svwhilele_c8(op1, op2, 2);
 518 }
 519
 520 // CHECK-LABEL: @test_svwhilele_c8_vl4(
 521 // CHECK-NEXT:  entry:
 522 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 523 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 524 //
 525 // CPP-CHECK-LABEL: @_Z21test_svwhilele_c8_vl4ll(
 526 // CPP-CHECK-NEXT:  entry:
 527 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 528 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 529 //
 530 svcount_t test_svwhilele_c8_vl4(int64_t op1, int64_t op2)
 531 {
 532   return svwhilele_c8(op1, op2, 4);
 533 }
 534
 535 // CHECK-LABEL: @test_svwhilele_c16_vl2(
 536 // CHECK-NEXT:  entry:
 537 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 538 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 539 //
 540 // CPP-CHECK-LABEL: @_Z22test_svwhilele_c16_vl2ll(
 541 // CPP-CHECK-NEXT:  entry:
 542 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 543 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 544 //
 545 svcount_t test_svwhilele_c16_vl2(int64_t op1, int64_t op2)
 546 {
 547   return svwhilele_c16(op1, op2, 2);
 548 }
 549
 550 // CHECK-LABEL: @test_svwhilele_c16_vl4(
 551 // CHECK-NEXT:  entry:
 552 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 553 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 554 //
 555 // CPP-CHECK-LABEL: @_Z22test_svwhilele_c16_vl4ll(
 556 // CPP-CHECK-NEXT:  entry:
 557 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 558 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 559 //
 560 svcount_t test_svwhilele_c16_vl4(int64_t op1, int64_t op2)
 561 {
 562   return svwhilele_c16(op1, op2, 4);
 563 }
 564
 565 // CHECK-LABEL: @test_svwhilele_c32_vl2(
 566 // CHECK-NEXT:  entry:
 567 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 568 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 569 //
 570 // CPP-CHECK-LABEL: @_Z22test_svwhilele_c32_vl2ll(
 571 // CPP-CHECK-NEXT:  entry:
 572 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 573 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 574 //
 575 svcount_t test_svwhilele_c32_vl2(int64_t op1, int64_t op2)
 576 {
 577   return svwhilele_c32(op1, op2, 2);
 578 }
 579
 580 // CHECK-LABEL: @test_svwhilele_c32_vl4(
 581 // CHECK-NEXT:  entry:
 582 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 583 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 584 //
 585 // CPP-CHECK-LABEL: @_Z22test_svwhilele_c32_vl4ll(
 586 // CPP-CHECK-NEXT:  entry:
 587 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 588 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 589 //
 590 svcount_t test_svwhilele_c32_vl4(int64_t op1, int64_t op2)
 591 {
 592   return svwhilele_c32(op1, op2, 4);
 593 }
 594
 595 // CHECK-LABEL: @test_svwhilele_c64_vl2(
 596 // CHECK-NEXT:  entry:
 597 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 598 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 599 //
 600 // CPP-CHECK-LABEL: @_Z22test_svwhilele_c64_vl2ll(
 601 // CPP-CHECK-NEXT:  entry:
 602 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 603 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 604 //
 605 svcount_t test_svwhilele_c64_vl2(int64_t op1, int64_t op2)
 606 {
 607   return svwhilele_c64(op1, op2, 2);
 608 }
 609
 610 // CHECK-LABEL: @test_svwhilele_c64_vl4(
 611 // CHECK-NEXT:  entry:
 612 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 613 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 614 //
 615 // CPP-CHECK-LABEL: @_Z22test_svwhilele_c64_vl4ll(
 616 // CPP-CHECK-NEXT:  entry:
 617 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilele.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 618 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 619 //
 620 svcount_t test_svwhilele_c64_vl4(int64_t op1, int64_t op2)
 621 {
 622   return svwhilele_c64(op1, op2, 4);
 623 }
 624
 625
 626 // WHILELO
 627
 628 // CHECK-LABEL: @test_svwhilelo_c8_vl2(
 629 // CHECK-NEXT:  entry:
 630 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 631 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 632 //
 633 // CPP-CHECK-LABEL: @_Z21test_svwhilelo_c8_vl2mm(
 634 // CPP-CHECK-NEXT:  entry:
 635 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 636 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 637 //
 638 svcount_t test_svwhilelo_c8_vl2(uint64_t op1, uint64_t op2)
 639 {
 640   return svwhilelo_c8(op1, op2, 2);
 641 }
 642
 643 // CHECK-LABEL: @test_svwhilelo_c8_vl4(
 644 // CHECK-NEXT:  entry:
 645 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 646 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 647 //
 648 // CPP-CHECK-LABEL: @_Z21test_svwhilelo_c8_vl4mm(
 649 // CPP-CHECK-NEXT:  entry:
 650 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 651 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 652 //
 653 svcount_t test_svwhilelo_c8_vl4(uint64_t op1, uint64_t op2)
 654 {
 655   return svwhilelo_c8(op1, op2, 4);
 656 }
 657
 658 // CHECK-LABEL: @test_svwhilelo_c16_vl2(
 659 // CHECK-NEXT:  entry:
 660 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 661 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 662 //
 663 // CPP-CHECK-LABEL: @_Z22test_svwhilelo_c16_vl2mm(
 664 // CPP-CHECK-NEXT:  entry:
 665 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 666 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 667 //
 668 svcount_t test_svwhilelo_c16_vl2(uint64_t op1, uint64_t op2)
 669 {
 670   return svwhilelo_c16(op1, op2, 2);
 671 }
 672
 673 // CHECK-LABEL: @test_svwhilelo_c16_vl4(
 674 // CHECK-NEXT:  entry:
 675 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 676 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 677 //
 678 // CPP-CHECK-LABEL: @_Z22test_svwhilelo_c16_vl4mm(
 679 // CPP-CHECK-NEXT:  entry:
 680 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 681 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 682 //
 683 svcount_t test_svwhilelo_c16_vl4(uint64_t op1, uint64_t op2)
 684 {
 685   return svwhilelo_c16(op1, op2, 4);
 686 }
 687
 688 // CHECK-LABEL: @test_svwhilelo_c32_vl2(
 689 // CHECK-NEXT:  entry:
 690 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 691 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 692 //
 693 // CPP-CHECK-LABEL: @_Z22test_svwhilelo_c32_vl2mm(
 694 // CPP-CHECK-NEXT:  entry:
 695 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 696 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 697 //
 698 svcount_t test_svwhilelo_c32_vl2(uint64_t op1, uint64_t op2)
 699 {
 700   return svwhilelo_c32(op1, op2, 2);
 701 }
 702
 703 // CHECK-LABEL: @test_svwhilelo_c32_vl4(
 704 // CHECK-NEXT:  entry:
 705 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 706 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 707 //
 708 // CPP-CHECK-LABEL: @_Z22test_svwhilelo_c32_vl4mm(
 709 // CPP-CHECK-NEXT:  entry:
 710 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 711 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 712 //
 713 svcount_t test_svwhilelo_c32_vl4(uint64_t op1, uint64_t op2)
 714 {
 715   return svwhilelo_c32(op1, op2, 4);
 716 }
 717
 718 // CHECK-LABEL: @test_svwhilelo_c64_vl2(
 719 // CHECK-NEXT:  entry:
 720 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 721 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 722 //
 723 // CPP-CHECK-LABEL: @_Z22test_svwhilelo_c64_vl2mm(
 724 // CPP-CHECK-NEXT:  entry:
 725 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 726 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 727 //
 728 svcount_t test_svwhilelo_c64_vl2(uint64_t op1, uint64_t op2)
 729 {
 730   return svwhilelo_c64(op1, op2, 2);
 731 }
 732
 733 // CHECK-LABEL: @test_svwhilelo_c64_vl4(
 734 // CHECK-NEXT:  entry:
 735 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 736 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 737 //
 738 // CPP-CHECK-LABEL: @_Z22test_svwhilelo_c64_vl4mm(
 739 // CPP-CHECK-NEXT:  entry:
 740 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelo.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 741 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 742 //
 743 svcount_t test_svwhilelo_c64_vl4(uint64_t op1, uint64_t op2)
 744 {
 745   return svwhilelo_c64(op1, op2, 4);
 746 }
 747
 748
 749 // WHILELS
 750
 751 // CHECK-LABEL: @test_svwhilels_c8_vl2(
 752 // CHECK-NEXT:  entry:
 753 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 754 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 755 //
 756 // CPP-CHECK-LABEL: @_Z21test_svwhilels_c8_vl2mm(
 757 // CPP-CHECK-NEXT:  entry:
 758 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 759 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 760 //
 761 svcount_t test_svwhilels_c8_vl2(uint64_t op1, uint64_t op2)
 762 {
 763   return svwhilels_c8(op1, op2, 2);
 764 }
 765
 766 // CHECK-LABEL: @test_svwhilels_c8_vl4(
 767 // CHECK-NEXT:  entry:
 768 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 769 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 770 //
 771 // CPP-CHECK-LABEL: @_Z21test_svwhilels_c8_vl4mm(
 772 // CPP-CHECK-NEXT:  entry:
 773 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 774 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 775 //
 776 svcount_t test_svwhilels_c8_vl4(uint64_t op1, uint64_t op2)
 777 {
 778   return svwhilels_c8(op1, op2, 4);
 779 }
 780
 781 // CHECK-LABEL: @test_svwhilels_c16_vl2(
 782 // CHECK-NEXT:  entry:
 783 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 784 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 785 //
 786 // CPP-CHECK-LABEL: @_Z22test_svwhilels_c16_vl2mm(
 787 // CPP-CHECK-NEXT:  entry:
 788 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 789 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 790 //
 791 svcount_t test_svwhilels_c16_vl2(uint64_t op1, uint64_t op2)
 792 {
 793   return svwhilels_c16(op1, op2, 2);
 794 }
 795
 796 // CHECK-LABEL: @test_svwhilels_c16_vl4(
 797 // CHECK-NEXT:  entry:
 798 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 799 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 800 //
 801 // CPP-CHECK-LABEL: @_Z22test_svwhilels_c16_vl4mm(
 802 // CPP-CHECK-NEXT:  entry:
 803 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 804 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 805 //
 806 svcount_t test_svwhilels_c16_vl4(uint64_t op1, uint64_t op2)
 807 {
 808   return svwhilels_c16(op1, op2, 4);
 809 }
 810
 811 // CHECK-LABEL: @test_svwhilels_c32_vl2(
 812 // CHECK-NEXT:  entry:
 813 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 814 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 815 //
 816 // CPP-CHECK-LABEL: @_Z22test_svwhilels_c32_vl2mm(
 817 // CPP-CHECK-NEXT:  entry:
 818 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 819 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 820 //
 821 svcount_t test_svwhilels_c32_vl2(uint64_t op1, uint64_t op2)
 822 {
 823   return svwhilels_c32(op1, op2, 2);
 824 }
 825
 826 // CHECK-LABEL: @test_svwhilels_c32_vl4(
 827 // CHECK-NEXT:  entry:
 828 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 829 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 830 //
 831 // CPP-CHECK-LABEL: @_Z22test_svwhilels_c32_vl4mm(
 832 // CPP-CHECK-NEXT:  entry:
 833 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 834 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 835 //
 836 svcount_t test_svwhilels_c32_vl4(uint64_t op1, uint64_t op2)
 837 {
 838   return svwhilels_c32(op1, op2, 4);
 839 }
 840
 841 // CHECK-LABEL: @test_svwhilels_c64_vl2(
 842 // CHECK-NEXT:  entry:
 843 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 844 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 845 //
 846 // CPP-CHECK-LABEL: @_Z22test_svwhilels_c64_vl2mm(
 847 // CPP-CHECK-NEXT:  entry:
 848 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 849 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 850 //
 851 svcount_t test_svwhilels_c64_vl2(uint64_t op1, uint64_t op2)
 852 {
 853   return svwhilels_c64(op1, op2, 2);
 854 }
 855
 856 // CHECK-LABEL: @test_svwhilels_c64_vl4(
 857 // CHECK-NEXT:  entry:
 858 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 859 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 860 //
 861 // CPP-CHECK-LABEL: @_Z22test_svwhilels_c64_vl4mm(
 862 // CPP-CHECK-NEXT:  entry:
 863 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilels.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 864 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 865 //
 866 svcount_t test_svwhilels_c64_vl4(uint64_t op1, uint64_t op2)
 867 {
 868   return svwhilels_c64(op1, op2, 4);
 869 }
 870
 871
 872 // WHILELT
 873
 874 // CHECK-LABEL: @test_svwhilelt_c8_vl2(
 875 // CHECK-NEXT:  entry:
 876 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 877 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 878 //
 879 // CPP-CHECK-LABEL: @_Z21test_svwhilelt_c8_vl2ll(
 880 // CPP-CHECK-NEXT:  entry:
 881 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 882 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 883 //
 884 svcount_t test_svwhilelt_c8_vl2(int64_t op1, int64_t op2)
 885 {
 886   return svwhilelt_c8(op1, op2, 2);
 887 }
 888
 889 // CHECK-LABEL: @test_svwhilelt_c8_vl4(
 890 // CHECK-NEXT:  entry:
 891 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 892 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 893 //
 894 // CPP-CHECK-LABEL: @_Z21test_svwhilelt_c8_vl4ll(
 895 // CPP-CHECK-NEXT:  entry:
 896 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c8(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 897 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 898 //
 899 svcount_t test_svwhilelt_c8_vl4(int64_t op1, int64_t op2)
 900 {
 901   return svwhilelt_c8(op1, op2, 4);
 902 }
 903
 904 // CHECK-LABEL: @test_svwhilelt_c16_vl2(
 905 // CHECK-NEXT:  entry:
 906 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 907 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 908 //
 909 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_c16_vl2ll(
 910 // CPP-CHECK-NEXT:  entry:
 911 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 912 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 913 //
 914 svcount_t test_svwhilelt_c16_vl2(int64_t op1, int64_t op2)
 915 {
 916   return svwhilelt_c16(op1, op2, 2);
 917 }
 918
 919 // CHECK-LABEL: @test_svwhilelt_c16_vl4(
 920 // CHECK-NEXT:  entry:
 921 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 922 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 923 //
 924 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_c16_vl4ll(
 925 // CPP-CHECK-NEXT:  entry:
 926 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c16(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 927 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 928 //
 929 svcount_t test_svwhilelt_c16_vl4(int64_t op1, int64_t op2)
 930 {
 931   return svwhilelt_c16(op1, op2, 4);
 932 }
 933
 934 // CHECK-LABEL: @test_svwhilelt_c32_vl2(
 935 // CHECK-NEXT:  entry:
 936 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 937 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 938 //
 939 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_c32_vl2ll(
 940 // CPP-CHECK-NEXT:  entry:
 941 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 942 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 943 //
 944 svcount_t test_svwhilelt_c32_vl2(int64_t op1, int64_t op2)
 945 {
 946   return svwhilelt_c32(op1, op2, 2);
 947 }
 948
 949 // CHECK-LABEL: @test_svwhilelt_c32_vl4(
 950 // CHECK-NEXT:  entry:
 951 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 952 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 953 //
 954 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_c32_vl4ll(
 955 // CPP-CHECK-NEXT:  entry:
 956 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 957 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 958 //
 959 svcount_t test_svwhilelt_c32_vl4(int64_t op1, int64_t op2)
 960 {
 961   return svwhilelt_c32(op1, op2, 4);
 962 }
 963
 964 // CHECK-LABEL: @test_svwhilelt_c64_vl2(
 965 // CHECK-NEXT:  entry:
 966 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 967 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 968 //
 969 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_c64_vl2ll(
 970 // CPP-CHECK-NEXT:  entry:
 971 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 2)
 972 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 973 //
 974 svcount_t test_svwhilelt_c64_vl2(int64_t op1, int64_t op2)
 975 {
 976   return svwhilelt_c64(op1, op2, 2);
 977 }
 978
 979 // CHECK-LABEL: @test_svwhilelt_c64_vl4(
 980 // CHECK-NEXT:  entry:
 981 // CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 982 // CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 983 //
 984 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_c64_vl4ll(
 985 // CPP-CHECK-NEXT:  entry:
 986 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c64(i64 [[OP1:%.*]], i64 [[OP2:%.*]], i32 4)
 987 // CPP-CHECK-NEXT:    ret target("aarch64.svcount") [[TMP0]]
 988 //
 989 svcount_t test_svwhilelt_c64_vl4(int64_t op1, int64_t op2)
 990 {
 991   return svwhilelt_c64(op1, op2, 4);
 992 }