1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple aarch64-eabi -S -emit-llvm %s -o - | FileCheck %s
4 // CHECK-LABEL: @v82() #0
5 __attribute__((target("arch=armv8.2-a")))
7 // CHECK-LABEL: @v82sve() #1
8 __attribute__((target("arch=armv8.2-a+sve")))
10 // CHECK-LABEL: @v82sve2() #2
11 __attribute__((target("arch=armv8.2-a+sve2")))
13 // CHECK-LABEL: @v82svesve2() #2
14 __attribute__((target("arch=armv8.2-a+sve+sve2")))
16 // CHECK-LABEL: @v86sve2() #3
17 __attribute__((target("arch=armv8.6-a+sve2")))
20 // CHECK-LABEL: @a710() #4
21 __attribute__((target("cpu=cortex-a710")))
23 // CHECK-LABEL: @tunea710() #5
24 __attribute__((target("tune=cortex-a710")))
26 // CHECK-LABEL: @generic() #6
27 __attribute__((target("cpu=generic")))
29 // CHECK-LABEL: @tune() #7
30 __attribute__((target("tune=generic")))
33 // CHECK-LABEL: @n1tunea710() #8
34 __attribute__((target("cpu=neoverse-n1,tune=cortex-a710")))
36 // CHECK-LABEL: @svetunea710() #9
37 __attribute__((target("sve,tune=cortex-a710")))
39 // CHECK-LABEL: @plussvetunea710() #9
40 __attribute__((target("+sve,tune=cortex-a710")))
41 void plussvetunea710() {}
42 // CHECK-LABEL: @v1plussve2() #10
43 __attribute__((target("cpu=neoverse-v1,+sve2")))
45 // CHECK-LABEL: @v1sve2() #10
46 __attribute__((target("cpu=neoverse-v1+sve2")))
48 // CHECK-LABEL: @v1minussve() #11
49 __attribute__((target("cpu=neoverse-v1,+nosve")))
51 // CHECK-LABEL: @v1nosve() #11
52 __attribute__((target("cpu=neoverse-v1,no-sve")))
54 // CHECK-LABEL: @v1msve() #11
55 __attribute__((target("cpu=neoverse-v1+nosve")))
58 // CHECK-LABEL: @plussve() #12
59 __attribute__((target("+sve")))
61 // CHECK-LABEL: @plussveplussve2() #13
62 __attribute__((target("+sve+nosve2")))
63 void plussveplussve2() {}
64 // CHECK-LABEL: @plussveminusnosve2() #13
65 __attribute__((target("sve,no-sve2")))
66 void plussveminusnosve2() {}
67 // CHECK-LABEL: @plusfp16() #14
68 __attribute__((target("+fp16")))
71 // CHECK-LABEL: @all() #15
72 __attribute__((target("cpu=neoverse-n1,tune=cortex-a710,arch=armv8.6-a+sve2")))
74 // CHECK-LABEL: @allplusbranchprotection() #16
75 __attribute__((target("cpu=neoverse-n1,tune=cortex-a710,arch=armv8.6-a+sve2,branch-protection=standard")))
76 void allplusbranchprotection() {}
78 // These tests check that the user facing and internal llvm name are both accepted.
79 // CHECK-LABEL: @plusnoneon() #17
80 __attribute__((target("+noneon")))
82 // CHECK-LABEL: @plusnosimd() #17
83 __attribute__((target("+nosimd")))
85 // CHECK-LABEL: @noneon() #17
86 __attribute__((target("no-neon")))
88 // CHECK-LABEL: @nosimd() #17
89 __attribute__((target("no-simd")))
92 // This isn't part of the standard interface, but test that -arch features should not apply anything else.
93 // CHECK-LABEL: @minusarch() #18
94 __attribute__((target("no-v9.3a")))
97 // CHECK: attributes #0 = { {{.*}} "target-features"="+crc,+fp-armv8,+lse,+neon,+ras,+rdm,+v8.1a,+v8.2a,+v8a" }
98 // CHECK: attributes #1 = { {{.*}} "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+v8.1a,+v8.2a,+v8a" }
99 // CHECK: attributes #2 = { {{.*}} "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8a" }
100 // CHECK: attributes #3 = { {{.*}} "target-features"="+bf16,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+lse,+neon,+ras,+rcpc,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" }
101 // CHECK: attributes #4 = { {{.*}} "target-cpu"="cortex-a710" "target-features"="+bf16,+crc,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+lse,+mte,+neon,+pauth,+ras,+rcpc,+rdm,+sb,+sve,+sve2,+sve2-bitperm" }
102 // CHECK: attributes #5 = { {{.*}} "tune-cpu"="cortex-a710" }
103 // CHECK: attributes #6 = { {{.*}} "target-cpu"="generic" }
104 // CHECK: attributes #7 = { {{.*}} "tune-cpu"="generic" }
105 // CHECK: attributes #8 = { {{.*}} "target-cpu"="neoverse-n1" "target-features"="+aes,+crc,+dotprod,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+spe,+ssbs" "tune-cpu"="cortex-a710" }
106 // CHECK: attributes #9 = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+sve" "tune-cpu"="cortex-a710" }
107 // CHECK: attributes #10 = { {{.*}} "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+lse,+neon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+sve,+sve2" }
108 // CHECK: attributes #11 = { {{.*}} "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+lse,+neon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,-sve" }
109 // CHECK: attributes #12 = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+sve" }
110 // CHECK: attributes #13 = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+sve,-sve2" }
111 // CHECK: attributes #14 = { {{.*}} "target-features"="+fullfp16" }
112 // CHECK: attributes #15 = { {{.*}} "target-cpu"="neoverse-n1" "target-features"="+aes,+bf16,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" "tune-cpu"="cortex-a710" }
113 // CHECK: attributes #16 = { {{.*}} "branch-target-enforcement"="true" {{.*}} "target-features"="+aes,+bf16,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" "tune-cpu"="cortex-a710" }
114 // CHECK: attributes #17 = { {{.*}} "target-features"="-neon" }
115 // CHECK: attributes #18 = { {{.*}} "target-features"="-v9.3a" }