clang/test/CodeGen/arm-mve-intrinsics/vaddv.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2  // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve -mfloat-abi hard -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
   3  // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
   4
   5 // REQUIRES: aarch64-registered-target || arm-registered-target
   6
   7 #include <arm_mve.h>
   8
   9 // CHECK-LABEL: @test_vaddvq_s8(
  10 // CHECK-NEXT:  entry:
  11 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v16i8(<16 x i8> [[A:%.*]], i32 0)
  12 // CHECK-NEXT:    ret i32 [[TMP0]]
  13 //
  14 int32_t test_vaddvq_s8(int8x16_t a) {
  15 #ifdef POLYMORPHIC
  16   return vaddvq(a);
  17 #else  /* POLYMORPHIC */
  18   return vaddvq_s8(a);
  19 #endif /* POLYMORPHIC */
  20 }
  21
  22 // CHECK-LABEL: @test_vaddvq_s16(
  23 // CHECK-NEXT:  entry:
  24 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v8i16(<8 x i16> [[A:%.*]], i32 0)
  25 // CHECK-NEXT:    ret i32 [[TMP0]]
  26 //
  27 int32_t test_vaddvq_s16(int16x8_t a) {
  28 #ifdef POLYMORPHIC
  29   return vaddvq(a);
  30 #else  /* POLYMORPHIC */
  31   return vaddvq_s16(a);
  32 #endif /* POLYMORPHIC */
  33 }
  34
  35 // CHECK-LABEL: @test_vaddvq_s32(
  36 // CHECK-NEXT:  entry:
  37 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v4i32(<4 x i32> [[A:%.*]], i32 0)
  38 // CHECK-NEXT:    ret i32 [[TMP0]]
  39 //
  40 int32_t test_vaddvq_s32(int32x4_t a) {
  41 #ifdef POLYMORPHIC
  42   return vaddvq(a);
  43 #else  /* POLYMORPHIC */
  44   return vaddvq_s32(a);
  45 #endif /* POLYMORPHIC */
  46 }
  47
  48 // CHECK-LABEL: @test_vaddvq_u8(
  49 // CHECK-NEXT:  entry:
  50 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v16i8(<16 x i8> [[A:%.*]], i32 1)
  51 // CHECK-NEXT:    ret i32 [[TMP0]]
  52 //
  53 uint32_t test_vaddvq_u8(uint8x16_t a) {
  54 #ifdef POLYMORPHIC
  55   return vaddvq(a);
  56 #else  /* POLYMORPHIC */
  57   return vaddvq_u8(a);
  58 #endif /* POLYMORPHIC */
  59 }
  60
  61 // CHECK-LABEL: @test_vaddvq_u16(
  62 // CHECK-NEXT:  entry:
  63 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v8i16(<8 x i16> [[A:%.*]], i32 1)
  64 // CHECK-NEXT:    ret i32 [[TMP0]]
  65 //
  66 uint32_t test_vaddvq_u16(uint16x8_t a) {
  67 #ifdef POLYMORPHIC
  68   return vaddvq(a);
  69 #else  /* POLYMORPHIC */
  70   return vaddvq_u16(a);
  71 #endif /* POLYMORPHIC */
  72 }
  73
  74 // CHECK-LABEL: @test_vaddvq_u32(
  75 // CHECK-NEXT:  entry:
  76 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v4i32(<4 x i32> [[A:%.*]], i32 1)
  77 // CHECK-NEXT:    ret i32 [[TMP0]]
  78 //
  79 uint32_t test_vaddvq_u32(uint32x4_t a) {
  80 #ifdef POLYMORPHIC
  81   return vaddvq(a);
  82 #else  /* POLYMORPHIC */
  83   return vaddvq_u32(a);
  84 #endif /* POLYMORPHIC */
  85 }
  86
  87 // CHECK-LABEL: @test_vaddvaq_s8(
  88 // CHECK-NEXT:  entry:
  89 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v16i8(<16 x i8> [[B:%.*]], i32 0)
  90 // CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], [[A:%.*]]
  91 // CHECK-NEXT:    ret i32 [[TMP1]]
  92 //
  93 int32_t test_vaddvaq_s8(int32_t a, int8x16_t b) {
  94 #ifdef POLYMORPHIC
  95   return vaddvaq(a, b);
  96 #else  /* POLYMORPHIC */
  97   return vaddvaq_s8(a, b);
  98 #endif /* POLYMORPHIC */
  99 }
 100
 101 // CHECK-LABEL: @test_vaddvaq_s16(
 102 // CHECK-NEXT:  entry:
 103 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v8i16(<8 x i16> [[B:%.*]], i32 0)
 104 // CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], [[A:%.*]]
 105 // CHECK-NEXT:    ret i32 [[TMP1]]
 106 //
 107 int32_t test_vaddvaq_s16(int32_t a, int16x8_t b) {
 108 #ifdef POLYMORPHIC
 109   return vaddvaq(a, b);
 110 #else  /* POLYMORPHIC */
 111   return vaddvaq_s16(a, b);
 112 #endif /* POLYMORPHIC */
 113 }
 114
 115 // CHECK-LABEL: @test_vaddvaq_s32(
 116 // CHECK-NEXT:  entry:
 117 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v4i32(<4 x i32> [[B:%.*]], i32 0)
 118 // CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], [[A:%.*]]
 119 // CHECK-NEXT:    ret i32 [[TMP1]]
 120 //
 121 int32_t test_vaddvaq_s32(int32_t a, int32x4_t b) {
 122 #ifdef POLYMORPHIC
 123   return vaddvaq(a, b);
 124 #else  /* POLYMORPHIC */
 125   return vaddvaq_s32(a, b);
 126 #endif /* POLYMORPHIC */
 127 }
 128
 129 // CHECK-LABEL: @test_vaddvaq_u8(
 130 // CHECK-NEXT:  entry:
 131 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v16i8(<16 x i8> [[B:%.*]], i32 1)
 132 // CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], [[A:%.*]]
 133 // CHECK-NEXT:    ret i32 [[TMP1]]
 134 //
 135 uint32_t test_vaddvaq_u8(uint32_t a, uint8x16_t b) {
 136 #ifdef POLYMORPHIC
 137   return vaddvaq(a, b);
 138 #else  /* POLYMORPHIC */
 139   return vaddvaq_u8(a, b);
 140 #endif /* POLYMORPHIC */
 141 }
 142
 143 // CHECK-LABEL: @test_vaddvaq_u16(
 144 // CHECK-NEXT:  entry:
 145 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v8i16(<8 x i16> [[B:%.*]], i32 1)
 146 // CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], [[A:%.*]]
 147 // CHECK-NEXT:    ret i32 [[TMP1]]
 148 //
 149 uint32_t test_vaddvaq_u16(uint32_t a, uint16x8_t b) {
 150 #ifdef POLYMORPHIC
 151   return vaddvaq(a, b);
 152 #else  /* POLYMORPHIC */
 153   return vaddvaq_u16(a, b);
 154 #endif /* POLYMORPHIC */
 155 }
 156
 157 // CHECK-LABEL: @test_vaddvaq_u32(
 158 // CHECK-NEXT:  entry:
 159 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.addv.v4i32(<4 x i32> [[B:%.*]], i32 1)
 160 // CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], [[A:%.*]]
 161 // CHECK-NEXT:    ret i32 [[TMP1]]
 162 //
 163 uint32_t test_vaddvaq_u32(uint32_t a, uint32x4_t b) {
 164 #ifdef POLYMORPHIC
 165   return vaddvaq(a, b);
 166 #else  /* POLYMORPHIC */
 167   return vaddvaq_u32(a, b);
 168 #endif /* POLYMORPHIC */
 169 }
 170
 171 // CHECK-LABEL: @test_vaddvq_p_s8(
 172 // CHECK-NEXT:  entry:
 173 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 174 // CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
 175 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], i32 0, <16 x i1> [[TMP1]])
 176 // CHECK-NEXT:    ret i32 [[TMP2]]
 177 //
 178 int32_t test_vaddvq_p_s8(int8x16_t a, mve_pred16_t p) {
 179 #ifdef POLYMORPHIC
 180   return vaddvq_p(a, p);
 181 #else  /* POLYMORPHIC */
 182   return vaddvq_p_s8(a, p);
 183 #endif /* POLYMORPHIC */
 184 }
 185
 186 // CHECK-LABEL: @test_vaddvq_p_s16(
 187 // CHECK-NEXT:  entry:
 188 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 189 // CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
 190 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], i32 0, <8 x i1> [[TMP1]])
 191 // CHECK-NEXT:    ret i32 [[TMP2]]
 192 //
 193 int32_t test_vaddvq_p_s16(int16x8_t a, mve_pred16_t p) {
 194 #ifdef POLYMORPHIC
 195   return vaddvq_p(a, p);
 196 #else  /* POLYMORPHIC */
 197   return vaddvq_p_s16(a, p);
 198 #endif /* POLYMORPHIC */
 199 }
 200
 201 // CHECK-LABEL: @test_vaddvq_p_s32(
 202 // CHECK-NEXT:  entry:
 203 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 204 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
 205 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], i32 0, <4 x i1> [[TMP1]])
 206 // CHECK-NEXT:    ret i32 [[TMP2]]
 207 //
 208 int32_t test_vaddvq_p_s32(int32x4_t a, mve_pred16_t p) {
 209 #ifdef POLYMORPHIC
 210   return vaddvq_p(a, p);
 211 #else  /* POLYMORPHIC */
 212   return vaddvq_p_s32(a, p);
 213 #endif /* POLYMORPHIC */
 214 }
 215
 216 // CHECK-LABEL: @test_vaddvq_p_u8(
 217 // CHECK-NEXT:  entry:
 218 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 219 // CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
 220 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], i32 1, <16 x i1> [[TMP1]])
 221 // CHECK-NEXT:    ret i32 [[TMP2]]
 222 //
 223 uint32_t test_vaddvq_p_u8(uint8x16_t a, mve_pred16_t p) {
 224 #ifdef POLYMORPHIC
 225   return vaddvq_p(a, p);
 226 #else  /* POLYMORPHIC */
 227   return vaddvq_p_u8(a, p);
 228 #endif /* POLYMORPHIC */
 229 }
 230
 231 // CHECK-LABEL: @test_vaddvq_p_u16(
 232 // CHECK-NEXT:  entry:
 233 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 234 // CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
 235 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], i32 1, <8 x i1> [[TMP1]])
 236 // CHECK-NEXT:    ret i32 [[TMP2]]
 237 //
 238 uint32_t test_vaddvq_p_u16(uint16x8_t a, mve_pred16_t p) {
 239 #ifdef POLYMORPHIC
 240   return vaddvq_p(a, p);
 241 #else  /* POLYMORPHIC */
 242   return vaddvq_p_u16(a, p);
 243 #endif /* POLYMORPHIC */
 244 }
 245
 246 // CHECK-LABEL: @test_vaddvq_p_u32(
 247 // CHECK-NEXT:  entry:
 248 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 249 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
 250 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], i32 1, <4 x i1> [[TMP1]])
 251 // CHECK-NEXT:    ret i32 [[TMP2]]
 252 //
 253 uint32_t test_vaddvq_p_u32(uint32x4_t a, mve_pred16_t p) {
 254 #ifdef POLYMORPHIC
 255   return vaddvq_p(a, p);
 256 #else  /* POLYMORPHIC */
 257   return vaddvq_p_u32(a, p);
 258 #endif /* POLYMORPHIC */
 259 }
 260
 261 // CHECK-LABEL: @test_vaddvaq_p_s8(
 262 // CHECK-NEXT:  entry:
 263 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 264 // CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
 265 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v16i8.v16i1(<16 x i8> [[B:%.*]], i32 0, <16 x i1> [[TMP1]])
 266 // CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP2]], [[A:%.*]]
 267 // CHECK-NEXT:    ret i32 [[TMP3]]
 268 //
 269 int32_t test_vaddvaq_p_s8(int32_t a, int8x16_t b, mve_pred16_t p) {
 270 #ifdef POLYMORPHIC
 271   return vaddvaq_p(a, b, p);
 272 #else  /* POLYMORPHIC */
 273   return vaddvaq_p_s8(a, b, p);
 274 #endif /* POLYMORPHIC */
 275 }
 276
 277 // CHECK-LABEL: @test_vaddvaq_p_s16(
 278 // CHECK-NEXT:  entry:
 279 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 280 // CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
 281 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> [[B:%.*]], i32 0, <8 x i1> [[TMP1]])
 282 // CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP2]], [[A:%.*]]
 283 // CHECK-NEXT:    ret i32 [[TMP3]]
 284 //
 285 int32_t test_vaddvaq_p_s16(int32_t a, int16x8_t b, mve_pred16_t p) {
 286 #ifdef POLYMORPHIC
 287   return vaddvaq_p(a, b, p);
 288 #else  /* POLYMORPHIC */
 289   return vaddvaq_p_s16(a, b, p);
 290 #endif /* POLYMORPHIC */
 291 }
 292
 293 // CHECK-LABEL: @test_vaddvaq_p_s32(
 294 // CHECK-NEXT:  entry:
 295 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 296 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
 297 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v4i32.v4i1(<4 x i32> [[B:%.*]], i32 0, <4 x i1> [[TMP1]])
 298 // CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP2]], [[A:%.*]]
 299 // CHECK-NEXT:    ret i32 [[TMP3]]
 300 //
 301 int32_t test_vaddvaq_p_s32(int32_t a, int32x4_t b, mve_pred16_t p) {
 302 #ifdef POLYMORPHIC
 303   return vaddvaq_p(a, b, p);
 304 #else  /* POLYMORPHIC */
 305   return vaddvaq_p_s32(a, b, p);
 306 #endif /* POLYMORPHIC */
 307 }
 308
 309 // CHECK-LABEL: @test_vaddvaq_p_u8(
 310 // CHECK-NEXT:  entry:
 311 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 312 // CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
 313 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v16i8.v16i1(<16 x i8> [[B:%.*]], i32 1, <16 x i1> [[TMP1]])
 314 // CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP2]], [[A:%.*]]
 315 // CHECK-NEXT:    ret i32 [[TMP3]]
 316 //
 317 uint32_t test_vaddvaq_p_u8(uint32_t a, uint8x16_t b, mve_pred16_t p) {
 318 #ifdef POLYMORPHIC
 319   return vaddvaq_p(a, b, p);
 320 #else  /* POLYMORPHIC */
 321   return vaddvaq_p_u8(a, b, p);
 322 #endif /* POLYMORPHIC */
 323 }
 324
 325 // CHECK-LABEL: @test_vaddvaq_p_u16(
 326 // CHECK-NEXT:  entry:
 327 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 328 // CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
 329 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> [[B:%.*]], i32 1, <8 x i1> [[TMP1]])
 330 // CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP2]], [[A:%.*]]
 331 // CHECK-NEXT:    ret i32 [[TMP3]]
 332 //
 333 uint32_t test_vaddvaq_p_u16(uint32_t a, uint16x8_t b, mve_pred16_t p) {
 334 #ifdef POLYMORPHIC
 335   return vaddvaq_p(a, b, p);
 336 #else  /* POLYMORPHIC */
 337   return vaddvaq_p_u16(a, b, p);
 338 #endif /* POLYMORPHIC */
 339 }
 340
 341 // CHECK-LABEL: @test_vaddvaq_p_u32(
 342 // CHECK-NEXT:  entry:
 343 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 344 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
 345 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.addv.predicated.v4i32.v4i1(<4 x i32> [[B:%.*]], i32 1, <4 x i1> [[TMP1]])
 346 // CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP2]], [[A:%.*]]
 347 // CHECK-NEXT:    ret i32 [[TMP3]]
 348 //
 349 uint32_t test_vaddvaq_p_u32(uint32_t a, uint32x4_t b, mve_pred16_t p) {
 350 #ifdef POLYMORPHIC
 351   return vaddvaq_p(a, b, p);
 352 #else  /* POLYMORPHIC */
 353   return vaddvaq_p_u32(a, b, p);
 354 #endif /* POLYMORPHIC */
 355 }
 356
 357 // CHECK-LABEL: @test_vaddlvq_s32(
 358 // CHECK-NEXT:  entry:
 359 // CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.arm.mve.addlv.v4i32(<4 x i32> [[A:%.*]], i32 0)
 360 // CHECK-NEXT:    ret i64 [[TMP0]]
 361 //
 362 int64_t test_vaddlvq_s32(int32x4_t a) {
 363 #ifdef POLYMORPHIC
 364   return vaddlvq(a);
 365 #else  /* POLYMORPHIC */
 366   return vaddlvq_s32(a);
 367 #endif /* POLYMORPHIC */
 368 }
 369
 370 // CHECK-LABEL: @test_vaddlvq_u32(
 371 // CHECK-NEXT:  entry:
 372 // CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.arm.mve.addlv.v4i32(<4 x i32> [[A:%.*]], i32 1)
 373 // CHECK-NEXT:    ret i64 [[TMP0]]
 374 //
 375 uint64_t test_vaddlvq_u32(uint32x4_t a) {
 376 #ifdef POLYMORPHIC
 377   return vaddlvq(a);
 378 #else  /* POLYMORPHIC */
 379   return vaddlvq_u32(a);
 380 #endif /* POLYMORPHIC */
 381 }
 382
 383 // CHECK-LABEL: @test_vaddlvaq_s32(
 384 // CHECK-NEXT:  entry:
 385 // CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.arm.mve.addlv.v4i32(<4 x i32> [[B:%.*]], i32 0)
 386 // CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[TMP0]], [[A:%.*]]
 387 // CHECK-NEXT:    ret i64 [[TMP1]]
 388 //
 389 int64_t test_vaddlvaq_s32(int64_t a, int32x4_t b) {
 390 #ifdef POLYMORPHIC
 391   return vaddlvaq(a, b);
 392 #else  /* POLYMORPHIC */
 393   return vaddlvaq_s32(a, b);
 394 #endif /* POLYMORPHIC */
 395 }
 396
 397 // CHECK-LABEL: @test_vaddlvaq_u32(
 398 // CHECK-NEXT:  entry:
 399 // CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.arm.mve.addlv.v4i32(<4 x i32> [[B:%.*]], i32 1)
 400 // CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[TMP0]], [[A:%.*]]
 401 // CHECK-NEXT:    ret i64 [[TMP1]]
 402 //
 403 uint64_t test_vaddlvaq_u32(uint64_t a, uint32x4_t b) {
 404 #ifdef POLYMORPHIC
 405   return vaddlvaq(a, b);
 406 #else  /* POLYMORPHIC */
 407   return vaddlvaq_u32(a, b);
 408 #endif /* POLYMORPHIC */
 409 }
 410
 411 // CHECK-LABEL: @test_vaddlvq_p_s32(
 412 // CHECK-NEXT:  entry:
 413 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 414 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
 415 // CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.arm.mve.addlv.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], i32 0, <4 x i1> [[TMP1]])
 416 // CHECK-NEXT:    ret i64 [[TMP2]]
 417 //
 418 int64_t test_vaddlvq_p_s32(int32x4_t a, mve_pred16_t p) {
 419 #ifdef POLYMORPHIC
 420   return vaddlvq_p(a, p);
 421 #else  /* POLYMORPHIC */
 422   return vaddlvq_p_s32(a, p);
 423 #endif /* POLYMORPHIC */
 424 }
 425
 426 // CHECK-LABEL: @test_vaddlvq_p_u32(
 427 // CHECK-NEXT:  entry:
 428 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 429 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
 430 // CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.arm.mve.addlv.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], i32 1, <4 x i1> [[TMP1]])
 431 // CHECK-NEXT:    ret i64 [[TMP2]]
 432 //
 433 uint64_t test_vaddlvq_p_u32(uint32x4_t a, mve_pred16_t p) {
 434 #ifdef POLYMORPHIC
 435   return vaddlvq_p(a, p);
 436 #else  /* POLYMORPHIC */
 437   return vaddlvq_p_u32(a, p);
 438 #endif /* POLYMORPHIC */
 439 }
 440
 441 // CHECK-LABEL: @test_vaddlvaq_p_s32(
 442 // CHECK-NEXT:  entry:
 443 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 444 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
 445 // CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.arm.mve.addlv.predicated.v4i32.v4i1(<4 x i32> [[B:%.*]], i32 0, <4 x i1> [[TMP1]])
 446 // CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[TMP2]], [[A:%.*]]
 447 // CHECK-NEXT:    ret i64 [[TMP3]]
 448 //
 449 int64_t test_vaddlvaq_p_s32(int64_t a, int32x4_t b, mve_pred16_t p) {
 450 #ifdef POLYMORPHIC
 451   return vaddlvaq_p(a, b, p);
 452 #else  /* POLYMORPHIC */
 453   return vaddlvaq_p_s32(a, b, p);
 454 #endif /* POLYMORPHIC */
 455 }
 456
 457 // CHECK-LABEL: @test_vaddlvaq_p_u32(
 458 // CHECK-NEXT:  entry:
 459 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
 460 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
 461 // CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.arm.mve.addlv.predicated.v4i32.v4i1(<4 x i32> [[B:%.*]], i32 1, <4 x i1> [[TMP1]])
 462 // CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[TMP2]], [[A:%.*]]
 463 // CHECK-NEXT:    ret i64 [[TMP3]]
 464 //
 465 uint64_t test_vaddlvaq_p_u32(uint64_t a, uint32x4_t b, mve_pred16_t p) {
 466 #ifdef POLYMORPHIC
 467   return vaddlvaq_p(a, b, p);
 468 #else  /* POLYMORPHIC */
 469   return vaddlvaq_p_u32(a, b, p);
 470 #endif /* POLYMORPHIC */
 471 }
 472