1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
5 // REQUIRES: aarch64-registered-target || arm-registered-target
9 // CHECK-LABEL: @test_vbrsrq_n_u32(
11 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vbrsr.v4i32(<4 x i32> [[A:%.*]], i32 [[B:%.*]])
12 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
14 uint32x4_t
test_vbrsrq_n_u32(uint32x4_t a
, int32_t b
) {
17 #else /* POLYMORPHIC */
18 return vbrsrq_n_u32(a
, b
);
19 #endif /* POLYMORPHIC */
22 // CHECK-LABEL: @test_vbrsrq_n_f16(
24 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vbrsr.v8f16(<8 x half> [[A:%.*]], i32 [[B:%.*]])
25 // CHECK-NEXT: ret <8 x half> [[TMP0]]
27 float16x8_t
test_vbrsrq_n_f16(float16x8_t a
, int32_t b
) {
30 #else /* POLYMORPHIC */
31 return vbrsrq_n_f16(a
, b
);
32 #endif /* POLYMORPHIC */
35 // CHECK-LABEL: @test_vbrsrq_m_n_s8(
37 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
38 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
39 // CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.vbrsr.predicated.v16i8.v16i1(<16 x i8> [[INACTIVE:%.*]], <16 x i8> [[A:%.*]], i32 [[B:%.*]], <16 x i1> [[TMP1]])
40 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
42 int8x16_t
test_vbrsrq_m_n_s8(int8x16_t inactive
, int8x16_t a
, int32_t b
, mve_pred16_t p
) {
44 return vbrsrq_m(inactive
, a
, b
, p
);
45 #else /* POLYMORPHIC */
46 return vbrsrq_m_n_s8(inactive
, a
, b
, p
);
47 #endif /* POLYMORPHIC */
50 // CHECK-LABEL: @test_vbrsrq_m_n_f32(
52 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
53 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
54 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vbrsr.predicated.v4f32.v4i1(<4 x float> [[INACTIVE:%.*]], <4 x float> [[A:%.*]], i32 [[B:%.*]], <4 x i1> [[TMP1]])
55 // CHECK-NEXT: ret <4 x float> [[TMP2]]
57 float32x4_t
test_vbrsrq_m_n_f32(float32x4_t inactive
, float32x4_t a
, int32_t b
, mve_pred16_t p
) {
59 return vbrsrq_m(inactive
, a
, b
, p
);
60 #else /* POLYMORPHIC */
61 return vbrsrq_m_n_f32(inactive
, a
, b
, p
);
62 #endif /* POLYMORPHIC */
65 // CHECK-LABEL: @test_vbrsrq_x_n_u16(
67 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
68 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
69 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vbrsr.predicated.v8i16.v8i1(<8 x i16> undef, <8 x i16> [[A:%.*]], i32 [[B:%.*]], <8 x i1> [[TMP1]])
70 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
72 uint16x8_t
test_vbrsrq_x_n_u16(uint16x8_t a
, int32_t b
, mve_pred16_t p
) {
74 return vbrsrq_x(a
, b
, p
);
75 #else /* POLYMORPHIC */
76 return vbrsrq_x_n_u16(a
, b
, p
);
77 #endif /* POLYMORPHIC */
80 // CHECK-LABEL: @test_vbrsrq_x_n_f16(
82 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
83 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
84 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vbrsr.predicated.v8f16.v8i1(<8 x half> undef, <8 x half> [[A:%.*]], i32 [[B:%.*]], <8 x i1> [[TMP1]])
85 // CHECK-NEXT: ret <8 x half> [[TMP2]]
87 float16x8_t
test_vbrsrq_x_n_f16(float16x8_t a
, int32_t b
, mve_pred16_t p
) {
89 return vbrsrq_x(a
, b
, p
);
90 #else /* POLYMORPHIC */
91 return vbrsrq_x_n_f16(a
, b
, p
);
92 #endif /* POLYMORPHIC */