1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
5 // REQUIRES: aarch64-registered-target || arm-registered-target
9 // CHECK-LABEL: @test_vmaxq_s8(
11 // CHECK-NEXT: [[TMP0:%.*]] = icmp sge <16 x i8> [[A:%.*]], [[B:%.*]]
12 // CHECK-NEXT: [[TMP1:%.*]] = select <16 x i1> [[TMP0]], <16 x i8> [[A]], <16 x i8> [[B]]
13 // CHECK-NEXT: ret <16 x i8> [[TMP1]]
15 int8x16_t
test_vmaxq_s8(int8x16_t a
, int8x16_t b
)
19 #else /* POLYMORPHIC */
20 return vmaxq_s8(a
, b
);
21 #endif /* POLYMORPHIC */
24 // CHECK-LABEL: @test_vmaxq_u16(
26 // CHECK-NEXT: [[TMP0:%.*]] = icmp uge <8 x i16> [[A:%.*]], [[B:%.*]]
27 // CHECK-NEXT: [[TMP1:%.*]] = select <8 x i1> [[TMP0]], <8 x i16> [[A]], <8 x i16> [[B]]
28 // CHECK-NEXT: ret <8 x i16> [[TMP1]]
30 uint16x8_t
test_vmaxq_u16(uint16x8_t a
, uint16x8_t b
)
34 #else /* POLYMORPHIC */
35 return vmaxq_u16(a
, b
);
36 #endif /* POLYMORPHIC */
39 // CHECK-LABEL: @test_vmaxq_s32(
41 // CHECK-NEXT: [[TMP0:%.*]] = icmp sge <4 x i32> [[A:%.*]], [[B:%.*]]
42 // CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[A]], <4 x i32> [[B]]
43 // CHECK-NEXT: ret <4 x i32> [[TMP1]]
45 int32x4_t
test_vmaxq_s32(int32x4_t a
, int32x4_t b
)
49 #else /* POLYMORPHIC */
50 return vmaxq_s32(a
, b
);
51 #endif /* POLYMORPHIC */
54 // CHECK-LABEL: @test_vmaxq_m_u8(
56 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
57 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
58 // CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.max.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1, <16 x i1> [[TMP1]], <16 x i8> [[INACTIVE:%.*]])
59 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
61 uint8x16_t
test_vmaxq_m_u8(uint8x16_t inactive
, uint8x16_t a
, uint8x16_t b
, mve_pred16_t p
)
64 return vmaxq_m(inactive
, a
, b
, p
);
65 #else /* POLYMORPHIC */
66 return vmaxq_m_u8(inactive
, a
, b
, p
);
67 #endif /* POLYMORPHIC */
70 // CHECK-LABEL: @test_vmaxq_m_s16(
72 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
73 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
74 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.max.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])
75 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
77 int16x8_t
test_vmaxq_m_s16(int16x8_t inactive
, int16x8_t a
, int16x8_t b
, mve_pred16_t p
)
80 return vmaxq_m(inactive
, a
, b
, p
);
81 #else /* POLYMORPHIC */
82 return vmaxq_m_s16(inactive
, a
, b
, p
);
83 #endif /* POLYMORPHIC */
86 // CHECK-LABEL: @test_vmaxq_m_u32(
88 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
89 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
90 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.max.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 1, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
91 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
93 uint32x4_t
test_vmaxq_m_u32(uint32x4_t inactive
, uint32x4_t a
, uint32x4_t b
, mve_pred16_t p
)
96 return vmaxq_m(inactive
, a
, b
, p
);
97 #else /* POLYMORPHIC */
98 return vmaxq_m_u32(inactive
, a
, b
, p
);
99 #endif /* POLYMORPHIC */
102 // CHECK-LABEL: @test_vmaxq_x_u8(
103 // CHECK-NEXT: entry:
104 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
105 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
106 // CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.max.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1, <16 x i1> [[TMP1]], <16 x i8> undef)
107 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
109 uint8x16_t
test_vmaxq_x_u8(uint8x16_t a
, uint8x16_t b
, mve_pred16_t p
)
112 return vmaxq_x(a
, b
, p
);
113 #else /* POLYMORPHIC */
114 return vmaxq_x_u8(a
, b
, p
);
115 #endif /* POLYMORPHIC */
118 // CHECK-LABEL: @test_vmaxq_x_u16(
119 // CHECK-NEXT: entry:
120 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
121 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
122 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.max.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 1, <8 x i1> [[TMP1]], <8 x i16> undef)
123 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
125 uint16x8_t
test_vmaxq_x_u16(uint16x8_t a
, uint16x8_t b
, mve_pred16_t p
)
128 return vmaxq_x(a
, b
, p
);
129 #else /* POLYMORPHIC */
130 return vmaxq_x_u16(a
, b
, p
);
131 #endif /* POLYMORPHIC */
134 // CHECK-LABEL: @test_vmaxq_x_s32(
135 // CHECK-NEXT: entry:
136 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
137 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
138 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.max.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x i32> undef)
139 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
141 int32x4_t
test_vmaxq_x_s32(int32x4_t a
, int32x4_t b
, mve_pred16_t p
)
144 return vmaxq_x(a
, b
, p
);
145 #else /* POLYMORPHIC */
146 return vmaxq_x_s32(a
, b
, p
);
147 #endif /* POLYMORPHIC */