Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / CodeGen / attr-riscv-rvv-vector-bits-bitcast.c
blob886af083f1c009d28d900b835c36087a5f5d49a1
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +f -target-feature +d -target-feature +zve64d -mvscale-min=1 -mvscale-max=1 -S -O1 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-64
3 // RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +f -target-feature +d -target-feature +zve64d -mvscale-min=2 -mvscale-max=2 -S -O1 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-128
4 // RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +f -target-feature +d -target-feature +zve64d -mvscale-min=4 -mvscale-max=4 -S -O1 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-256
6 // REQUIRES: riscv-registered-target
8 #include <stdint.h>
10 typedef __rvv_int8m1_t vint8m1_t;
11 typedef __rvv_uint8m1_t vuint8m1_t;
12 typedef __rvv_int16m1_t vint16m1_t;
13 typedef __rvv_uint16m1_t vuint16m1_t;
14 typedef __rvv_int32m1_t vint32m1_t;
15 typedef __rvv_uint32m1_t vuint32m1_t;
16 typedef __rvv_int64m1_t vint64m1_t;
17 typedef __rvv_uint64m1_t vuint64m1_t;
18 typedef __rvv_float32m1_t vfloat32m1_t;
19 typedef __rvv_float64m1_t vfloat64m1_t;
21 typedef vint64m1_t fixed_int64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
22 typedef vfloat64m1_t fixed_float64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
24 #define DEFINE_STRUCT(ty) \
25 struct struct_##ty { \
26 fixed_##ty##_t x, y[3]; \
27 } struct_##ty;
29 DEFINE_STRUCT(int64m1)
30 DEFINE_STRUCT(float64m1)
32 //===----------------------------------------------------------------------===//
33 // int64
34 //===----------------------------------------------------------------------===//
36 // CHECK-64-LABEL: @read_int64m1(
37 // CHECK-64-NEXT: entry:
38 // CHECK-64-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
39 // CHECK-64-NEXT: [[TMP0:%.*]] = load <1 x i64>, ptr [[Y]], align 8, !tbaa [[TBAA4:![0-9]+]]
40 // CHECK-64-NEXT: [[CAST_SCALABLE:%.*]] = tail call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v1i64(<vscale x 1 x i64> undef, <1 x i64> [[TMP0]], i64 0)
41 // CHECK-64-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]
43 // CHECK-128-LABEL: @read_int64m1(
44 // CHECK-128-NEXT: entry:
45 // CHECK-128-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
46 // CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr [[Y]], align 8, !tbaa [[TBAA4:![0-9]+]]
47 // CHECK-128-NEXT: [[CAST_SCALABLE:%.*]] = tail call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v2i64(<vscale x 1 x i64> undef, <2 x i64> [[TMP0]], i64 0)
48 // CHECK-128-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]
50 // CHECK-256-LABEL: @read_int64m1(
51 // CHECK-256-NEXT: entry:
52 // CHECK-256-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
53 // CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr [[Y]], align 8, !tbaa [[TBAA4:![0-9]+]]
54 // CHECK-256-NEXT: [[CAST_SCALABLE:%.*]] = tail call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[TMP0]], i64 0)
55 // CHECK-256-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]
57 vint64m1_t read_int64m1(struct struct_int64m1 *s) {
58 return s->y[0];
61 // CHECK-64-LABEL: @write_int64m1(
62 // CHECK-64-NEXT: entry:
63 // CHECK-64-NEXT: [[CAST_FIXED:%.*]] = tail call <1 x i64> @llvm.vector.extract.v1i64.nxv1i64(<vscale x 1 x i64> [[X:%.*]], i64 0)
64 // CHECK-64-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
65 // CHECK-64-NEXT: store <1 x i64> [[CAST_FIXED]], ptr [[Y]], align 8, !tbaa [[TBAA4]]
66 // CHECK-64-NEXT: ret void
68 // CHECK-128-LABEL: @write_int64m1(
69 // CHECK-128-NEXT: entry:
70 // CHECK-128-NEXT: [[CAST_FIXED:%.*]] = tail call <2 x i64> @llvm.vector.extract.v2i64.nxv1i64(<vscale x 1 x i64> [[X:%.*]], i64 0)
71 // CHECK-128-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
72 // CHECK-128-NEXT: store <2 x i64> [[CAST_FIXED]], ptr [[Y]], align 8, !tbaa [[TBAA4]]
73 // CHECK-128-NEXT: ret void
75 // CHECK-256-LABEL: @write_int64m1(
76 // CHECK-256-NEXT: entry:
77 // CHECK-256-NEXT: [[CAST_FIXED:%.*]] = tail call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[X:%.*]], i64 0)
78 // CHECK-256-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
79 // CHECK-256-NEXT: store <4 x i64> [[CAST_FIXED]], ptr [[Y]], align 8, !tbaa [[TBAA4]]
80 // CHECK-256-NEXT: ret void
82 void write_int64m1(struct struct_int64m1 *s, vint64m1_t x) {
83 s->y[0] = x;
86 //===----------------------------------------------------------------------===//
87 // float64
88 //===----------------------------------------------------------------------===//
90 // CHECK-64-LABEL: @read_float64m1(
91 // CHECK-64-NEXT: entry:
92 // CHECK-64-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
93 // CHECK-64-NEXT: [[TMP0:%.*]] = load <1 x double>, ptr [[Y]], align 8, !tbaa [[TBAA4]]
94 // CHECK-64-NEXT: [[CAST_SCALABLE:%.*]] = tail call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v1f64(<vscale x 1 x double> undef, <1 x double> [[TMP0]], i64 0)
95 // CHECK-64-NEXT: ret <vscale x 1 x double> [[CAST_SCALABLE]]
97 // CHECK-128-LABEL: @read_float64m1(
98 // CHECK-128-NEXT: entry:
99 // CHECK-128-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
100 // CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[Y]], align 8, !tbaa [[TBAA4]]
101 // CHECK-128-NEXT: [[CAST_SCALABLE:%.*]] = tail call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v2f64(<vscale x 1 x double> undef, <2 x double> [[TMP0]], i64 0)
102 // CHECK-128-NEXT: ret <vscale x 1 x double> [[CAST_SCALABLE]]
104 // CHECK-256-LABEL: @read_float64m1(
105 // CHECK-256-NEXT: entry:
106 // CHECK-256-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
107 // CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x double>, ptr [[Y]], align 8, !tbaa [[TBAA4]]
108 // CHECK-256-NEXT: [[CAST_SCALABLE:%.*]] = tail call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[TMP0]], i64 0)
109 // CHECK-256-NEXT: ret <vscale x 1 x double> [[CAST_SCALABLE]]
111 vfloat64m1_t read_float64m1(struct struct_float64m1 *s) {
112 return s->y[0];
115 // CHECK-64-LABEL: @write_float64m1(
116 // CHECK-64-NEXT: entry:
117 // CHECK-64-NEXT: [[CAST_FIXED:%.*]] = tail call <1 x double> @llvm.vector.extract.v1f64.nxv1f64(<vscale x 1 x double> [[X:%.*]], i64 0)
118 // CHECK-64-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
119 // CHECK-64-NEXT: store <1 x double> [[CAST_FIXED]], ptr [[Y]], align 8, !tbaa [[TBAA4]]
120 // CHECK-64-NEXT: ret void
122 // CHECK-128-LABEL: @write_float64m1(
123 // CHECK-128-NEXT: entry:
124 // CHECK-128-NEXT: [[CAST_FIXED:%.*]] = tail call <2 x double> @llvm.vector.extract.v2f64.nxv1f64(<vscale x 1 x double> [[X:%.*]], i64 0)
125 // CHECK-128-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
126 // CHECK-128-NEXT: store <2 x double> [[CAST_FIXED]], ptr [[Y]], align 8, !tbaa [[TBAA4]]
127 // CHECK-128-NEXT: ret void
129 // CHECK-256-LABEL: @write_float64m1(
130 // CHECK-256-NEXT: entry:
131 // CHECK-256-NEXT: [[CAST_FIXED:%.*]] = tail call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[X:%.*]], i64 0)
132 // CHECK-256-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64M1:%.*]], ptr [[S:%.*]], i64 0, i32 1
133 // CHECK-256-NEXT: store <4 x double> [[CAST_FIXED]], ptr [[Y]], align 8, !tbaa [[TBAA4]]
134 // CHECK-256-NEXT: ret void
136 void write_float64m1(struct struct_float64m1 *s, vfloat64m1_t x) {
137 s->y[0] = x;