Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / CodeGen / attr-riscv-rvv-vector-bits-cast.c
blob93e9a4eee96eb85dde2dc567a0cf0e36be8ae269
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +f -target-feature +d -target-feature +zve64d -mvscale-min=4 -mvscale-max=4 -S -O1 -emit-llvm -o - %s | FileCheck %s
4 // REQUIRES: riscv-registered-target
6 #include <stdint.h>
8 typedef __rvv_int8m1_t vint8m1_t;
9 typedef __rvv_uint8m1_t vuint8m1_t;
10 typedef __rvv_int16m1_t vint16m1_t;
11 typedef __rvv_uint16m1_t vuint16m1_t;
12 typedef __rvv_int32m1_t vint32m1_t;
13 typedef __rvv_uint32m1_t vuint32m1_t;
14 typedef __rvv_int64m1_t vint64m1_t;
15 typedef __rvv_uint64m1_t vuint64m1_t;
16 typedef __rvv_float32m1_t vfloat32m1_t;
17 typedef __rvv_float64m1_t vfloat64m1_t;
19 typedef vint64m1_t fixed_int64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
20 typedef vfloat64m1_t fixed_float64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
22 typedef vint32m1_t fixed_int32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
23 typedef vfloat64m1_t fixed_float64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
24 typedef int32_t gnu_int32m1_t __attribute__((vector_size(__riscv_v_fixed_vlen / 8)));
26 // CHECK-LABEL: @to_vint32m1_t(
27 // CHECK-NEXT: entry:
28 // CHECK-NEXT: ret <vscale x 2 x i32> [[TYPE_COERCE:%.*]]
30 vint32m1_t to_vint32m1_t(fixed_int32m1_t type) {
31 return type;
34 // CHECK-LABEL: @from_vint32m1_t(
35 // CHECK-NEXT: entry:
36 // CHECK-NEXT: ret <vscale x 2 x i32> [[TYPE:%.*]]
38 fixed_int32m1_t from_vint32m1_t(vint32m1_t type) {
39 return type;
42 // CHECK-LABEL: @to_vfloat64m1_t(
43 // CHECK-NEXT: entry:
44 // CHECK-NEXT: ret <vscale x 1 x double> [[TYPE_COERCE:%.*]]
46 vfloat64m1_t to_vfloat64m1_t(fixed_float64m1_t type) {
47 return type;
50 // CHECK-LABEL: @from_vfloat64m1_t(
51 // CHECK-NEXT: entry:
52 // CHECK-NEXT: ret <vscale x 1 x double> [[TYPE:%.*]]
54 fixed_float64m1_t from_vfloat64m1_t(vfloat64m1_t type) {
55 return type;
58 // CHECK-LABEL: @to_vint32m1_t__from_gnu_int32m1_t(
59 // CHECK-NEXT: entry:
60 // CHECK-NEXT: [[TYPE:%.*]] = load <8 x i32>, ptr [[TMP0:%.*]], align 32, !tbaa [[TBAA4:![0-9]+]]
61 // CHECK-NEXT: [[CAST_SCALABLE:%.*]] = tail call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[TYPE]], i64 0)
62 // CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]
64 vint32m1_t to_vint32m1_t__from_gnu_int32m1_t(gnu_int32m1_t type) {
65 return type;
68 // CHECK-LABEL: @from_vint32m1_t__to_gnu_int32m1_t(
69 // CHECK-NEXT: entry:
70 // CHECK-NEXT: [[CAST_FIXED:%.*]] = tail call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[TYPE:%.*]], i64 0)
71 // CHECK-NEXT: store <8 x i32> [[CAST_FIXED]], ptr [[AGG_RESULT:%.*]], align 32, !tbaa [[TBAA4]]
72 // CHECK-NEXT: ret void
74 gnu_int32m1_t from_vint32m1_t__to_gnu_int32m1_t(vint32m1_t type) {
75 return type;
78 // CHECK-LABEL: @to_fixed_int32m1_t__from_gnu_int32m1_t(
79 // CHECK-NEXT: entry:
80 // CHECK-NEXT: [[TYPE:%.*]] = load <8 x i32>, ptr [[TMP0:%.*]], align 32, !tbaa [[TBAA4]]
81 // CHECK-NEXT: [[CAST_SCALABLE:%.*]] = tail call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[TYPE]], i64 0)
82 // CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]
84 fixed_int32m1_t to_fixed_int32m1_t__from_gnu_int32m1_t(gnu_int32m1_t type) {
85 return type;
88 // CHECK-LABEL: @from_fixed_int32m1_t__to_gnu_int32m1_t(
89 // CHECK-NEXT: entry:
90 // CHECK-NEXT: [[TYPE:%.*]] = tail call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[TYPE_COERCE:%.*]], i64 0)
91 // CHECK-NEXT: store <8 x i32> [[TYPE]], ptr [[AGG_RESULT:%.*]], align 32, !tbaa [[TBAA4]]
92 // CHECK-NEXT: ret void
94 gnu_int32m1_t from_fixed_int32m1_t__to_gnu_int32m1_t(fixed_int32m1_t type) {
95 return type;