clang/test/CodeGen/mips-constraints-mem.c

   1 // RUN: %clang_cc1 -triple mipsel-unknown-linux -o - -emit-llvm %s \
   2 // RUN: | FileCheck %s
   3
   4 // This checks that the frontend will accept inline asm memory constraints.
   5
   6 int foo(void)
   7 {
   8
   9  // 'R': An address that can be used in a non-macro load or stor'
  10  // This test will result in the higher and lower nibbles being
  11  // switched due to the lwl/lwr instruction pairs.
  12  // CHECK:   %{{[0-9]+}} = call i32 asm sideeffect  "lwl $0, 1 + $1\0A\09lwr $0, 2 + $1\0A\09", "=r,*R,~{$1}"(ptr elementtype(i32) %{{[0-9,a-f]+}}) #1,
  13
  14   int c = 0xffbbccdd;
  15
  16   int *p = &c;
  17   int out = 0;
  18
  19   __asm volatile (
  20     "lwl %0, 1 + %1\n\t"
  21     "lwr %0, 2 + %1\n\t"
  22     : "=r"(out)
  23     : "R"(*p)
  24     );
  25   return 0;
  26 }