Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / CodeGen / mips-varargs.c
blob052aedd1cd1e2c7dbfecce85c417277f319db378
1 // RUN: %clang_cc1 -triple mips-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefixes=ALL,O32 -enable-var-scope
2 // RUN: %clang_cc1 -triple mipsel-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefixes=ALL,O32 -enable-var-scope
3 // RUN: %clang_cc1 -triple mips64-unknown-linux -o - -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefixes=ALL,N32,NEW -enable-var-scope
4 // RUN: %clang_cc1 -triple mips64-unknown-linux -o - -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefixes=ALL,N32,NEW -enable-var-scope
5 // RUN: %clang_cc1 -triple mips64-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefixes=ALL,N64,NEW -enable-var-scope
6 // RUN: %clang_cc1 -triple mips64el-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefixes=ALL,N64,NEW -enable-var-scope
8 #include <stdarg.h>
10 typedef int v4i32 __attribute__ ((__vector_size__ (16)));
12 int test_i32(char *fmt, ...) {
13 va_list va;
15 va_start(va, fmt);
16 int v = va_arg(va, int);
17 va_end(va);
19 return v;
22 // O32-LABEL: define{{.*}} i32 @test_i32(ptr{{.*}} %fmt, ...)
23 // N32-LABEL: define{{.*}} signext i32 @test_i32(ptr{{.*}} %fmt, ...)
24 // N64-LABEL: define{{.*}} signext i32 @test_i32(ptr{{.*}} %fmt, ...)
26 // O32: %va = alloca ptr, align [[$PTRALIGN:4]]
27 // N32: %va = alloca ptr, align [[$PTRALIGN:4]]
28 // N64: %va = alloca ptr, align [[$PTRALIGN:8]]
29 // ALL: [[V:%.*]] = alloca i32, align 4
30 // NEW: [[PROMOTION_TEMP:%.*]] = alloca i32, align 4
32 // ALL: call void @llvm.va_start(ptr %va)
33 // ALL: [[AP_CUR:%.+]] = load ptr, ptr %va, align [[$PTRALIGN]]
34 // O32: [[AP_NEXT:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], [[$INTPTR_T:i32]] [[$CHUNKSIZE:4]]
35 // NEW: [[AP_NEXT:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], [[$INTPTR_T:i32|i64]] [[$CHUNKSIZE:8]]
37 // ALL: store ptr [[AP_NEXT]], ptr %va, align [[$PTRALIGN]]
39 // O32: [[ARG:%.+]] = load i32, ptr [[AP_CUR]], align [[CHUNKALIGN:4]]
41 // N32: [[TMP:%.+]] = load i64, ptr [[AP_CUR]], align [[CHUNKALIGN:8]]
42 // N64: [[TMP:%.+]] = load i64, ptr [[AP_CUR]], align [[CHUNKALIGN:8]]
43 // NEW: [[TMP2:%.+]] = trunc i64 [[TMP]] to i32
44 // NEW: store i32 [[TMP2]], ptr [[PROMOTION_TEMP]], align 4
45 // NEW: [[ARG:%.+]] = load i32, ptr [[PROMOTION_TEMP]], align 4
46 // ALL: store i32 [[ARG]], ptr [[V]], align 4
48 // ALL: call void @llvm.va_end(ptr %va)
49 // ALL: }
51 long long test_i64(char *fmt, ...) {
52 va_list va;
54 va_start(va, fmt);
55 long long v = va_arg(va, long long);
56 va_end(va);
58 return v;
61 // ALL-LABEL: define{{.*}} i64 @test_i64(ptr{{.*}} %fmt, ...)
63 // ALL: %va = alloca ptr, align [[$PTRALIGN]]
64 // ALL: call void @llvm.va_start(ptr %va)
65 // ALL: [[AP_CUR:%.+]] = load ptr, ptr %va, align [[$PTRALIGN]]
67 // i64 is 8-byte aligned, while this is within O32's stack alignment there's no
68 // guarantee that the offset is still 8-byte aligned after earlier reads.
69 // O32: [[TMP1:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], i32 7
70 // O32: [[AP_CUR:%.+]] = call ptr @llvm.ptrmask.p0.i32(ptr [[TMP1]], i32 -8)
72 // ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], [[$INTPTR_T]] 8
73 // ALL: store ptr [[AP_NEXT]], ptr %va, align [[$PTRALIGN]]
75 // ALL: [[ARG:%.+]] = load i64, ptr [[AP_CUR]], align 8
77 // ALL: call void @llvm.va_end(ptr %va)
78 // ALL: }
80 char *test_ptr(char *fmt, ...) {
81 va_list va;
83 va_start(va, fmt);
84 char *v = va_arg(va, char *);
85 va_end(va);
87 return v;
90 // ALL-LABEL: define{{.*}} ptr @test_ptr(ptr{{.*}} %fmt, ...)
92 // ALL: %va = alloca ptr, align [[$PTRALIGN]]
93 // ALL: [[V:%.*]] = alloca ptr, align [[$PTRALIGN]]
94 // N32: [[AP_CAST:%.+]] = alloca ptr, align 4
95 // ALL: call void @llvm.va_start(ptr %va)
96 // ALL: [[AP_CUR:%.+]] = load ptr, ptr %va, align [[$PTRALIGN]]
97 // ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], [[$INTPTR_T]] [[$CHUNKSIZE]]
98 // ALL: store ptr [[AP_NEXT]], ptr %va, align [[$PTRALIGN]]
100 // When the chunk size matches the pointer size, this is easy.
101 // Otherwise we need a promotion temporary.
102 // N32: [[TMP2:%.+]] = load i64, ptr [[AP_CUR]], align 8
103 // N32: [[TMP3:%.+]] = trunc i64 [[TMP2]] to i32
104 // N32: [[PTR:%.+]] = inttoptr i32 [[TMP3]] to ptr
105 // N32: store ptr [[PTR]], ptr [[AP_CAST]], align 4
106 // N32: [[ARG:%.+]] = load ptr, ptr [[AP_CAST]], align [[$PTRALIGN]]
108 // O32: [[ARG:%.+]] = load ptr, ptr [[AP_CUR]], align [[$PTRALIGN]]
109 // N64: [[ARG:%.+]] = load ptr, ptr [[AP_CUR]], align [[$PTRALIGN]]
110 // ALL: store ptr [[ARG]], ptr [[V]], align [[$PTRALIGN]]
112 // ALL: call void @llvm.va_end(ptr %va)
113 // ALL: }
115 int test_v4i32(char *fmt, ...) {
116 va_list va;
118 va_start(va, fmt);
119 v4i32 v = va_arg(va, v4i32);
120 va_end(va);
122 return v[0];
125 // O32-LABEL: define{{.*}} i32 @test_v4i32(ptr{{.*}} %fmt, ...)
126 // N32-LABEL: define{{.*}} signext i32 @test_v4i32(ptr{{.*}} %fmt, ...)
127 // N64-LABEL: define{{.*}} signext i32 @test_v4i32(ptr{{.*}} %fmt, ...)
129 // ALL: %va = alloca ptr, align [[$PTRALIGN]]
130 // ALL: [[V:%.+]] = alloca <4 x i32>, align 16
131 // ALL: call void @llvm.va_start(ptr %va)
132 // ALL: [[AP_CUR:%.+]] = load ptr, ptr %va, align [[$PTRALIGN]]
134 // Vectors are 16-byte aligned, however the O32 ABI has a maximum alignment of
135 // 8-bytes since the base of the stack is 8-byte aligned.
137 // O32: [[TMP1:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], i32 7
138 // O32: [[AP_CUR:%.+]] = call ptr @llvm.ptrmask.p0.i32(ptr [[TMP1]], i32 -8)
140 // N32: [[TMP1:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], i32 15
141 // N32: [[AP_CUR:%.+]] = call ptr @llvm.ptrmask.p0.i32(ptr [[TMP1]], i32 -16)
143 // N64: [[TMP1:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], i32 15
144 // N64: [[AP_CUR:%.+]] = call ptr @llvm.ptrmask.p0.i64(ptr [[TMP1]], i64 -16)
147 // ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], [[$INTPTR_T]] 16
148 // ALL: store ptr [[AP_NEXT]], ptr %va, align [[$PTRALIGN]]
150 // O32: [[ARG:%.+]] = load <4 x i32>, ptr [[AP_CUR]], align 8
151 // N64: [[ARG:%.+]] = load <4 x i32>, ptr [[AP_CUR]], align 16
152 // N32: [[ARG:%.+]] = load <4 x i32>, ptr [[AP_CUR]], align 16
153 // ALL: store <4 x i32> [[ARG]], ptr [[V]], align 16
155 // ALL: call void @llvm.va_end(ptr %va)
156 // ALL: [[VECEXT:%.+]] = extractelement <4 x i32> {{.*}}, i32 0
157 // ALL: ret i32 [[VECEXT]]
158 // ALL: }